qi.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * CAAM/SEC 4.x QI transport/backend driver
  4. * Queue Interface backend functionality
  5. *
  6. * Copyright 2013-2016 Freescale Semiconductor, Inc.
  7. * Copyright 2016-2017, 2019-2020 NXP
  8. */
  9. #include <linux/cpumask.h>
  10. #include <linux/device.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/kernel.h>
  13. #include <linux/kthread.h>
  14. #include <linux/netdevice.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/slab.h>
  17. #include <linux/string.h>
  18. #include <soc/fsl/qman.h>
  19. #include "debugfs.h"
  20. #include "regs.h"
  21. #include "qi.h"
  22. #include "desc.h"
  23. #include "intern.h"
  24. #include "desc_constr.h"
  25. #define PREHDR_RSLS_SHIFT 31
  26. #define PREHDR_ABS BIT(25)
  27. /*
  28. * Use a reasonable backlog of frames (per CPU) as congestion threshold,
  29. * so that resources used by the in-flight buffers do not become a memory hog.
  30. */
  31. #define MAX_RSP_FQ_BACKLOG_PER_CPU 256
  32. #define CAAM_QI_ENQUEUE_RETRIES 10000
  33. #define CAAM_NAPI_WEIGHT 63
  34. /*
  35. * caam_napi - struct holding CAAM NAPI-related params
  36. * @irqtask: IRQ task for QI backend
  37. * @p: QMan portal
  38. */
  39. struct caam_napi {
  40. struct napi_struct irqtask;
  41. struct qman_portal *p;
  42. };
  43. /*
  44. * caam_qi_pcpu_priv - percpu private data structure to main list of pending
  45. * responses expected on each cpu.
  46. * @caam_napi: CAAM NAPI params
  47. * @net_dev: netdev used by NAPI
  48. * @rsp_fq: response FQ from CAAM
  49. */
  50. struct caam_qi_pcpu_priv {
  51. struct caam_napi caam_napi;
  52. struct net_device *net_dev;
  53. struct qman_fq *rsp_fq;
  54. } ____cacheline_aligned;
  55. static DEFINE_PER_CPU(struct caam_qi_pcpu_priv, pcpu_qipriv);
  56. static DEFINE_PER_CPU(int, last_cpu);
  57. /*
  58. * caam_qi_priv - CAAM QI backend private params
  59. * @cgr: QMan congestion group
  60. */
  61. struct caam_qi_priv {
  62. struct qman_cgr cgr;
  63. };
  64. static struct caam_qi_priv qipriv ____cacheline_aligned;
  65. /*
  66. * This is written by only one core - the one that initialized the CGR - and
  67. * read by multiple cores (all the others).
  68. */
  69. bool caam_congested __read_mostly;
  70. EXPORT_SYMBOL(caam_congested);
  71. /*
  72. * This is a cache of buffers, from which the users of CAAM QI driver
  73. * can allocate short (CAAM_QI_MEMCACHE_SIZE) buffers. It's faster than
  74. * doing malloc on the hotpath.
  75. * NOTE: A more elegant solution would be to have some headroom in the frames
  76. * being processed. This could be added by the dpaa-ethernet driver.
  77. * This would pose a problem for userspace application processing which
  78. * cannot know of this limitation. So for now, this will work.
  79. * NOTE: The memcache is SMP-safe. No need to handle spinlocks in-here
  80. */
  81. static struct kmem_cache *qi_cache;
  82. static void *caam_iova_to_virt(struct iommu_domain *domain,
  83. dma_addr_t iova_addr)
  84. {
  85. phys_addr_t phys_addr;
  86. phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
  87. return phys_to_virt(phys_addr);
  88. }
  89. int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req)
  90. {
  91. struct qm_fd fd;
  92. dma_addr_t addr;
  93. int ret;
  94. int num_retries = 0;
  95. qm_fd_clear_fd(&fd);
  96. qm_fd_set_compound(&fd, qm_sg_entry_get_len(&req->fd_sgt[1]));
  97. addr = dma_map_single(qidev, req->fd_sgt, sizeof(req->fd_sgt),
  98. DMA_BIDIRECTIONAL);
  99. if (dma_mapping_error(qidev, addr)) {
  100. dev_err(qidev, "DMA mapping error for QI enqueue request\n");
  101. return -EIO;
  102. }
  103. qm_fd_addr_set64(&fd, addr);
  104. do {
  105. refcount_inc(&req->drv_ctx->refcnt);
  106. ret = qman_enqueue(req->drv_ctx->req_fq, &fd);
  107. if (likely(!ret))
  108. return 0;
  109. refcount_dec(&req->drv_ctx->refcnt);
  110. if (ret != -EBUSY)
  111. break;
  112. num_retries++;
  113. } while (num_retries < CAAM_QI_ENQUEUE_RETRIES);
  114. dev_err(qidev, "qman_enqueue failed: %d\n", ret);
  115. return ret;
  116. }
  117. EXPORT_SYMBOL(caam_qi_enqueue);
  118. static void caam_fq_ern_cb(struct qman_portal *qm, struct qman_fq *fq,
  119. const union qm_mr_entry *msg)
  120. {
  121. const struct qm_fd *fd;
  122. struct caam_drv_req *drv_req;
  123. struct device *qidev = &(raw_cpu_ptr(&pcpu_qipriv)->net_dev->dev);
  124. struct caam_drv_private *priv = dev_get_drvdata(qidev);
  125. fd = &msg->ern.fd;
  126. drv_req = caam_iova_to_virt(priv->domain, qm_fd_addr_get64(fd));
  127. if (!drv_req) {
  128. dev_err(qidev,
  129. "Can't find original request for CAAM response\n");
  130. return;
  131. }
  132. refcount_dec(&drv_req->drv_ctx->refcnt);
  133. if (qm_fd_get_format(fd) != qm_fd_compound) {
  134. dev_err(qidev, "Non-compound FD from CAAM\n");
  135. return;
  136. }
  137. dma_unmap_single(drv_req->drv_ctx->qidev, qm_fd_addr(fd),
  138. sizeof(drv_req->fd_sgt), DMA_BIDIRECTIONAL);
  139. if (fd->status)
  140. drv_req->cbk(drv_req, be32_to_cpu(fd->status));
  141. else
  142. drv_req->cbk(drv_req, JRSTA_SSRC_QI);
  143. }
  144. static struct qman_fq *create_caam_req_fq(struct device *qidev,
  145. struct qman_fq *rsp_fq,
  146. dma_addr_t hwdesc,
  147. int fq_sched_flag)
  148. {
  149. int ret;
  150. struct qman_fq *req_fq;
  151. struct qm_mcc_initfq opts;
  152. req_fq = kzalloc_obj(*req_fq, GFP_ATOMIC);
  153. if (!req_fq)
  154. return ERR_PTR(-ENOMEM);
  155. req_fq->cb.ern = caam_fq_ern_cb;
  156. req_fq->cb.fqs = NULL;
  157. ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
  158. QMAN_FQ_FLAG_TO_DCPORTAL, req_fq);
  159. if (ret) {
  160. dev_err(qidev, "Failed to create session req FQ\n");
  161. goto create_req_fq_fail;
  162. }
  163. memset(&opts, 0, sizeof(opts));
  164. opts.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_DESTWQ |
  165. QM_INITFQ_WE_CONTEXTB |
  166. QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CGID);
  167. opts.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_CPCSTASH | QM_FQCTRL_CGE);
  168. qm_fqd_set_destwq(&opts.fqd, qm_channel_caam, 2);
  169. opts.fqd.context_b = cpu_to_be32(qman_fq_fqid(rsp_fq));
  170. qm_fqd_context_a_set64(&opts.fqd, hwdesc);
  171. opts.fqd.cgid = qipriv.cgr.cgrid;
  172. ret = qman_init_fq(req_fq, fq_sched_flag, &opts);
  173. if (ret) {
  174. dev_err(qidev, "Failed to init session req FQ\n");
  175. goto init_req_fq_fail;
  176. }
  177. dev_dbg(qidev, "Allocated request FQ %u for CPU %u\n", req_fq->fqid,
  178. smp_processor_id());
  179. return req_fq;
  180. init_req_fq_fail:
  181. qman_destroy_fq(req_fq);
  182. create_req_fq_fail:
  183. kfree(req_fq);
  184. return ERR_PTR(ret);
  185. }
  186. static int empty_retired_fq(struct device *qidev, struct qman_fq *fq)
  187. {
  188. int ret;
  189. ret = qman_volatile_dequeue(fq, QMAN_VOLATILE_FLAG_WAIT_INT |
  190. QMAN_VOLATILE_FLAG_FINISH,
  191. QM_VDQCR_PRECEDENCE_VDQCR |
  192. QM_VDQCR_NUMFRAMES_TILLEMPTY);
  193. if (ret) {
  194. dev_err(qidev, "Volatile dequeue fail for FQ: %u\n", fq->fqid);
  195. return ret;
  196. }
  197. do {
  198. struct qman_portal *p;
  199. p = qman_get_affine_portal(smp_processor_id());
  200. qman_p_poll_dqrr(p, 16);
  201. } while (fq->flags & QMAN_FQ_STATE_NE);
  202. return 0;
  203. }
  204. static int kill_fq(struct device *qidev, struct qman_fq *fq)
  205. {
  206. u32 flags;
  207. int ret;
  208. ret = qman_retire_fq(fq, &flags);
  209. if (ret < 0) {
  210. dev_err(qidev, "qman_retire_fq failed: %d\n", ret);
  211. return ret;
  212. }
  213. if (!ret)
  214. goto empty_fq;
  215. /* Async FQ retirement condition */
  216. if (ret == 1) {
  217. /* Retry till FQ gets in retired state */
  218. do {
  219. msleep(20);
  220. } while (fq->state != qman_fq_state_retired);
  221. WARN_ON(fq->flags & QMAN_FQ_STATE_BLOCKOOS);
  222. WARN_ON(fq->flags & QMAN_FQ_STATE_ORL);
  223. }
  224. empty_fq:
  225. if (fq->flags & QMAN_FQ_STATE_NE) {
  226. ret = empty_retired_fq(qidev, fq);
  227. if (ret) {
  228. dev_err(qidev, "empty_retired_fq fail for FQ: %u\n",
  229. fq->fqid);
  230. return ret;
  231. }
  232. }
  233. ret = qman_oos_fq(fq);
  234. if (ret)
  235. dev_err(qidev, "OOS of FQID: %u failed\n", fq->fqid);
  236. qman_destroy_fq(fq);
  237. kfree(fq);
  238. return ret;
  239. }
  240. static int empty_caam_fq(struct qman_fq *fq, struct caam_drv_ctx *drv_ctx)
  241. {
  242. int ret;
  243. int retries = 10;
  244. struct qm_mcr_queryfq_np np;
  245. /* Wait till the older CAAM FQ get empty */
  246. do {
  247. ret = qman_query_fq_np(fq, &np);
  248. if (ret)
  249. return ret;
  250. if (!qm_mcr_np_get(&np, frm_cnt))
  251. break;
  252. msleep(20);
  253. } while (1);
  254. /* Wait until pending jobs from this FQ are processed by CAAM */
  255. do {
  256. if (refcount_read(&drv_ctx->refcnt) == 1)
  257. break;
  258. msleep(20);
  259. } while (--retries);
  260. if (!retries)
  261. dev_warn_once(drv_ctx->qidev, "%d frames from FQID %u still pending in CAAM\n",
  262. refcount_read(&drv_ctx->refcnt), fq->fqid);
  263. return 0;
  264. }
  265. int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc)
  266. {
  267. int ret;
  268. u32 num_words;
  269. struct qman_fq *new_fq, *old_fq;
  270. struct device *qidev = drv_ctx->qidev;
  271. num_words = desc_len(sh_desc);
  272. if (num_words > MAX_SDLEN) {
  273. dev_err(qidev, "Invalid descriptor len: %d words\n", num_words);
  274. return -EINVAL;
  275. }
  276. /* Note down older req FQ */
  277. old_fq = drv_ctx->req_fq;
  278. /* Create a new req FQ in parked state */
  279. new_fq = create_caam_req_fq(drv_ctx->qidev, drv_ctx->rsp_fq,
  280. drv_ctx->context_a, 0);
  281. if (IS_ERR(new_fq)) {
  282. dev_err(qidev, "FQ allocation for shdesc update failed\n");
  283. return PTR_ERR(new_fq);
  284. }
  285. /* Hook up new FQ to context so that new requests keep queuing */
  286. drv_ctx->req_fq = new_fq;
  287. /* Empty and remove the older FQ */
  288. ret = empty_caam_fq(old_fq, drv_ctx);
  289. if (ret) {
  290. dev_err(qidev, "Old CAAM FQ empty failed: %d\n", ret);
  291. /* We can revert to older FQ */
  292. drv_ctx->req_fq = old_fq;
  293. if (kill_fq(qidev, new_fq))
  294. dev_warn(qidev, "New CAAM FQ kill failed\n");
  295. return ret;
  296. }
  297. /*
  298. * Re-initialise pre-header. Set RSLS and SDLEN.
  299. * Update the shared descriptor for driver context.
  300. */
  301. drv_ctx->prehdr[0] = cpu_to_caam32((1 << PREHDR_RSLS_SHIFT) |
  302. num_words);
  303. drv_ctx->prehdr[1] = cpu_to_caam32(PREHDR_ABS);
  304. memcpy(drv_ctx->sh_desc, sh_desc, desc_bytes(sh_desc));
  305. dma_sync_single_for_device(qidev, drv_ctx->context_a,
  306. sizeof(drv_ctx->sh_desc) +
  307. sizeof(drv_ctx->prehdr),
  308. DMA_BIDIRECTIONAL);
  309. /* Put the new FQ in scheduled state */
  310. ret = qman_schedule_fq(new_fq);
  311. if (ret) {
  312. dev_err(qidev, "Fail to sched new CAAM FQ, ecode = %d\n", ret);
  313. /*
  314. * We can kill new FQ and revert to old FQ.
  315. * Since the desc is already modified, it is success case
  316. */
  317. drv_ctx->req_fq = old_fq;
  318. if (kill_fq(qidev, new_fq))
  319. dev_warn(qidev, "New CAAM FQ kill failed\n");
  320. } else if (kill_fq(qidev, old_fq)) {
  321. dev_warn(qidev, "Old CAAM FQ kill failed\n");
  322. }
  323. return 0;
  324. }
  325. EXPORT_SYMBOL(caam_drv_ctx_update);
  326. struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev,
  327. int *cpu,
  328. u32 *sh_desc)
  329. {
  330. size_t size;
  331. u32 num_words;
  332. dma_addr_t hwdesc;
  333. struct caam_drv_ctx *drv_ctx;
  334. const cpumask_t *cpus = qman_affine_cpus();
  335. num_words = desc_len(sh_desc);
  336. if (num_words > MAX_SDLEN) {
  337. dev_err(qidev, "Invalid descriptor len: %d words\n",
  338. num_words);
  339. return ERR_PTR(-EINVAL);
  340. }
  341. drv_ctx = kzalloc_obj(*drv_ctx, GFP_ATOMIC);
  342. if (!drv_ctx)
  343. return ERR_PTR(-ENOMEM);
  344. /*
  345. * Initialise pre-header - set RSLS and SDLEN - and shared descriptor
  346. * and dma-map them.
  347. */
  348. drv_ctx->prehdr[0] = cpu_to_caam32((1 << PREHDR_RSLS_SHIFT) |
  349. num_words);
  350. drv_ctx->prehdr[1] = cpu_to_caam32(PREHDR_ABS);
  351. memcpy(drv_ctx->sh_desc, sh_desc, desc_bytes(sh_desc));
  352. size = sizeof(drv_ctx->prehdr) + sizeof(drv_ctx->sh_desc);
  353. hwdesc = dma_map_single(qidev, drv_ctx->prehdr, size,
  354. DMA_BIDIRECTIONAL);
  355. if (dma_mapping_error(qidev, hwdesc)) {
  356. dev_err(qidev, "DMA map error for preheader + shdesc\n");
  357. kfree(drv_ctx);
  358. return ERR_PTR(-ENOMEM);
  359. }
  360. drv_ctx->context_a = hwdesc;
  361. /* If given CPU does not own the portal, choose another one that does */
  362. if (!cpumask_test_cpu(*cpu, cpus)) {
  363. int *pcpu = &get_cpu_var(last_cpu);
  364. *pcpu = cpumask_next_wrap(*pcpu, cpus);
  365. *cpu = *pcpu;
  366. put_cpu_var(last_cpu);
  367. }
  368. drv_ctx->cpu = *cpu;
  369. /* Find response FQ hooked with this CPU */
  370. drv_ctx->rsp_fq = per_cpu(pcpu_qipriv.rsp_fq, drv_ctx->cpu);
  371. /* Attach request FQ */
  372. drv_ctx->req_fq = create_caam_req_fq(qidev, drv_ctx->rsp_fq, hwdesc,
  373. QMAN_INITFQ_FLAG_SCHED);
  374. if (IS_ERR(drv_ctx->req_fq)) {
  375. dev_err(qidev, "create_caam_req_fq failed\n");
  376. dma_unmap_single(qidev, hwdesc, size, DMA_BIDIRECTIONAL);
  377. kfree(drv_ctx);
  378. return ERR_PTR(-ENOMEM);
  379. }
  380. /* init reference counter used to track references to request FQ */
  381. refcount_set(&drv_ctx->refcnt, 1);
  382. drv_ctx->qidev = qidev;
  383. return drv_ctx;
  384. }
  385. EXPORT_SYMBOL(caam_drv_ctx_init);
  386. void *qi_cache_alloc(gfp_t flags)
  387. {
  388. return kmem_cache_alloc(qi_cache, flags);
  389. }
  390. EXPORT_SYMBOL(qi_cache_alloc);
  391. void qi_cache_free(void *obj)
  392. {
  393. kmem_cache_free(qi_cache, obj);
  394. }
  395. EXPORT_SYMBOL(qi_cache_free);
  396. static int caam_qi_poll(struct napi_struct *napi, int budget)
  397. {
  398. struct caam_napi *np = container_of(napi, struct caam_napi, irqtask);
  399. int cleaned = qman_p_poll_dqrr(np->p, budget);
  400. if (cleaned < budget) {
  401. napi_complete(napi);
  402. qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
  403. }
  404. return cleaned;
  405. }
  406. void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx)
  407. {
  408. if (IS_ERR_OR_NULL(drv_ctx))
  409. return;
  410. /* Remove request FQ */
  411. if (kill_fq(drv_ctx->qidev, drv_ctx->req_fq))
  412. dev_err(drv_ctx->qidev, "Crypto session req FQ kill failed\n");
  413. dma_unmap_single(drv_ctx->qidev, drv_ctx->context_a,
  414. sizeof(drv_ctx->sh_desc) + sizeof(drv_ctx->prehdr),
  415. DMA_BIDIRECTIONAL);
  416. kfree(drv_ctx);
  417. }
  418. EXPORT_SYMBOL(caam_drv_ctx_rel);
  419. static void caam_qi_shutdown(void *data)
  420. {
  421. int i;
  422. struct device *qidev = data;
  423. struct caam_qi_priv *priv = &qipriv;
  424. const cpumask_t *cpus = qman_affine_cpus();
  425. for_each_cpu(i, cpus) {
  426. struct napi_struct *irqtask;
  427. irqtask = &per_cpu_ptr(&pcpu_qipriv.caam_napi, i)->irqtask;
  428. napi_disable(irqtask);
  429. netif_napi_del(irqtask);
  430. if (kill_fq(qidev, per_cpu(pcpu_qipriv.rsp_fq, i)))
  431. dev_err(qidev, "Rsp FQ kill failed, cpu: %d\n", i);
  432. free_netdev(per_cpu(pcpu_qipriv.net_dev, i));
  433. }
  434. qman_delete_cgr_safe(&priv->cgr);
  435. qman_release_cgrid(priv->cgr.cgrid);
  436. kmem_cache_destroy(qi_cache);
  437. }
  438. static void cgr_cb(struct qman_portal *qm, struct qman_cgr *cgr, int congested)
  439. {
  440. caam_congested = congested;
  441. if (congested) {
  442. caam_debugfs_qi_congested();
  443. pr_debug_ratelimited("CAAM entered congestion\n");
  444. } else {
  445. pr_debug_ratelimited("CAAM exited congestion\n");
  446. }
  447. }
  448. static int caam_qi_napi_schedule(struct qman_portal *p, struct caam_napi *np,
  449. bool sched_napi)
  450. {
  451. if (sched_napi) {
  452. /* Disable QMan IRQ source and invoke NAPI */
  453. qman_p_irqsource_remove(p, QM_PIRQ_DQRI);
  454. np->p = p;
  455. napi_schedule(&np->irqtask);
  456. return 1;
  457. }
  458. return 0;
  459. }
  460. static enum qman_cb_dqrr_result caam_rsp_fq_dqrr_cb(struct qman_portal *p,
  461. struct qman_fq *rsp_fq,
  462. const struct qm_dqrr_entry *dqrr,
  463. bool sched_napi)
  464. {
  465. struct caam_napi *caam_napi = raw_cpu_ptr(&pcpu_qipriv.caam_napi);
  466. struct caam_drv_req *drv_req;
  467. const struct qm_fd *fd;
  468. struct device *qidev = &(raw_cpu_ptr(&pcpu_qipriv)->net_dev->dev);
  469. struct caam_drv_private *priv = dev_get_drvdata(qidev);
  470. u32 status;
  471. if (caam_qi_napi_schedule(p, caam_napi, sched_napi))
  472. return qman_cb_dqrr_stop;
  473. fd = &dqrr->fd;
  474. drv_req = caam_iova_to_virt(priv->domain, qm_fd_addr_get64(fd));
  475. if (unlikely(!drv_req)) {
  476. dev_err(qidev,
  477. "Can't find original request for caam response\n");
  478. return qman_cb_dqrr_consume;
  479. }
  480. refcount_dec(&drv_req->drv_ctx->refcnt);
  481. status = be32_to_cpu(fd->status);
  482. if (unlikely(status)) {
  483. u32 ssrc = status & JRSTA_SSRC_MASK;
  484. u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
  485. if (ssrc != JRSTA_SSRC_CCB_ERROR ||
  486. err_id != JRSTA_CCBERR_ERRID_ICVCHK)
  487. dev_err_ratelimited(qidev,
  488. "Error: %#x in CAAM response FD\n",
  489. status);
  490. }
  491. if (unlikely(qm_fd_get_format(fd) != qm_fd_compound)) {
  492. dev_err(qidev, "Non-compound FD from CAAM\n");
  493. return qman_cb_dqrr_consume;
  494. }
  495. dma_unmap_single(drv_req->drv_ctx->qidev, qm_fd_addr(fd),
  496. sizeof(drv_req->fd_sgt), DMA_BIDIRECTIONAL);
  497. drv_req->cbk(drv_req, status);
  498. return qman_cb_dqrr_consume;
  499. }
  500. static int alloc_rsp_fq_cpu(struct device *qidev, unsigned int cpu)
  501. {
  502. struct qm_mcc_initfq opts;
  503. struct qman_fq *fq;
  504. int ret;
  505. fq = kzalloc_obj(*fq);
  506. if (!fq)
  507. return -ENOMEM;
  508. fq->cb.dqrr = caam_rsp_fq_dqrr_cb;
  509. ret = qman_create_fq(0, QMAN_FQ_FLAG_NO_ENQUEUE |
  510. QMAN_FQ_FLAG_DYNAMIC_FQID, fq);
  511. if (ret) {
  512. dev_err(qidev, "Rsp FQ create failed\n");
  513. kfree(fq);
  514. return -ENODEV;
  515. }
  516. memset(&opts, 0, sizeof(opts));
  517. opts.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_DESTWQ |
  518. QM_INITFQ_WE_CONTEXTB |
  519. QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CGID);
  520. opts.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_CTXASTASHING |
  521. QM_FQCTRL_CPCSTASH | QM_FQCTRL_CGE);
  522. qm_fqd_set_destwq(&opts.fqd, qman_affine_channel(cpu), 3);
  523. opts.fqd.cgid = qipriv.cgr.cgrid;
  524. opts.fqd.context_a.stashing.exclusive = QM_STASHING_EXCL_CTX |
  525. QM_STASHING_EXCL_DATA;
  526. qm_fqd_set_stashing(&opts.fqd, 0, 1, 1);
  527. ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
  528. if (ret) {
  529. dev_err(qidev, "Rsp FQ init failed\n");
  530. kfree(fq);
  531. return -ENODEV;
  532. }
  533. per_cpu(pcpu_qipriv.rsp_fq, cpu) = fq;
  534. dev_dbg(qidev, "Allocated response FQ %u for CPU %u", fq->fqid, cpu);
  535. return 0;
  536. }
  537. static int init_cgr(struct device *qidev)
  538. {
  539. int ret;
  540. struct qm_mcc_initcgr opts;
  541. const u64 val = (u64)cpumask_weight(qman_affine_cpus()) *
  542. MAX_RSP_FQ_BACKLOG_PER_CPU;
  543. ret = qman_alloc_cgrid(&qipriv.cgr.cgrid);
  544. if (ret) {
  545. dev_err(qidev, "CGR alloc failed for rsp FQs: %d\n", ret);
  546. return ret;
  547. }
  548. qipriv.cgr.cb = cgr_cb;
  549. memset(&opts, 0, sizeof(opts));
  550. opts.we_mask = cpu_to_be16(QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES |
  551. QM_CGR_WE_MODE);
  552. opts.cgr.cscn_en = QM_CGR_EN;
  553. opts.cgr.mode = QMAN_CGR_MODE_FRAME;
  554. qm_cgr_cs_thres_set64(&opts.cgr.cs_thres, val, 1);
  555. ret = qman_create_cgr(&qipriv.cgr, QMAN_CGR_FLAG_USE_INIT, &opts);
  556. if (ret) {
  557. dev_err(qidev, "Error %d creating CAAM CGRID: %u\n", ret,
  558. qipriv.cgr.cgrid);
  559. return ret;
  560. }
  561. dev_dbg(qidev, "Congestion threshold set to %llu\n", val);
  562. return 0;
  563. }
  564. static int alloc_rsp_fqs(struct device *qidev)
  565. {
  566. int ret, i;
  567. const cpumask_t *cpus = qman_affine_cpus();
  568. /*Now create response FQs*/
  569. for_each_cpu(i, cpus) {
  570. ret = alloc_rsp_fq_cpu(qidev, i);
  571. if (ret) {
  572. dev_err(qidev, "CAAM rsp FQ alloc failed, cpu: %u", i);
  573. return ret;
  574. }
  575. }
  576. return 0;
  577. }
  578. static void free_rsp_fqs(void)
  579. {
  580. int i;
  581. const cpumask_t *cpus = qman_affine_cpus();
  582. for_each_cpu(i, cpus)
  583. kfree(per_cpu(pcpu_qipriv.rsp_fq, i));
  584. }
  585. static void free_caam_qi_pcpu_netdev(const cpumask_t *cpus)
  586. {
  587. struct caam_qi_pcpu_priv *priv;
  588. int i;
  589. for_each_cpu(i, cpus) {
  590. priv = per_cpu_ptr(&pcpu_qipriv, i);
  591. free_netdev(priv->net_dev);
  592. }
  593. }
  594. int caam_qi_init(struct platform_device *caam_pdev)
  595. {
  596. int err, i;
  597. struct device *qidev = &caam_pdev->dev;
  598. struct caam_drv_private *ctrlpriv;
  599. const cpumask_t *cpus = qman_affine_cpus();
  600. cpumask_var_t clean_mask;
  601. err = -ENOMEM;
  602. if (!zalloc_cpumask_var(&clean_mask, GFP_KERNEL))
  603. goto fail_cpumask;
  604. ctrlpriv = dev_get_drvdata(qidev);
  605. /* Initialize the congestion detection */
  606. err = init_cgr(qidev);
  607. if (err) {
  608. dev_err(qidev, "CGR initialization failed: %d\n", err);
  609. goto fail_cgr;
  610. }
  611. /* Initialise response FQs */
  612. err = alloc_rsp_fqs(qidev);
  613. if (err) {
  614. dev_err(qidev, "Can't allocate CAAM response FQs: %d\n", err);
  615. goto fail_fqs;
  616. }
  617. /*
  618. * Enable the NAPI contexts on each of the core which has an affine
  619. * portal.
  620. */
  621. for_each_cpu(i, cpus) {
  622. struct caam_qi_pcpu_priv *priv = per_cpu_ptr(&pcpu_qipriv, i);
  623. struct caam_napi *caam_napi = &priv->caam_napi;
  624. struct napi_struct *irqtask = &caam_napi->irqtask;
  625. struct net_device *net_dev;
  626. net_dev = alloc_netdev_dummy(0);
  627. if (!net_dev) {
  628. err = -ENOMEM;
  629. goto fail;
  630. }
  631. cpumask_set_cpu(i, clean_mask);
  632. priv->net_dev = net_dev;
  633. net_dev->dev = *qidev;
  634. netif_napi_add_tx_weight(net_dev, irqtask, caam_qi_poll,
  635. CAAM_NAPI_WEIGHT);
  636. napi_enable(irqtask);
  637. }
  638. qi_cache = kmem_cache_create("caamqicache", CAAM_QI_MEMCACHE_SIZE,
  639. dma_get_cache_alignment(), 0, NULL);
  640. if (!qi_cache) {
  641. dev_err(qidev, "Can't allocate CAAM cache\n");
  642. err = -ENOMEM;
  643. goto fail;
  644. }
  645. caam_debugfs_qi_init(ctrlpriv);
  646. err = devm_add_action_or_reset(qidev, caam_qi_shutdown, qidev);
  647. if (err)
  648. goto fail2;
  649. dev_info(qidev, "Linux CAAM Queue I/F driver initialised\n");
  650. goto free_cpumask;
  651. fail2:
  652. kmem_cache_destroy(qi_cache);
  653. fail:
  654. free_caam_qi_pcpu_netdev(clean_mask);
  655. fail_fqs:
  656. free_rsp_fqs();
  657. qman_delete_cgr_safe(&qipriv.cgr);
  658. qman_release_cgrid(qipriv.cgr.cgrid);
  659. fail_cgr:
  660. free_cpumask:
  661. free_cpumask_var(clean_mask);
  662. fail_cpumask:
  663. return err;
  664. }