blob_gen.c 6.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2015 Pengutronix, Steffen Trumtrar <kernel@pengutronix.de>
  4. * Copyright (C) 2021 Pengutronix, Ahmad Fatoum <kernel@pengutronix.de>
  5. * Copyright 2024-2025 NXP
  6. */
  7. #define pr_fmt(fmt) "caam blob_gen: " fmt
  8. #include <linux/bitfield.h>
  9. #include <linux/device.h>
  10. #include <keys/trusted-type.h>
  11. #include <soc/fsl/caam-blob.h>
  12. #include "compat.h"
  13. #include "desc_constr.h"
  14. #include "desc.h"
  15. #include "error.h"
  16. #include "intern.h"
  17. #include "jr.h"
  18. #include "regs.h"
  19. #define CAAM_BLOB_DESC_BYTES_MAX \
  20. /* Command to initialize & stating length of descriptor */ \
  21. (CAAM_CMD_SZ + \
  22. /* Command to append the key-modifier + key-modifier data */ \
  23. CAAM_CMD_SZ + CAAM_BLOB_KEYMOD_LENGTH + \
  24. /* Command to include input key + pointer to the input key */ \
  25. CAAM_CMD_SZ + CAAM_PTR_SZ_MAX + \
  26. /* Command to include output key + pointer to the output key */ \
  27. CAAM_CMD_SZ + CAAM_PTR_SZ_MAX + \
  28. /* Command describing the operation to perform */ \
  29. CAAM_CMD_SZ)
  30. struct caam_blob_priv {
  31. struct device jrdev;
  32. };
  33. struct caam_blob_job_result {
  34. int err;
  35. struct completion completion;
  36. };
  37. static void caam_blob_job_done(struct device *dev, u32 *desc, u32 err, void *context)
  38. {
  39. struct caam_blob_job_result *res = context;
  40. int ecode = 0;
  41. dev_dbg(dev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
  42. if (err)
  43. ecode = caam_jr_strstatus(dev, err);
  44. res->err = ecode;
  45. /*
  46. * Upon completion, desc points to a buffer containing a CAAM job
  47. * descriptor which encapsulates data into an externally-storable
  48. * blob.
  49. */
  50. complete(&res->completion);
  51. }
  52. static u32 check_caam_state(struct device *jrdev)
  53. {
  54. const struct caam_drv_private *ctrlpriv;
  55. ctrlpriv = dev_get_drvdata(jrdev->parent);
  56. return FIELD_GET(CSTA_MOO, rd_reg32(&ctrlpriv->jr[0]->perfmon.status));
  57. }
  58. int caam_process_blob(struct caam_blob_priv *priv,
  59. struct caam_blob_info *info, bool encap)
  60. {
  61. struct caam_blob_job_result testres;
  62. struct device *jrdev = &priv->jrdev;
  63. dma_addr_t dma_in, dma_out;
  64. int op = OP_PCLID_BLOB;
  65. int hwbk_caam_ovhd = 0;
  66. size_t output_len;
  67. u32 *desc;
  68. u32 moo;
  69. int ret;
  70. int len;
  71. if (info->key_mod_len > CAAM_BLOB_KEYMOD_LENGTH)
  72. return -EINVAL;
  73. if (encap) {
  74. op |= OP_TYPE_ENCAP_PROTOCOL;
  75. output_len = info->input_len + CAAM_BLOB_OVERHEAD;
  76. } else {
  77. op |= OP_TYPE_DECAP_PROTOCOL;
  78. output_len = info->input_len - CAAM_BLOB_OVERHEAD;
  79. info->output_len = output_len;
  80. }
  81. if (encap && info->pkey_info.is_pkey) {
  82. op |= OP_PCL_BLOB_BLACK;
  83. if (info->pkey_info.key_enc_algo == CAAM_ENC_ALGO_CCM) {
  84. op |= OP_PCL_BLOB_EKT;
  85. hwbk_caam_ovhd = CAAM_CCM_OVERHEAD;
  86. }
  87. if ((info->input_len + hwbk_caam_ovhd) > MAX_KEY_SIZE)
  88. return -EINVAL;
  89. len = info->input_len + hwbk_caam_ovhd;
  90. } else {
  91. len = info->input_len;
  92. }
  93. desc = kzalloc(CAAM_BLOB_DESC_BYTES_MAX, GFP_KERNEL);
  94. if (!desc)
  95. return -ENOMEM;
  96. dma_in = dma_map_single(jrdev, info->input, len,
  97. encap ? DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
  98. if (dma_mapping_error(jrdev, dma_in)) {
  99. dev_err(jrdev, "unable to map input DMA buffer\n");
  100. ret = -ENOMEM;
  101. goto out_free;
  102. }
  103. dma_out = dma_map_single(jrdev, info->output, output_len,
  104. DMA_FROM_DEVICE);
  105. if (dma_mapping_error(jrdev, dma_out)) {
  106. dev_err(jrdev, "unable to map output DMA buffer\n");
  107. ret = -ENOMEM;
  108. goto out_unmap_in;
  109. }
  110. moo = check_caam_state(jrdev);
  111. if (moo != CSTA_MOO_SECURE && moo != CSTA_MOO_TRUSTED)
  112. dev_warn(jrdev,
  113. "using insecure test key, enable HAB to use unique device key!\n");
  114. /*
  115. * A data blob is encrypted using a blob key (BK); a random number.
  116. * The BK is used as an AES-CCM key. The initial block (B0) and the
  117. * initial counter (Ctr0) are generated automatically and stored in
  118. * Class 1 Context DWords 0+1+2+3. The random BK is stored in the
  119. * Class 1 Key Register. Operation Mode is set to AES-CCM.
  120. */
  121. init_job_desc(desc, 0);
  122. if (encap && info->pkey_info.is_pkey) {
  123. /*!1. key command used to load class 1 key register
  124. * from input plain key.
  125. */
  126. append_key(desc, dma_in, info->input_len,
  127. CLASS_1 | KEY_DEST_CLASS_REG);
  128. /*!2. Fifostore to store protected key from class 1 key register. */
  129. if (info->pkey_info.key_enc_algo == CAAM_ENC_ALGO_CCM) {
  130. append_fifo_store(desc, dma_in, info->input_len,
  131. LDST_CLASS_1_CCB |
  132. FIFOST_TYPE_KEY_CCM_JKEK);
  133. } else {
  134. append_fifo_store(desc, dma_in, info->input_len,
  135. LDST_CLASS_1_CCB |
  136. FIFOST_TYPE_KEY_KEK);
  137. }
  138. /*
  139. * JUMP_OFFSET specifies the offset of the JUMP target from
  140. * the JUMP command's address in the descriptor buffer.
  141. */
  142. append_jump(desc, JUMP_COND_NOP | BIT(0) << JUMP_OFFSET_SHIFT);
  143. }
  144. /*!3. Load class 2 key with key modifier. */
  145. append_key_as_imm(desc, info->key_mod, info->key_mod_len,
  146. info->key_mod_len, CLASS_2 | KEY_DEST_CLASS_REG);
  147. /*!4. SEQ IN PTR Command. */
  148. append_seq_in_ptr(desc, dma_in, info->input_len, 0);
  149. /*!5. SEQ OUT PTR Command. */
  150. append_seq_out_ptr(desc, dma_out, output_len, 0);
  151. /*!6. Blob encapsulation/decapsulation PROTOCOL Command. */
  152. append_operation(desc, op);
  153. print_hex_dump_debug("data@" __stringify(__LINE__)": ",
  154. DUMP_PREFIX_ADDRESS, 16, 1, info->input,
  155. len, false);
  156. print_hex_dump_debug("jobdesc@" __stringify(__LINE__)": ",
  157. DUMP_PREFIX_ADDRESS, 16, 1, desc,
  158. desc_bytes(desc), false);
  159. testres.err = 0;
  160. init_completion(&testres.completion);
  161. ret = caam_jr_enqueue(jrdev, desc, caam_blob_job_done, &testres);
  162. if (ret == -EINPROGRESS) {
  163. wait_for_completion(&testres.completion);
  164. ret = testres.err;
  165. print_hex_dump_debug("output@" __stringify(__LINE__)": ",
  166. DUMP_PREFIX_ADDRESS, 16, 1, info->output,
  167. output_len, false);
  168. }
  169. if (ret == 0)
  170. info->output_len = output_len;
  171. dma_unmap_single(jrdev, dma_out, output_len, DMA_FROM_DEVICE);
  172. out_unmap_in:
  173. dma_unmap_single(jrdev, dma_in, len,
  174. encap ? DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
  175. out_free:
  176. kfree(desc);
  177. return ret;
  178. }
  179. EXPORT_SYMBOL(caam_process_blob);
  180. struct caam_blob_priv *caam_blob_gen_init(void)
  181. {
  182. struct caam_drv_private *ctrlpriv;
  183. struct device *jrdev;
  184. /*
  185. * caam_blob_gen_init() may expectedly fail with -ENODEV, e.g. when
  186. * CAAM driver didn't probe or when SoC lacks BLOB support. An
  187. * error would be harsh in this case, so we stick to info level.
  188. */
  189. jrdev = caam_jr_alloc();
  190. if (IS_ERR(jrdev)) {
  191. pr_info("job ring requested, but none currently available\n");
  192. return ERR_PTR(-ENODEV);
  193. }
  194. ctrlpriv = dev_get_drvdata(jrdev->parent);
  195. if (!ctrlpriv->blob_present) {
  196. dev_info(jrdev, "no hardware blob generation support\n");
  197. caam_jr_free(jrdev);
  198. return ERR_PTR(-ENODEV);
  199. }
  200. return container_of(jrdev, struct caam_blob_priv, jrdev);
  201. }
  202. EXPORT_SYMBOL(caam_blob_gen_init);
  203. void caam_blob_gen_exit(struct caam_blob_priv *priv)
  204. {
  205. caam_jr_free(&priv->jrdev);
  206. }
  207. EXPORT_SYMBOL(caam_blob_gen_exit);