clk.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * TI clock support
  4. *
  5. * Copyright (C) 2013 Texas Instruments, Inc.
  6. *
  7. * Tero Kristo <t-kristo@ti.com>
  8. */
  9. #include <linux/cleanup.h>
  10. #include <linux/clk.h>
  11. #include <linux/clk-provider.h>
  12. #include <linux/clkdev.h>
  13. #include <linux/clk/ti.h>
  14. #include <linux/io.h>
  15. #include <linux/of.h>
  16. #include <linux/of_address.h>
  17. #include <linux/list.h>
  18. #include <linux/minmax.h>
  19. #include <linux/regmap.h>
  20. #include <linux/string_helpers.h>
  21. #include <linux/memblock.h>
  22. #include <linux/device.h>
  23. #include "clock.h"
  24. #undef pr_fmt
  25. #define pr_fmt(fmt) "%s: " fmt, __func__
  26. static LIST_HEAD(clk_hw_omap_clocks);
  27. struct ti_clk_ll_ops *ti_clk_ll_ops;
  28. static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
  29. struct ti_clk_features ti_clk_features;
  30. struct clk_iomap {
  31. struct regmap *regmap;
  32. void __iomem *mem;
  33. };
  34. static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
  35. static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
  36. {
  37. struct clk_iomap *io = clk_memmaps[reg->index];
  38. if (reg->ptr)
  39. writel_relaxed(val, reg->ptr);
  40. else if (io->regmap)
  41. regmap_write(io->regmap, reg->offset, val);
  42. else
  43. writel_relaxed(val, io->mem + reg->offset);
  44. }
  45. static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
  46. {
  47. u32 v;
  48. v = readl_relaxed(ptr);
  49. v &= ~mask;
  50. v |= val;
  51. writel_relaxed(v, ptr);
  52. }
  53. static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
  54. {
  55. struct clk_iomap *io = clk_memmaps[reg->index];
  56. if (reg->ptr) {
  57. _clk_rmw(val, mask, reg->ptr);
  58. } else if (io->regmap) {
  59. regmap_update_bits(io->regmap, reg->offset, mask, val);
  60. } else {
  61. _clk_rmw(val, mask, io->mem + reg->offset);
  62. }
  63. }
  64. static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
  65. {
  66. u32 val;
  67. struct clk_iomap *io = clk_memmaps[reg->index];
  68. if (reg->ptr)
  69. val = readl_relaxed(reg->ptr);
  70. else if (io->regmap)
  71. regmap_read(io->regmap, reg->offset, &val);
  72. else
  73. val = readl_relaxed(io->mem + reg->offset);
  74. return val;
  75. }
  76. /**
  77. * ti_clk_setup_ll_ops - setup low level clock operations
  78. * @ops: low level clock ops descriptor
  79. *
  80. * Sets up low level clock operations for TI clock driver. This is used
  81. * to provide various callbacks for the clock driver towards platform
  82. * specific code. Returns 0 on success, -EBUSY if ll_ops have been
  83. * registered already.
  84. */
  85. int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
  86. {
  87. if (ti_clk_ll_ops) {
  88. pr_err("Attempt to register ll_ops multiple times.\n");
  89. return -EBUSY;
  90. }
  91. ti_clk_ll_ops = ops;
  92. ops->clk_readl = clk_memmap_readl;
  93. ops->clk_writel = clk_memmap_writel;
  94. ops->clk_rmw = clk_memmap_rmw;
  95. return 0;
  96. }
  97. /*
  98. * Eventually we could standardize to using '_' for clk-*.c files to follow the
  99. * TRM naming.
  100. */
  101. static struct device_node *ti_find_clock_provider(const char *name)
  102. {
  103. char *tmp __free(kfree) = NULL;
  104. struct device_node *np;
  105. char *p;
  106. tmp = kstrdup_and_replace(name, '-', '_', GFP_KERNEL);
  107. if (!tmp)
  108. return NULL;
  109. /* Ignore a possible address for the node name */
  110. p = strchr(tmp, '@');
  111. if (p)
  112. *p = '\0';
  113. /* Node named "clock" with "clock-output-names" */
  114. for_each_node_with_property(np, "clock-output-names") {
  115. if (of_property_match_string(np, "clock-output-names", tmp) == 0)
  116. return np;
  117. }
  118. /* Fall back to using old node name base provider name */
  119. return of_find_node_by_name(NULL, tmp);
  120. }
  121. /**
  122. * ti_dt_clocks_register - register DT alias clocks during boot
  123. * @oclks: list of clocks to register
  124. *
  125. * Register alias or non-standard DT clock entries during boot. By
  126. * default, DT clocks are found based on their clock-output-names
  127. * property, or the clock node name for legacy cases. If any
  128. * additional con-id / dev-id -> clock mapping is required, use this
  129. * function to list these.
  130. */
  131. void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
  132. {
  133. struct ti_dt_clk *c;
  134. struct device_node *node, *parent, *child;
  135. struct clk *clk;
  136. struct of_phandle_args clkspec;
  137. char buf[64];
  138. char *ptr;
  139. char *tags[2];
  140. int i;
  141. int num_args;
  142. int ret;
  143. static bool clkctrl_nodes_missing;
  144. static bool has_clkctrl_data;
  145. static bool compat_mode;
  146. compat_mode = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;
  147. for (c = oclks; c->node_name != NULL; c++) {
  148. strcpy(buf, c->node_name);
  149. ptr = buf;
  150. for (i = 0; i < 2; i++)
  151. tags[i] = NULL;
  152. num_args = 0;
  153. while (*ptr) {
  154. if (*ptr == ':') {
  155. if (num_args >= 2) {
  156. pr_warn("Bad number of tags on %s\n",
  157. c->node_name);
  158. return;
  159. }
  160. tags[num_args++] = ptr + 1;
  161. *ptr = 0;
  162. }
  163. ptr++;
  164. }
  165. if (num_args && clkctrl_nodes_missing)
  166. continue;
  167. node = ti_find_clock_provider(buf);
  168. if (num_args && compat_mode) {
  169. parent = node;
  170. child = of_get_child_by_name(parent, "clock");
  171. if (!child)
  172. child = of_get_child_by_name(parent, "clk");
  173. if (child) {
  174. of_node_put(parent);
  175. node = child;
  176. }
  177. }
  178. clkspec.np = node;
  179. clkspec.args_count = num_args;
  180. for (i = 0; i < num_args; i++) {
  181. ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
  182. if (ret) {
  183. pr_warn("Bad tag in %s at %d: %s\n",
  184. c->node_name, i, tags[i]);
  185. of_node_put(node);
  186. return;
  187. }
  188. }
  189. clk = of_clk_get_from_provider(&clkspec);
  190. of_node_put(node);
  191. if (!IS_ERR(clk)) {
  192. c->lk.clk = clk;
  193. clkdev_add(&c->lk);
  194. } else {
  195. if (num_args && !has_clkctrl_data) {
  196. struct device_node *np;
  197. np = of_find_compatible_node(NULL, NULL,
  198. "ti,clkctrl");
  199. if (np) {
  200. has_clkctrl_data = true;
  201. of_node_put(np);
  202. } else {
  203. clkctrl_nodes_missing = true;
  204. pr_warn("missing clkctrl nodes, please update your dts.\n");
  205. continue;
  206. }
  207. }
  208. pr_warn("failed to lookup clock node %s, ret=%ld\n",
  209. c->node_name, PTR_ERR(clk));
  210. }
  211. }
  212. }
  213. struct clk_init_item {
  214. struct device_node *node;
  215. void *user;
  216. ti_of_clk_init_cb_t func;
  217. struct list_head link;
  218. };
  219. static LIST_HEAD(retry_list);
  220. /**
  221. * ti_clk_retry_init - retries a failed clock init at later phase
  222. * @node: device node for the clock
  223. * @user: user data pointer
  224. * @func: init function to be called for the clock
  225. *
  226. * Adds a failed clock init to the retry list. The retry list is parsed
  227. * once all the other clocks have been initialized.
  228. */
  229. int __init ti_clk_retry_init(struct device_node *node, void *user,
  230. ti_of_clk_init_cb_t func)
  231. {
  232. struct clk_init_item *retry;
  233. pr_debug("%pOFn: adding to retry list...\n", node);
  234. retry = kzalloc_obj(*retry);
  235. if (!retry)
  236. return -ENOMEM;
  237. retry->node = node;
  238. retry->func = func;
  239. retry->user = user;
  240. list_add(&retry->link, &retry_list);
  241. return 0;
  242. }
  243. /**
  244. * ti_clk_get_reg_addr - get register address for a clock register
  245. * @node: device node for the clock
  246. * @index: register index from the clock node
  247. * @reg: pointer to target register struct
  248. *
  249. * Builds clock register address from device tree information, and returns
  250. * the data via the provided output pointer @reg. Returns 0 on success,
  251. * negative error value on failure.
  252. */
  253. int ti_clk_get_reg_addr(struct device_node *node, int index,
  254. struct clk_omap_reg *reg)
  255. {
  256. u32 clksel_addr, val;
  257. bool is_clksel = false;
  258. int i, err;
  259. for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
  260. if (clocks_node_ptr[i] == node->parent)
  261. break;
  262. if (clocks_node_ptr[i] == node->parent->parent)
  263. break;
  264. }
  265. if (i == CLK_MAX_MEMMAPS) {
  266. pr_err("clk-provider not found for %pOFn!\n", node);
  267. return -ENOENT;
  268. }
  269. reg->index = i;
  270. if (of_device_is_compatible(node->parent, "ti,clksel")) {
  271. err = of_property_read_u32_index(node->parent, "reg", index, &clksel_addr);
  272. if (err) {
  273. pr_err("%pOFn parent clksel must have reg[%d]!\n", node, index);
  274. return -EINVAL;
  275. }
  276. is_clksel = true;
  277. }
  278. err = of_property_read_u32_index(node, "reg", index, &val);
  279. if (err && is_clksel) {
  280. /* Legacy clksel with no reg and a possible ti,bit-shift property */
  281. reg->offset = clksel_addr;
  282. reg->bit = ti_clk_get_legacy_bit_shift(node);
  283. reg->ptr = NULL;
  284. return 0;
  285. }
  286. /* Updated clksel clock with a proper reg property */
  287. if (is_clksel) {
  288. reg->offset = clksel_addr;
  289. reg->bit = val;
  290. reg->ptr = NULL;
  291. return 0;
  292. }
  293. /* Other clocks that may or may not have ti,bit-shift property */
  294. reg->offset = val;
  295. reg->bit = ti_clk_get_legacy_bit_shift(node);
  296. reg->ptr = NULL;
  297. return 0;
  298. }
  299. /**
  300. * ti_clk_get_legacy_bit_shift - get bit shift for a clock register
  301. * @node: device node for the clock
  302. *
  303. * Gets the clock register bit shift using the legacy ti,bit-shift
  304. * property. Only needed for legacy clock, and can be eventually
  305. * dropped once all the composite clocks use a clksel node with a
  306. * proper reg property.
  307. */
  308. int ti_clk_get_legacy_bit_shift(struct device_node *node)
  309. {
  310. int err;
  311. u32 val;
  312. err = of_property_read_u32(node, "ti,bit-shift", &val);
  313. if (!err && in_range(val, 0, 32))
  314. return val;
  315. return 0;
  316. }
  317. void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
  318. {
  319. u32 latch;
  320. if (shift < 0)
  321. return;
  322. latch = 1 << shift;
  323. ti_clk_ll_ops->clk_rmw(latch, latch, reg);
  324. ti_clk_ll_ops->clk_rmw(0, latch, reg);
  325. ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
  326. }
  327. /**
  328. * omap2_clk_provider_init - init master clock provider
  329. * @parent: master node
  330. * @index: internal index for clk_reg_ops
  331. * @syscon: syscon regmap pointer for accessing clock registers
  332. * @mem: iomem pointer for the clock provider memory area, only used if
  333. * syscon is not provided
  334. *
  335. * Initializes a master clock IP block. This basically sets up the
  336. * mapping from clocks node to the memory map index. All the clocks
  337. * are then initialized through the common of_clk_init call, and the
  338. * clocks will access their memory maps based on the node layout.
  339. * Returns 0 in success.
  340. */
  341. int __init omap2_clk_provider_init(struct device_node *parent, int index,
  342. struct regmap *syscon, void __iomem *mem)
  343. {
  344. struct device_node *clocks;
  345. struct clk_iomap *io;
  346. /* get clocks for this parent */
  347. clocks = of_get_child_by_name(parent, "clocks");
  348. if (!clocks) {
  349. pr_err("%pOFn missing 'clocks' child node.\n", parent);
  350. return -EINVAL;
  351. }
  352. /* add clocks node info */
  353. clocks_node_ptr[index] = clocks;
  354. io = kzalloc_obj(*io);
  355. if (!io)
  356. return -ENOMEM;
  357. io->regmap = syscon;
  358. io->mem = mem;
  359. clk_memmaps[index] = io;
  360. return 0;
  361. }
  362. /**
  363. * omap2_clk_legacy_provider_init - initialize a legacy clock provider
  364. * @index: index for the clock provider
  365. * @mem: iomem pointer for the clock provider memory area
  366. *
  367. * Initializes a legacy clock provider memory mapping.
  368. */
  369. void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
  370. {
  371. struct clk_iomap *io;
  372. io = memblock_alloc_or_panic(sizeof(*io), SMP_CACHE_BYTES);
  373. io->mem = mem;
  374. clk_memmaps[index] = io;
  375. }
  376. /**
  377. * ti_dt_clk_init_retry_clks - init clocks from the retry list
  378. *
  379. * Initializes any clocks that have failed to initialize before,
  380. * reasons being missing parent node(s) during earlier init. This
  381. * typically happens only for DPLLs which need to have both of their
  382. * parent clocks ready during init.
  383. */
  384. void ti_dt_clk_init_retry_clks(void)
  385. {
  386. struct clk_init_item *retry;
  387. struct clk_init_item *tmp;
  388. int retries = 5;
  389. while (!list_empty(&retry_list) && retries) {
  390. list_for_each_entry_safe(retry, tmp, &retry_list, link) {
  391. pr_debug("retry-init: %pOFn\n", retry->node);
  392. retry->func(retry->user, retry->node);
  393. list_del(&retry->link);
  394. kfree(retry);
  395. }
  396. retries--;
  397. }
  398. }
  399. static const struct of_device_id simple_clk_match_table[] __initconst = {
  400. { .compatible = "fixed-clock" },
  401. { .compatible = "fixed-factor-clock" },
  402. { }
  403. };
  404. /**
  405. * ti_dt_clk_name - init clock name from first output name or node name
  406. * @np: device node
  407. *
  408. * Use the first clock-output-name for the clock name if found. Fall back
  409. * to legacy naming based on node name.
  410. */
  411. const char *ti_dt_clk_name(struct device_node *np)
  412. {
  413. const char *name;
  414. if (!of_property_read_string_index(np, "clock-output-names", 0,
  415. &name))
  416. return name;
  417. return np->name;
  418. }
  419. /**
  420. * ti_clk_add_aliases - setup clock aliases
  421. *
  422. * Sets up any missing clock aliases. No return value.
  423. */
  424. void __init ti_clk_add_aliases(void)
  425. {
  426. struct device_node *np;
  427. struct clk *clk;
  428. for_each_matching_node(np, simple_clk_match_table) {
  429. struct of_phandle_args clkspec;
  430. clkspec.np = np;
  431. clk = of_clk_get_from_provider(&clkspec);
  432. ti_clk_add_alias(clk, ti_dt_clk_name(np));
  433. }
  434. }
  435. /**
  436. * ti_clk_setup_features - setup clock features flags
  437. * @features: features definition to use
  438. *
  439. * Initializes the clock driver features flags based on platform
  440. * provided data. No return value.
  441. */
  442. void __init ti_clk_setup_features(struct ti_clk_features *features)
  443. {
  444. memcpy(&ti_clk_features, features, sizeof(*features));
  445. }
  446. /**
  447. * ti_clk_get_features - get clock driver features flags
  448. *
  449. * Get TI clock driver features description. Returns a pointer
  450. * to the current feature setup.
  451. */
  452. const struct ti_clk_features *ti_clk_get_features(void)
  453. {
  454. return &ti_clk_features;
  455. }
  456. /**
  457. * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
  458. * @clk_names: ptr to an array of strings of clock names to enable
  459. * @num_clocks: number of clock names in @clk_names
  460. *
  461. * Prepare and enable a list of clocks, named by @clk_names. No
  462. * return value. XXX Deprecated; only needed until these clocks are
  463. * properly claimed and enabled by the drivers or core code that uses
  464. * them. XXX What code disables & calls clk_put on these clocks?
  465. */
  466. void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
  467. {
  468. struct clk *init_clk;
  469. int i;
  470. for (i = 0; i < num_clocks; i++) {
  471. init_clk = clk_get(NULL, clk_names[i]);
  472. if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
  473. clk_names[i]))
  474. continue;
  475. clk_prepare_enable(init_clk);
  476. }
  477. }
  478. /**
  479. * ti_clk_add_alias - add a clock alias for a TI clock
  480. * @clk: clock handle to create alias for
  481. * @con: connection ID for this clock
  482. *
  483. * Creates a clock alias for a TI clock. Allocates the clock lookup entry
  484. * and assigns the data to it. Returns 0 if successful, negative error
  485. * value otherwise.
  486. */
  487. int ti_clk_add_alias(struct clk *clk, const char *con)
  488. {
  489. struct clk_lookup *cl;
  490. if (!clk)
  491. return 0;
  492. if (IS_ERR(clk))
  493. return PTR_ERR(clk);
  494. cl = kzalloc_obj(*cl);
  495. if (!cl)
  496. return -ENOMEM;
  497. cl->con_id = con;
  498. cl->clk = clk;
  499. clkdev_add(cl);
  500. return 0;
  501. }
  502. /**
  503. * of_ti_clk_register - register a TI clock to the common clock framework
  504. * @node: device node for this clock
  505. * @hw: hardware clock handle
  506. * @con: connection ID for this clock
  507. *
  508. * Registers a TI clock to the common clock framework, and adds a clock
  509. * alias for it. Returns a handle to the registered clock if successful,
  510. * ERR_PTR value in failure.
  511. */
  512. struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,
  513. const char *con)
  514. {
  515. struct clk *clk;
  516. int ret;
  517. ret = of_clk_hw_register(node, hw);
  518. if (ret)
  519. return ERR_PTR(ret);
  520. clk = hw->clk;
  521. ret = ti_clk_add_alias(clk, con);
  522. if (ret) {
  523. clk_unregister(clk);
  524. return ERR_PTR(ret);
  525. }
  526. return clk;
  527. }
  528. /**
  529. * of_ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework
  530. * @node: device node for this clock
  531. * @hw: hardware clock handle
  532. * @con: connection ID for this clock
  533. *
  534. * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias
  535. * for it, and adds the list to the available clk_hw_omap type clocks.
  536. * Returns a handle to the registered clock if successful, ERR_PTR value
  537. * in failure.
  538. */
  539. struct clk *of_ti_clk_register_omap_hw(struct device_node *node,
  540. struct clk_hw *hw, const char *con)
  541. {
  542. struct clk *clk;
  543. struct clk_hw_omap *oclk;
  544. clk = of_ti_clk_register(node, hw, con);
  545. if (IS_ERR(clk))
  546. return clk;
  547. oclk = to_clk_hw_omap(hw);
  548. list_add(&oclk->node, &clk_hw_omap_clocks);
  549. return clk;
  550. }
  551. /**
  552. * omap2_clk_for_each - call function for each registered clk_hw_omap
  553. * @fn: pointer to a callback function
  554. *
  555. * Call @fn for each registered clk_hw_omap, passing @hw to each
  556. * function. @fn must return 0 for success or any other value for
  557. * failure. If @fn returns non-zero, the iteration across clocks
  558. * will stop and the non-zero return value will be passed to the
  559. * caller of omap2_clk_for_each().
  560. */
  561. int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw))
  562. {
  563. int ret;
  564. struct clk_hw_omap *hw;
  565. list_for_each_entry(hw, &clk_hw_omap_clocks, node) {
  566. ret = (*fn)(hw);
  567. if (ret)
  568. break;
  569. }
  570. return ret;
  571. }
  572. /**
  573. * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock
  574. * @hw: clk_hw to check if it is an omap clock or not
  575. *
  576. * Checks if the provided clk_hw is OMAP clock or not. Returns true if
  577. * it is, false otherwise.
  578. */
  579. bool omap2_clk_is_hw_omap(struct clk_hw *hw)
  580. {
  581. struct clk_hw_omap *oclk;
  582. list_for_each_entry(oclk, &clk_hw_omap_clocks, node) {
  583. if (&oclk->hw == hw)
  584. return true;
  585. }
  586. return false;
  587. }