Kconfig 7.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config CLK_RENESAS
  3. bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
  4. default y if ARCH_RENESAS
  5. select CLK_EMEV2 if ARCH_EMEV2
  6. select CLK_RZA1 if ARCH_R7S72100
  7. select CLK_R7S9210 if ARCH_R7S9210
  8. select CLK_R8A73A4 if ARCH_R8A73A4
  9. select CLK_R8A7740 if ARCH_R8A7740
  10. select CLK_R8A7742 if ARCH_R8A7742
  11. select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744
  12. select CLK_R8A7745 if ARCH_R8A7745
  13. select CLK_R8A77470 if ARCH_R8A77470
  14. select CLK_R8A774A1 if ARCH_R8A774A1
  15. select CLK_R8A774B1 if ARCH_R8A774B1
  16. select CLK_R8A774C0 if ARCH_R8A774C0
  17. select CLK_R8A774E1 if ARCH_R8A774E1
  18. select CLK_R8A7778 if ARCH_R8A7778
  19. select CLK_R8A7779 if ARCH_R8A7779
  20. select CLK_R8A7790 if ARCH_R8A7790
  21. select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
  22. select CLK_R8A7792 if ARCH_R8A7792
  23. select CLK_R8A7794 if ARCH_R8A7794
  24. select CLK_R8A7795 if ARCH_R8A77951
  25. select CLK_R8A77960 if ARCH_R8A77960
  26. select CLK_R8A77961 if ARCH_R8A77961
  27. select CLK_R8A77965 if ARCH_R8A77965
  28. select CLK_R8A77970 if ARCH_R8A77970
  29. select CLK_R8A77980 if ARCH_R8A77980
  30. select CLK_R8A77990 if ARCH_R8A77990
  31. select CLK_R8A77995 if ARCH_R8A77995
  32. select CLK_R8A779A0 if ARCH_R8A779A0
  33. select CLK_R8A779F0 if ARCH_R8A779F0
  34. select CLK_R8A779G0 if ARCH_R8A779G0
  35. select CLK_R8A779H0 if ARCH_R8A779H0
  36. select CLK_R9A06G032 if ARCH_R9A06G032
  37. select CLK_R9A07G043 if ARCH_R9A07G043
  38. select CLK_R9A07G044 if ARCH_R9A07G044
  39. select CLK_R9A07G054 if ARCH_R9A07G054
  40. select CLK_R9A08G045 if ARCH_R9A08G045
  41. select CLK_R9A09G011 if ARCH_R9A09G011
  42. select CLK_R9A09G047 if ARCH_R9A09G047
  43. select CLK_R9A09G056 if ARCH_R9A09G056
  44. select CLK_R9A09G057 if ARCH_R9A09G057
  45. select CLK_R9A09G077 if ARCH_R9A09G077
  46. select CLK_R9A09G087 if ARCH_R9A09G087
  47. select CLK_SH73A0 if ARCH_SH73A0
  48. if CLK_RENESAS
  49. # SoC
  50. config CLK_EMEV2
  51. bool "Emma Mobile EV2 clock support" if COMPILE_TEST
  52. config CLK_RZA1
  53. bool "RZ/A1H clock support" if COMPILE_TEST
  54. select CLK_RENESAS_CPG_MSTP
  55. config CLK_R7S9210
  56. bool "RZ/A2 clock support" if COMPILE_TEST
  57. select CLK_RENESAS_CPG_MSSR
  58. config CLK_R8A73A4
  59. bool "R-Mobile APE6 clock support" if COMPILE_TEST
  60. select CLK_RENESAS_CPG_MSTP
  61. select CLK_RENESAS_DIV6
  62. config CLK_R8A7740
  63. bool "R-Mobile A1 clock support" if COMPILE_TEST
  64. select CLK_RENESAS_CPG_MSTP
  65. select CLK_RENESAS_DIV6
  66. config CLK_R8A7742
  67. bool "RZ/G1H clock support" if COMPILE_TEST
  68. select CLK_RCAR_GEN2_CPG
  69. config CLK_R8A7743
  70. bool "RZ/G1M clock support" if COMPILE_TEST
  71. select CLK_RCAR_GEN2_CPG
  72. config CLK_R8A7745
  73. bool "RZ/G1E clock support" if COMPILE_TEST
  74. select CLK_RCAR_GEN2_CPG
  75. config CLK_R8A77470
  76. bool "RZ/G1C clock support" if COMPILE_TEST
  77. select CLK_RCAR_GEN2_CPG
  78. config CLK_R8A774A1
  79. bool "RZ/G2M clock support" if COMPILE_TEST
  80. select CLK_RCAR_GEN3_CPG
  81. config CLK_R8A774B1
  82. bool "RZ/G2N clock support" if COMPILE_TEST
  83. select CLK_RCAR_GEN3_CPG
  84. config CLK_R8A774C0
  85. bool "RZ/G2E clock support" if COMPILE_TEST
  86. select CLK_RCAR_GEN3_CPG
  87. config CLK_R8A774E1
  88. bool "RZ/G2H clock support" if COMPILE_TEST
  89. select CLK_RCAR_GEN3_CPG
  90. config CLK_R8A7778
  91. bool "R-Car M1A clock support" if COMPILE_TEST
  92. select CLK_RENESAS_CPG_MSTP
  93. config CLK_R8A7779
  94. bool "R-Car H1 clock support" if COMPILE_TEST
  95. select CLK_RENESAS_CPG_MSTP
  96. config CLK_R8A7790
  97. bool "R-Car H2 clock support" if COMPILE_TEST
  98. select CLK_RCAR_GEN2_CPG
  99. config CLK_R8A7791
  100. bool "R-Car M2-W/N clock support" if COMPILE_TEST
  101. select CLK_RCAR_GEN2_CPG
  102. config CLK_R8A7792
  103. bool "R-Car V2H clock support" if COMPILE_TEST
  104. select CLK_RCAR_GEN2_CPG
  105. config CLK_R8A7794
  106. bool "R-Car E2 clock support" if COMPILE_TEST
  107. select CLK_RCAR_GEN2_CPG
  108. config CLK_R8A7795
  109. bool "R-Car H3 clock support" if COMPILE_TEST
  110. select CLK_RCAR_GEN3_CPG
  111. config CLK_R8A77960
  112. bool "R-Car M3-W clock support" if COMPILE_TEST
  113. select CLK_RCAR_GEN3_CPG
  114. config CLK_R8A77961
  115. bool "R-Car M3-W+ clock support" if COMPILE_TEST
  116. select CLK_RCAR_GEN3_CPG
  117. config CLK_R8A77965
  118. bool "R-Car M3-N clock support" if COMPILE_TEST
  119. select CLK_RCAR_GEN3_CPG
  120. config CLK_R8A77970
  121. bool "R-Car V3M clock support" if COMPILE_TEST
  122. select CLK_RCAR_GEN3_CPG
  123. config CLK_R8A77980
  124. bool "R-Car V3H clock support" if COMPILE_TEST
  125. select CLK_RCAR_GEN3_CPG
  126. config CLK_R8A77990
  127. bool "R-Car E3 clock support" if COMPILE_TEST
  128. select CLK_RCAR_GEN3_CPG
  129. config CLK_R8A77995
  130. bool "R-Car D3 clock support" if COMPILE_TEST
  131. select CLK_RCAR_GEN3_CPG
  132. config CLK_R8A779A0
  133. bool "R-Car V3U clock support" if COMPILE_TEST
  134. select CLK_RCAR_GEN4_CPG
  135. config CLK_R8A779F0
  136. bool "R-Car S4-8 clock support" if COMPILE_TEST
  137. select CLK_RCAR_GEN4_CPG
  138. config CLK_R8A779G0
  139. bool "R-Car V4H clock support" if COMPILE_TEST
  140. select CLK_RCAR_GEN4_CPG
  141. config CLK_R8A779H0
  142. bool "R-Car V4M clock support" if COMPILE_TEST
  143. select CLK_RCAR_GEN4_CPG
  144. config CLK_R9A06G032
  145. bool "RZ/N1D clock support" if COMPILE_TEST
  146. config CLK_R9A07G043
  147. bool "RZ/G2UL clock support" if COMPILE_TEST
  148. select CLK_RZG2L
  149. config CLK_R9A07G044
  150. bool "RZ/G2L clock support" if COMPILE_TEST
  151. select CLK_RZG2L
  152. config CLK_R9A07G054
  153. bool "RZ/V2L clock support" if COMPILE_TEST
  154. select CLK_RZG2L
  155. config CLK_R9A08G045
  156. bool "RZ/G3S clock support" if COMPILE_TEST
  157. select CLK_RZG2L
  158. config CLK_R9A09G011
  159. bool "RZ/V2M clock support" if COMPILE_TEST
  160. select CLK_RZG2L
  161. config CLK_R9A09G047
  162. bool "RZ/G3E clock support" if COMPILE_TEST
  163. select CLK_RZV2H
  164. config CLK_R9A09G056
  165. bool "RZ/V2N clock support" if COMPILE_TEST
  166. select CLK_RZV2H
  167. config CLK_R9A09G057
  168. bool "RZ/V2H(P) clock support" if COMPILE_TEST
  169. select CLK_RZV2H
  170. config CLK_R9A09G077
  171. bool "RZ/T2H clock support" if COMPILE_TEST
  172. select CLK_RENESAS_CPG_MSSR
  173. config CLK_R9A09G087
  174. bool "RZ/N2H clock support" if COMPILE_TEST
  175. select CLK_RENESAS_CPG_MSSR
  176. config CLK_SH73A0
  177. bool "SH-Mobile AG5 clock support" if COMPILE_TEST
  178. select CLK_RENESAS_CPG_MSTP
  179. select CLK_RENESAS_DIV6
  180. # Family
  181. config CLK_RCAR_CPG_LIB
  182. bool "CPG/MSSR library functions" if COMPILE_TEST
  183. config CLK_RCAR_GEN2_CPG
  184. bool "R-Car Gen2 CPG clock support" if COMPILE_TEST
  185. select CLK_RENESAS_CPG_MSSR
  186. config CLK_RCAR_GEN3_CPG
  187. bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST
  188. select CLK_RCAR_CPG_LIB
  189. select CLK_RENESAS_CPG_MSSR
  190. config CLK_RCAR_GEN4_CPG
  191. bool "R-Car Gen4 clock support" if COMPILE_TEST
  192. select CLK_RCAR_CPG_LIB
  193. select CLK_RENESAS_CPG_MSSR
  194. config CLK_RCAR_USB2_CLOCK_SEL
  195. bool "R-Car USB2 clock selector support"
  196. depends on ARCH_RENESAS || COMPILE_TEST
  197. select RESET_CONTROLLER
  198. help
  199. This is a driver for R-Car USB2 clock selector
  200. config CLK_RZG2L
  201. bool "RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST
  202. select RESET_CONTROLLER
  203. config CLK_RZV2H
  204. bool "RZ/{G3E,V2H(P)} family clock support" if COMPILE_TEST
  205. select RESET_CONTROLLER
  206. config CLK_RENESAS_VBATTB
  207. tristate "Renesas VBATTB clock controller"
  208. depends on ARCH_RZG2L || COMPILE_TEST
  209. select RESET_CONTROLLER
  210. # Generic
  211. config CLK_RENESAS_CPG_MSSR
  212. bool "CPG/MSSR clock support" if COMPILE_TEST
  213. select CLK_RENESAS_DIV6
  214. config CLK_RENESAS_CPG_MSTP
  215. bool "MSTP clock support" if COMPILE_TEST
  216. config CLK_RENESAS_DIV6
  217. bool "DIV6 clock support" if COMPILE_TEST
  218. endif # CLK_RENESAS