clk-mt8183-audio.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2018 MediaTek Inc.
  4. // Author: Weiyi Lu <weiyi.lu@mediatek.com>
  5. #include <linux/clk-provider.h>
  6. #include <linux/of_platform.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt8183-clk.h>
  11. static const struct mtk_gate_regs audio0_cg_regs = {
  12. .set_ofs = 0x0,
  13. .clr_ofs = 0x0,
  14. .sta_ofs = 0x0,
  15. };
  16. static const struct mtk_gate_regs audio1_cg_regs = {
  17. .set_ofs = 0x4,
  18. .clr_ofs = 0x4,
  19. .sta_ofs = 0x4,
  20. };
  21. #define GATE_AUDIO0(_id, _name, _parent, _shift) \
  22. GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \
  23. &mtk_clk_gate_ops_no_setclr)
  24. #define GATE_AUDIO1(_id, _name, _parent, _shift) \
  25. GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \
  26. &mtk_clk_gate_ops_no_setclr)
  27. static const struct mtk_gate audio_clks[] = {
  28. /* AUDIO0 */
  29. GATE_AUDIO0(CLK_AUDIO_AFE, "aud_afe", "audio_sel",
  30. 2),
  31. GATE_AUDIO0(CLK_AUDIO_22M, "aud_22m", "aud_eng1_sel",
  32. 8),
  33. GATE_AUDIO0(CLK_AUDIO_24M, "aud_24m", "aud_eng2_sel",
  34. 9),
  35. GATE_AUDIO0(CLK_AUDIO_APLL2_TUNER, "aud_apll2_tuner", "aud_eng2_sel",
  36. 18),
  37. GATE_AUDIO0(CLK_AUDIO_APLL_TUNER, "aud_apll_tuner", "aud_eng1_sel",
  38. 19),
  39. GATE_AUDIO0(CLK_AUDIO_TDM, "aud_tdm", "apll12_divb",
  40. 20),
  41. GATE_AUDIO0(CLK_AUDIO_ADC, "aud_adc", "audio_sel",
  42. 24),
  43. GATE_AUDIO0(CLK_AUDIO_DAC, "aud_dac", "audio_sel",
  44. 25),
  45. GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS, "aud_dac_predis", "audio_sel",
  46. 26),
  47. GATE_AUDIO0(CLK_AUDIO_TML, "aud_tml", "audio_sel",
  48. 27),
  49. /* AUDIO1 */
  50. GATE_AUDIO1(CLK_AUDIO_I2S1, "aud_i2s1", "audio_sel",
  51. 4),
  52. GATE_AUDIO1(CLK_AUDIO_I2S2, "aud_i2s2", "audio_sel",
  53. 5),
  54. GATE_AUDIO1(CLK_AUDIO_I2S3, "aud_i2s3", "audio_sel",
  55. 6),
  56. GATE_AUDIO1(CLK_AUDIO_I2S4, "aud_i2s4", "audio_sel",
  57. 7),
  58. GATE_AUDIO1(CLK_AUDIO_PDN_ADDA6_ADC, "aud_pdn_adda6_adc", "audio_sel",
  59. 20),
  60. };
  61. static const struct mtk_clk_desc audio_desc = {
  62. .clks = audio_clks,
  63. .num_clks = ARRAY_SIZE(audio_clks),
  64. };
  65. static int clk_mt8183_audio_probe(struct platform_device *pdev)
  66. {
  67. int r;
  68. r = mtk_clk_simple_probe(pdev);
  69. if (r)
  70. return r;
  71. r = devm_of_platform_populate(&pdev->dev);
  72. if (r)
  73. mtk_clk_simple_remove(pdev);
  74. return r;
  75. }
  76. static void clk_mt8183_audio_remove(struct platform_device *pdev)
  77. {
  78. of_platform_depopulate(&pdev->dev);
  79. mtk_clk_simple_remove(pdev);
  80. }
  81. static const struct of_device_id of_match_clk_mt8183_audio[] = {
  82. { .compatible = "mediatek,mt8183-audiosys", .data = &audio_desc },
  83. { /* sentinel */ }
  84. };
  85. MODULE_DEVICE_TABLE(of, of_match_clk_mt8183_audio);
  86. static struct platform_driver clk_mt8183_audio_drv = {
  87. .probe = clk_mt8183_audio_probe,
  88. .remove = clk_mt8183_audio_remove,
  89. .driver = {
  90. .name = "clk-mt8183-audio",
  91. .of_match_table = of_match_clk_mt8183_audio,
  92. },
  93. };
  94. module_platform_driver(clk_mt8183_audio_drv);
  95. MODULE_DESCRIPTION("MediaTek MT8183 audio clocks driver");
  96. MODULE_LICENSE("GPL");