Kconfig 18 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config HAVE_CLK
  3. bool
  4. help
  5. The <linux/clk.h> calls support software clock gating and
  6. thus are a key power management tool on many systems.
  7. config HAVE_CLK_PREPARE
  8. bool
  9. config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
  10. bool
  11. select HAVE_CLK
  12. help
  13. Select this option when the clock API in <linux/clk.h> is implemented
  14. by platform/architecture code. This method is deprecated. Modern
  15. code should select COMMON_CLK instead and not define a custom
  16. 'struct clk'.
  17. menuconfig COMMON_CLK
  18. bool "Common Clock Framework"
  19. depends on !HAVE_LEGACY_CLK
  20. select HAVE_CLK_PREPARE
  21. select HAVE_CLK
  22. select RATIONAL
  23. help
  24. The common clock framework is a single definition of struct
  25. clk, useful across many platforms, as well as an
  26. implementation of the clock API in include/linux/clk.h.
  27. Architectures utilizing the common struct clk should select
  28. this option.
  29. if COMMON_CLK
  30. config COMMON_CLK_WM831X
  31. tristate "Clock driver for WM831x/2x PMICs"
  32. depends on MFD_WM831X
  33. help
  34. Supports the clocking subsystem of the WM831x/2x series of
  35. PMICs from Wolfson Microelectronics.
  36. source "drivers/clk/versatile/Kconfig"
  37. config CLK_HSDK
  38. bool "PLL Driver for HSDK platform"
  39. depends on ARC_SOC_HSDK || COMPILE_TEST
  40. depends on HAS_IOMEM
  41. help
  42. This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
  43. control.
  44. config LMK04832
  45. tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
  46. depends on SPI
  47. select REGMAP_SPI
  48. help
  49. Say yes here to build support for Texas Instruments' LMK04832 Ultra
  50. Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
  51. config COMMON_CLK_APPLE_NCO
  52. tristate "Clock driver for Apple SoC NCOs"
  53. depends on ARCH_APPLE || COMPILE_TEST
  54. help
  55. This driver supports NCO (Numerically Controlled Oscillator) blocks
  56. found on Apple SoCs such as t8103 (M1). The blocks are typically
  57. generators of audio clocks.
  58. config COMMON_CLK_MAX77686
  59. tristate "Clock driver for Maxim 77620/77686/77802 MFD"
  60. depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
  61. help
  62. This driver supports Maxim 77620/77686/77802 crystal oscillator
  63. clock.
  64. config COMMON_CLK_MAX9485
  65. tristate "Maxim 9485 Programmable Clock Generator"
  66. depends on I2C
  67. help
  68. This driver supports Maxim 9485 Programmable Audio Clock Generator
  69. config COMMON_CLK_RK808
  70. tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
  71. depends on MFD_RK8XX
  72. help
  73. This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
  74. These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
  75. Clkout1 is always on, Clkout2 can off by control register.
  76. config COMMON_CLK_RP1
  77. tristate "Raspberry Pi RP1-based clock support"
  78. depends on MISC_RP1 || COMPILE_TEST
  79. default MISC_RP1
  80. help
  81. Enable common clock framework support for Raspberry Pi RP1.
  82. This multi-function device has 3 main PLLs and several clock
  83. generators to drive the internal sub-peripherals.
  84. config COMMON_CLK_HI655X
  85. tristate "Clock driver for Hi655x" if EXPERT
  86. depends on (MFD_HI655X_PMIC || COMPILE_TEST)
  87. select REGMAP
  88. default MFD_HI655X_PMIC
  89. help
  90. This driver supports the hi655x PMIC clock. This
  91. multi-function device has one fixed-rate oscillator, clocked
  92. at 32KHz.
  93. config COMMON_CLK_SCMI
  94. tristate "Clock driver controlled via SCMI interface"
  95. depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
  96. help
  97. This driver provides support for clocks that are controlled
  98. by firmware that implements the SCMI interface.
  99. This driver uses SCMI Message Protocol to interact with the
  100. firmware providing all the clock controls.
  101. config COMMON_CLK_SCPI
  102. tristate "Clock driver controlled via SCPI interface"
  103. depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
  104. help
  105. This driver provides support for clocks that are controlled
  106. by firmware that implements the SCPI interface.
  107. This driver uses SCPI Message Protocol to interact with the
  108. firmware providing all the clock controls.
  109. config COMMON_CLK_SI5341
  110. tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
  111. depends on I2C
  112. select REGMAP_I2C
  113. help
  114. This driver supports Silicon Labs Si5341 and Si5340 programmable clock
  115. generators. Not all features of these chips are currently supported
  116. by the driver, in particular it only supports XTAL input. The chip can
  117. be pre-programmed to support other configurations and features not yet
  118. implemented in the driver.
  119. config COMMON_CLK_SI5351
  120. tristate "Clock driver for SiLabs 5351A/B/C"
  121. depends on I2C
  122. select REGMAP_I2C
  123. help
  124. This driver supports Silicon Labs 5351A/B/C programmable clock
  125. generators.
  126. config COMMON_CLK_SI514
  127. tristate "Clock driver for SiLabs 514 devices"
  128. depends on I2C
  129. depends on OF
  130. select REGMAP_I2C
  131. help
  132. This driver supports the Silicon Labs 514 programmable clock
  133. generator.
  134. config COMMON_CLK_SI544
  135. tristate "Clock driver for SiLabs 544 devices"
  136. depends on I2C
  137. select REGMAP_I2C
  138. help
  139. This driver supports the Silicon Labs 544 programmable clock
  140. generator.
  141. config COMMON_CLK_SI570
  142. tristate "Clock driver for SiLabs 570 and compatible devices"
  143. depends on I2C
  144. depends on OF
  145. select REGMAP_I2C
  146. help
  147. This driver supports Silicon Labs 570/571/598/599 programmable
  148. clock generators.
  149. config COMMON_CLK_BM1880
  150. bool "Clock driver for Bitmain BM1880 SoC"
  151. depends on ARCH_BITMAIN || COMPILE_TEST
  152. default ARCH_BITMAIN
  153. help
  154. This driver supports the clocks on Bitmain BM1880 SoC.
  155. config COMMON_CLK_CDCE706
  156. tristate "Clock driver for TI CDCE706 clock synthesizer"
  157. depends on I2C
  158. select REGMAP_I2C
  159. help
  160. This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
  161. config COMMON_CLK_TPS68470
  162. tristate "Clock Driver for TI TPS68470 PMIC"
  163. depends on I2C
  164. depends on INTEL_SKL_INT3472 || COMPILE_TEST
  165. select REGMAP_I2C
  166. help
  167. This driver supports the clocks provided by the TPS68470 PMIC.
  168. config COMMON_CLK_CDCE925
  169. tristate "Clock driver for TI CDCE913/925/937/949 devices"
  170. depends on I2C
  171. depends on OF
  172. select REGMAP_I2C
  173. help
  174. This driver supports the TI CDCE913/925/937/949 programmable clock
  175. synthesizer. Each chip has different number of PLLs and outputs.
  176. For example, the CDCE925 contains two PLLs with spread-spectrum
  177. clocking support and five output dividers. The driver only supports
  178. the following setup, and uses a fixed setting for the output muxes.
  179. Y1 is derived from the input clock
  180. Y2 and Y3 derive from PLL1
  181. Y4 and Y5 derive from PLL2
  182. Given a target output frequency, the driver will set the PLL and
  183. divider to best approximate the desired output.
  184. config COMMON_CLK_CS2000_CP
  185. tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
  186. depends on I2C
  187. select REGMAP_I2C
  188. help
  189. If you say yes here you get support for the CS2000 clock multiplier.
  190. config COMMON_CLK_EN7523
  191. bool "Clock driver for Airoha EN7523 SoC system clocks"
  192. depends on OF
  193. depends on ARCH_AIROHA || COMPILE_TEST
  194. default ARCH_AIROHA
  195. help
  196. This driver provides the fixed clocks and gates present on Airoha
  197. ARM silicon.
  198. config COMMON_CLK_EP93XX
  199. tristate "Clock driver for Cirrus Logic ep93xx SoC"
  200. depends on ARCH_EP93XX || COMPILE_TEST
  201. select AUXILIARY_BUS
  202. select REGMAP_MMIO
  203. help
  204. This driver supports the SoC clocks on the Cirrus Logic ep93xx.
  205. config COMMON_CLK_EYEQ
  206. bool "Clock driver for the Mobileye EyeQ platform"
  207. depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST
  208. select AUXILIARY_BUS
  209. default MACH_EYEQ5 || MACH_EYEQ6H
  210. help
  211. This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H
  212. SoCs. Controllers live in shared register regions called OLB. Driver
  213. provides read-only PLLs, derived from the main crystal clock (which
  214. must be constant). It also exposes some divider clocks.
  215. config COMMON_CLK_FSL_FLEXSPI
  216. tristate "Clock driver for FlexSPI on Layerscape SoCs"
  217. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  218. default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
  219. help
  220. On Layerscape SoCs there is a special clock for the FlexSPI
  221. interface.
  222. config COMMON_CLK_FSL_SAI
  223. bool "Clock driver for BCLK of Freescale SAI cores"
  224. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  225. help
  226. This driver supports the Freescale SAI (Synchronous Audio Interface)
  227. to be used as a generic clock output. Some SoCs have restrictions
  228. regarding the possible pin multiplexer settings. Eg. on some SoCs
  229. two SAI interfaces can only be enabled together. If just one is
  230. needed, the BCLK pin of the second one can be used as general
  231. purpose clock output. Ideally, it can be used to drive an audio
  232. codec (sometimes known as MCLK).
  233. config COMMON_CLK_GEMINI
  234. bool "Clock driver for Cortina Systems Gemini SoC"
  235. depends on ARCH_GEMINI || COMPILE_TEST
  236. select MFD_SYSCON
  237. select RESET_CONTROLLER
  238. help
  239. This driver supports the SoC clocks on the Cortina Systems Gemini
  240. platform, also known as SL3516 or CS3516.
  241. config COMMON_CLK_LAN966X
  242. tristate "Generic Clock Controller driver for LAN966X SoC"
  243. depends on HAS_IOMEM
  244. depends on OF
  245. depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST
  246. help
  247. This driver provides support for Generic Clock Controller(GCK) on
  248. LAN966X SoC. GCK generates and supplies clock to various peripherals
  249. within the SoC.
  250. config COMMON_CLK_S2MPS11
  251. tristate "Clock driver for S2MPS1X/S5M8767 MFD"
  252. depends on MFD_SEC_CORE || COMPILE_TEST
  253. help
  254. This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
  255. clock. These multi-function devices have two (S2MPS14) or three
  256. (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
  257. config CLK_TWL
  258. tristate "Clock driver for the TWL PMIC family"
  259. depends on TWL4030_CORE
  260. help
  261. Enable support for controlling the clock resources on TWL family
  262. PMICs. These devices have some 32K clock outputs which can be
  263. controlled by software. For now, the TWL6032 and TWL6030 clocks are
  264. supported.
  265. config CLK_TWL6040
  266. tristate "External McPDM functional clock from twl6040"
  267. depends on TWL6040_CORE
  268. help
  269. Enable the external functional clock support on OMAP4+ platforms for
  270. McPDM. McPDM module is using the external bit clock on the McPDM bus
  271. as functional clock.
  272. config COMMON_CLK_AXI_CLKGEN
  273. tristate "AXI clkgen driver"
  274. depends on HAS_IOMEM || COMPILE_TEST
  275. depends on OF
  276. help
  277. Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
  278. FPGAs. It is commonly used in Analog Devices' reference designs.
  279. config CLK_QORIQ
  280. bool "Clock driver for Freescale QorIQ platforms"
  281. depends on OF
  282. depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
  283. help
  284. This adds the clock driver support for Freescale QorIQ platforms
  285. using common clock framework.
  286. config CLK_LS1028A_PLLDIG
  287. tristate "Clock driver for LS1028A Display output"
  288. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  289. default ARCH_LAYERSCAPE
  290. help
  291. This driver support the Display output interfaces(LCD, DPHY) pixel clocks
  292. of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
  293. features of the PLL are currently supported by the driver. By default,
  294. configured bypass mode with this PLL.
  295. config COMMON_CLK_XGENE
  296. bool "Clock driver for APM XGene SoC"
  297. default ARCH_XGENE
  298. depends on ARM64 || COMPILE_TEST
  299. help
  300. Support for the APM X-Gene SoC reference, PLL, and device clocks.
  301. config COMMON_CLK_LOCHNAGAR
  302. tristate "Cirrus Logic Lochnagar clock driver"
  303. depends on MFD_LOCHNAGAR
  304. help
  305. This driver supports the clocking features of the Cirrus Logic
  306. Lochnagar audio development board.
  307. config COMMON_CLK_NPCM8XX
  308. tristate "Clock driver for the NPCM8XX SoC Family"
  309. depends on ARCH_NPCM || COMPILE_TEST
  310. select AUXILIARY_BUS
  311. help
  312. This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family,
  313. all the clocks are initialized by the bootloader, so this driver
  314. allows only reading of current settings directly from the hardware.
  315. config COMMON_CLK_LOONGSON2
  316. bool "Clock driver for Loongson-2 SoC"
  317. depends on LOONGARCH || COMPILE_TEST
  318. help
  319. This driver provides support for clock controller on Loongson-2 SoC.
  320. The clock controller can generates and supplies clock to various
  321. peripherals within the SoC.
  322. Say Y here to support Loongson-2 SoC clock driver.
  323. config COMMON_CLK_NXP
  324. def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
  325. select REGMAP_MMIO if ARCH_LPC32XX
  326. select MFD_SYSCON if ARCH_LPC18XX
  327. help
  328. Support for clock providers on NXP platforms.
  329. config COMMON_CLK_PALMAS
  330. tristate "Clock driver for TI Palmas devices"
  331. depends on MFD_PALMAS
  332. help
  333. This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
  334. using common clock framework.
  335. config COMMON_CLK_PWM
  336. tristate "Clock driver for PWMs used as clock outputs"
  337. depends on PWM
  338. help
  339. Adapter driver so that any PWM output can be (mis)used as clock signal
  340. at 50% duty cycle.
  341. config COMMON_CLK_PXA
  342. def_bool COMMON_CLK && ARCH_PXA
  343. help
  344. Support for the Marvell PXA SoC.
  345. config COMMON_CLK_RS9_PCIE
  346. tristate "Clock driver for Renesas 9-series PCIe clock generators"
  347. depends on I2C
  348. depends on OF
  349. select REGMAP_I2C
  350. help
  351. This driver supports the Renesas 9-series PCIe clock generator
  352. models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
  353. config COMMON_CLK_SI521XX
  354. tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
  355. depends on I2C
  356. depends on OF
  357. select REGMAP_I2C
  358. help
  359. This driver supports the SkyWorks Si521xx PCIe clock generator
  360. models Si52144/Si52146/Si52147.
  361. config COMMON_CLK_VC3
  362. tristate "Clock driver for Renesas VersaClock 3 devices"
  363. depends on I2C
  364. depends on OF
  365. select REGMAP_I2C
  366. help
  367. This driver supports the Renesas VersaClock 3 programmable clock
  368. generators.
  369. config COMMON_CLK_VC5
  370. tristate "Clock driver for IDT VersaClock 5,6 devices"
  371. depends on I2C
  372. depends on OF
  373. select REGMAP_I2C
  374. help
  375. This driver supports the IDT VersaClock 5 and VersaClock 6
  376. programmable clock generators.
  377. config COMMON_CLK_VC7
  378. tristate "Clock driver for Renesas Versaclock 7 devices"
  379. depends on I2C
  380. depends on OF
  381. select REGMAP_I2C
  382. help
  383. Renesas Versaclock7 is a family of configurable clock generator
  384. and jitter attenuator ICs with fractional and integer dividers.
  385. config COMMON_CLK_STM32F
  386. def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
  387. help
  388. Support for stm32f4 and stm32f7 SoC families clocks
  389. config COMMON_CLK_STM32H7
  390. def_bool COMMON_CLK && MACH_STM32H743
  391. help
  392. Support for stm32h7 SoC family clocks
  393. config COMMON_CLK_MMP2
  394. def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
  395. help
  396. Support for Marvell MMP2 and MMP3 SoC clocks
  397. config COMMON_CLK_MMP2_AUDIO
  398. tristate "Clock driver for MMP2 Audio subsystem"
  399. depends on COMMON_CLK_MMP2 || COMPILE_TEST
  400. help
  401. This driver supports clocks for Audio subsystem on MMP2 SoC.
  402. config COMMON_CLK_BD718XX
  403. tristate "Clock driver for 32K clk gates on ROHM PMICs"
  404. depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
  405. help
  406. This driver supports ROHM BD71837, BD71847, BD71850, BD71815,
  407. BD71828, and BD72720 PMICs clock gates.
  408. config COMMON_CLK_FIXED_MMIO
  409. bool "Clock driver for Memory Mapped Fixed values"
  410. depends on COMMON_CLK && OF
  411. depends on HAS_IOMEM
  412. help
  413. Support for Memory Mapped IO Fixed clocks
  414. config COMMON_CLK_K210
  415. bool "Clock driver for the Canaan Kendryte K210 SoC"
  416. depends on OF && RISCV && SOC_CANAAN_K210
  417. default SOC_CANAAN_K210
  418. help
  419. Support for the Canaan Kendryte K210 RISC-V SoC clocks.
  420. config COMMON_CLK_SP7021
  421. tristate "Clock driver for Sunplus SP7021 SoC"
  422. depends on SOC_SP7021 || COMPILE_TEST
  423. default SOC_SP7021
  424. help
  425. This driver supports the Sunplus SP7021 SoC clocks.
  426. It implements SP7021 PLLs/gate.
  427. Not all features of the PLL are currently supported
  428. by the driver.
  429. config COMMON_CLK_RPMI
  430. tristate "Clock driver based on RISC-V RPMI"
  431. depends on RISCV || COMPILE_TEST
  432. depends on MAILBOX
  433. default RISCV
  434. help
  435. Support for clocks based on the clock service group defined by
  436. the RISC-V platform management interface (RPMI) specification.
  437. source "drivers/clk/actions/Kconfig"
  438. source "drivers/clk/analogbits/Kconfig"
  439. source "drivers/clk/aspeed/Kconfig"
  440. source "drivers/clk/baikal-t1/Kconfig"
  441. source "drivers/clk/bcm/Kconfig"
  442. source "drivers/clk/hisilicon/Kconfig"
  443. source "drivers/clk/imgtec/Kconfig"
  444. source "drivers/clk/imx/Kconfig"
  445. source "drivers/clk/ingenic/Kconfig"
  446. source "drivers/clk/keystone/Kconfig"
  447. source "drivers/clk/mediatek/Kconfig"
  448. source "drivers/clk/mmp/Kconfig"
  449. source "drivers/clk/meson/Kconfig"
  450. source "drivers/clk/mstar/Kconfig"
  451. source "drivers/clk/microchip/Kconfig"
  452. source "drivers/clk/mvebu/Kconfig"
  453. source "drivers/clk/nuvoton/Kconfig"
  454. source "drivers/clk/pistachio/Kconfig"
  455. source "drivers/clk/qcom/Kconfig"
  456. source "drivers/clk/ralink/Kconfig"
  457. source "drivers/clk/renesas/Kconfig"
  458. source "drivers/clk/rockchip/Kconfig"
  459. source "drivers/clk/samsung/Kconfig"
  460. source "drivers/clk/sifive/Kconfig"
  461. source "drivers/clk/socfpga/Kconfig"
  462. source "drivers/clk/sophgo/Kconfig"
  463. source "drivers/clk/spacemit/Kconfig"
  464. source "drivers/clk/sprd/Kconfig"
  465. source "drivers/clk/starfive/Kconfig"
  466. source "drivers/clk/sunxi/Kconfig"
  467. source "drivers/clk/sunxi-ng/Kconfig"
  468. source "drivers/clk/tegra/Kconfig"
  469. source "drivers/clk/thead/Kconfig"
  470. source "drivers/clk/stm32/Kconfig"
  471. source "drivers/clk/ti/Kconfig"
  472. source "drivers/clk/uniphier/Kconfig"
  473. source "drivers/clk/visconti/Kconfig"
  474. source "drivers/clk/x86/Kconfig"
  475. source "drivers/clk/xilinx/Kconfig"
  476. source "drivers/clk/zynqmp/Kconfig"
  477. # Kunit test cases
  478. config CLK_KUNIT_TEST
  479. tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
  480. depends on KUNIT
  481. default KUNIT_ALL_TESTS
  482. select DTC
  483. help
  484. Kunit tests for the common clock framework.
  485. config CLK_FIXED_RATE_KUNIT_TEST
  486. tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS
  487. depends on KUNIT
  488. default KUNIT_ALL_TESTS
  489. select DTC
  490. help
  491. KUnit tests for the basic fixed rate clk type.
  492. config CLK_GATE_KUNIT_TEST
  493. tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
  494. depends on KUNIT
  495. depends on !S390
  496. default KUNIT_ALL_TESTS
  497. help
  498. Kunit test for the basic clk gate type.
  499. config CLK_FD_KUNIT_TEST
  500. tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS
  501. depends on KUNIT
  502. default KUNIT_ALL_TESTS
  503. help
  504. Kunit test for the clk-fractional-divider type.
  505. endif