tpm_i2c_nuvoton.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /******************************************************************************
  3. * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
  4. * based on the TCG TPM Interface Spec version 1.2.
  5. * Specifications at www.trustedcomputinggroup.org
  6. *
  7. * Copyright (C) 2011, Nuvoton Technology Corporation.
  8. * Dan Morav <dan.morav@nuvoton.com>
  9. * Copyright (C) 2013, Obsidian Research Corp.
  10. * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
  11. *
  12. * Nuvoton contact information: APC.Support@nuvoton.com
  13. *****************************************************************************/
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/slab.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/wait.h>
  20. #include <linux/i2c.h>
  21. #include <linux/of.h>
  22. #include <linux/property.h>
  23. #include "tpm.h"
  24. /* I2C interface offsets */
  25. #define TPM_STS 0x00
  26. #define TPM_BURST_COUNT 0x01
  27. #define TPM_DATA_FIFO_W 0x20
  28. #define TPM_DATA_FIFO_R 0x40
  29. #define TPM_VID_DID_RID 0x60
  30. #define TPM_I2C_RETRIES 5
  31. /*
  32. * I2C bus device maximum buffer size w/o counting I2C address or command
  33. * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
  34. */
  35. #define TPM_I2C_MAX_BUF_SIZE 32
  36. #define TPM_I2C_RETRY_COUNT 32
  37. #define TPM_I2C_BUS_DELAY 1000 /* usec */
  38. #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
  39. #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
  40. #define TPM_I2C_DELAY_RANGE 300 /* usec */
  41. #define OF_IS_TPM2 ((void *)1)
  42. #define I2C_IS_TPM2 1
  43. struct priv_data {
  44. int irq;
  45. unsigned int intrs;
  46. wait_queue_head_t read_queue;
  47. };
  48. static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
  49. u8 *data)
  50. {
  51. s32 status;
  52. status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
  53. dev_dbg(&client->dev,
  54. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  55. offset, size, (int)size, data, status);
  56. return status;
  57. }
  58. static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
  59. u8 *data)
  60. {
  61. s32 status;
  62. status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
  63. dev_dbg(&client->dev,
  64. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  65. offset, size, (int)size, data, status);
  66. return status;
  67. }
  68. #define TPM_STS_VALID 0x80
  69. #define TPM_STS_COMMAND_READY 0x40
  70. #define TPM_STS_GO 0x20
  71. #define TPM_STS_DATA_AVAIL 0x10
  72. #define TPM_STS_EXPECT 0x08
  73. #define TPM_STS_RESPONSE_RETRY 0x02
  74. #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
  75. #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
  76. #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
  77. /* read TPM_STS register */
  78. static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
  79. {
  80. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  81. s32 status;
  82. u8 data;
  83. status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
  84. if (status <= 0) {
  85. dev_err(&chip->dev, "%s() error return %d\n", __func__,
  86. status);
  87. data = TPM_STS_ERR_VAL;
  88. }
  89. return data;
  90. }
  91. /* write byte to TPM_STS register */
  92. static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
  93. {
  94. s32 status;
  95. int i;
  96. /* this causes the current command to be aborted */
  97. for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
  98. status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
  99. if (status < 0)
  100. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  101. + TPM_I2C_DELAY_RANGE);
  102. }
  103. return status;
  104. }
  105. /* write commandReady to TPM_STS register */
  106. static void i2c_nuvoton_ready(struct tpm_chip *chip)
  107. {
  108. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  109. s32 status;
  110. /* this causes the current command to be aborted */
  111. status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
  112. if (status < 0)
  113. dev_err(&chip->dev,
  114. "%s() fail to write TPM_STS.commandReady\n", __func__);
  115. }
  116. /* read burstCount field from TPM_STS register
  117. * return -1 on fail to read */
  118. static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
  119. struct tpm_chip *chip)
  120. {
  121. unsigned long stop = jiffies + chip->timeout_d;
  122. s32 status;
  123. int burst_count = -1;
  124. u8 data;
  125. /* wait for burstcount to be non-zero */
  126. do {
  127. /* in I2C burstCount is 1 byte */
  128. status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
  129. &data);
  130. if (status > 0 && data > 0) {
  131. burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
  132. break;
  133. }
  134. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  135. + TPM_I2C_DELAY_RANGE);
  136. } while (time_before(jiffies, stop));
  137. return burst_count;
  138. }
  139. /*
  140. * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
  141. * any call to this function which is not waiting for dataAvail will
  142. * set queue to NULL to avoid waiting for interrupt
  143. */
  144. static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
  145. {
  146. u8 status = i2c_nuvoton_read_status(chip);
  147. return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
  148. }
  149. static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
  150. u32 timeout, wait_queue_head_t *queue)
  151. {
  152. if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
  153. s32 rc;
  154. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  155. unsigned int cur_intrs = priv->intrs;
  156. enable_irq(priv->irq);
  157. rc = wait_event_interruptible_timeout(*queue,
  158. cur_intrs != priv->intrs,
  159. timeout);
  160. if (rc > 0)
  161. return 0;
  162. /* At this point we know that the SINT pin is asserted, so we
  163. * do not need to do i2c_nuvoton_check_status */
  164. } else {
  165. unsigned long ten_msec, stop;
  166. bool status_valid;
  167. /* check current status */
  168. status_valid = i2c_nuvoton_check_status(chip, mask, value);
  169. if (status_valid)
  170. return 0;
  171. /* use polling to wait for the event */
  172. ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
  173. stop = jiffies + timeout;
  174. do {
  175. if (time_before(jiffies, ten_msec))
  176. usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
  177. TPM_I2C_RETRY_DELAY_SHORT
  178. + TPM_I2C_DELAY_RANGE);
  179. else
  180. usleep_range(TPM_I2C_RETRY_DELAY_LONG,
  181. TPM_I2C_RETRY_DELAY_LONG
  182. + TPM_I2C_DELAY_RANGE);
  183. status_valid = i2c_nuvoton_check_status(chip, mask,
  184. value);
  185. if (status_valid)
  186. return 0;
  187. } while (time_before(jiffies, stop));
  188. }
  189. dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
  190. value);
  191. return -ETIMEDOUT;
  192. }
  193. /* wait for dataAvail field to be set in the TPM_STS register */
  194. static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
  195. wait_queue_head_t *queue)
  196. {
  197. return i2c_nuvoton_wait_for_stat(chip,
  198. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  199. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  200. timeout, queue);
  201. }
  202. /* Read @count bytes into @buf from TPM_RD_FIFO register */
  203. static int i2c_nuvoton_recv_data(struct i2c_client *client,
  204. struct tpm_chip *chip, u8 *buf, size_t count)
  205. {
  206. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  207. s32 rc;
  208. int burst_count, bytes2read, size = 0;
  209. while (size < count &&
  210. i2c_nuvoton_wait_for_data_avail(chip,
  211. chip->timeout_c,
  212. &priv->read_queue) == 0) {
  213. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  214. if (burst_count < 0) {
  215. dev_err(&chip->dev,
  216. "%s() fail to read burstCount=%d\n", __func__,
  217. burst_count);
  218. return -EIO;
  219. }
  220. bytes2read = min_t(size_t, burst_count, count - size);
  221. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
  222. bytes2read, &buf[size]);
  223. if (rc < 0) {
  224. dev_err(&chip->dev,
  225. "%s() fail on i2c_nuvoton_read_buf()=%d\n",
  226. __func__, rc);
  227. return -EIO;
  228. }
  229. dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
  230. size += bytes2read;
  231. }
  232. return size;
  233. }
  234. /* Read TPM command results */
  235. static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  236. {
  237. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  238. struct device *dev = chip->dev.parent;
  239. struct i2c_client *client = to_i2c_client(dev);
  240. s32 rc;
  241. int status;
  242. int burst_count;
  243. int retries;
  244. int size = 0;
  245. u32 expected;
  246. if (count < TPM_HEADER_SIZE) {
  247. i2c_nuvoton_ready(chip); /* return to idle */
  248. dev_err(dev, "%s() count < header size\n", __func__);
  249. return -EIO;
  250. }
  251. for (retries = 0; retries < TPM_I2C_RETRIES; retries++) {
  252. if (retries > 0) {
  253. /* if this is not the first trial, set responseRetry */
  254. i2c_nuvoton_write_status(client,
  255. TPM_STS_RESPONSE_RETRY);
  256. }
  257. /*
  258. * read first available (> 10 bytes), including:
  259. * tag, paramsize, and result
  260. */
  261. status = i2c_nuvoton_wait_for_data_avail(
  262. chip, chip->timeout_c, &priv->read_queue);
  263. if (status != 0) {
  264. dev_err(dev, "%s() timeout on dataAvail\n", __func__);
  265. size = -ETIMEDOUT;
  266. continue;
  267. }
  268. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  269. if (burst_count < 0) {
  270. dev_err(dev, "%s() fail to get burstCount\n", __func__);
  271. size = -EIO;
  272. continue;
  273. }
  274. size = i2c_nuvoton_recv_data(client, chip, buf,
  275. burst_count);
  276. if (size < TPM_HEADER_SIZE) {
  277. dev_err(dev, "%s() fail to read header\n", __func__);
  278. size = -EIO;
  279. continue;
  280. }
  281. /*
  282. * convert number of expected bytes field from big endian 32 bit
  283. * to machine native
  284. */
  285. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  286. if (expected > count || expected < size) {
  287. dev_err(dev, "%s() expected > count\n", __func__);
  288. size = -EIO;
  289. continue;
  290. }
  291. rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
  292. expected - size);
  293. size += rc;
  294. if (rc < 0 || size < expected) {
  295. dev_err(dev, "%s() fail to read remainder of result\n",
  296. __func__);
  297. size = -EIO;
  298. continue;
  299. }
  300. if (i2c_nuvoton_wait_for_stat(
  301. chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
  302. TPM_STS_VALID, chip->timeout_c,
  303. NULL)) {
  304. dev_err(dev, "%s() error left over data\n", __func__);
  305. size = -ETIMEDOUT;
  306. continue;
  307. }
  308. break;
  309. }
  310. i2c_nuvoton_ready(chip);
  311. dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
  312. return size;
  313. }
  314. /*
  315. * Send TPM command.
  316. *
  317. * If interrupts are used (signaled by an irq set in the vendor structure)
  318. * tpm.c can skip polling for the data to be available as the interrupt is
  319. * waited for here
  320. */
  321. static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz,
  322. size_t len)
  323. {
  324. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  325. struct device *dev = chip->dev.parent;
  326. struct i2c_client *client = to_i2c_client(dev);
  327. u32 ordinal;
  328. unsigned long duration;
  329. size_t count = 0;
  330. int burst_count, bytes2write, retries, rc = -EIO;
  331. for (retries = 0; retries < TPM_RETRY; retries++) {
  332. i2c_nuvoton_ready(chip);
  333. if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
  334. TPM_STS_COMMAND_READY,
  335. chip->timeout_b, NULL)) {
  336. dev_err(dev, "%s() timeout on commandReady\n",
  337. __func__);
  338. rc = -EIO;
  339. continue;
  340. }
  341. rc = 0;
  342. while (count < len - 1) {
  343. burst_count = i2c_nuvoton_get_burstcount(client,
  344. chip);
  345. if (burst_count < 0) {
  346. dev_err(dev, "%s() fail get burstCount\n",
  347. __func__);
  348. rc = -EIO;
  349. break;
  350. }
  351. bytes2write = min_t(size_t, burst_count,
  352. len - 1 - count);
  353. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
  354. bytes2write, &buf[count]);
  355. if (rc < 0) {
  356. dev_err(dev, "%s() fail i2cWriteBuf\n",
  357. __func__);
  358. break;
  359. }
  360. dev_dbg(dev, "%s(%d):", __func__, bytes2write);
  361. count += bytes2write;
  362. rc = i2c_nuvoton_wait_for_stat(chip,
  363. TPM_STS_VALID |
  364. TPM_STS_EXPECT,
  365. TPM_STS_VALID |
  366. TPM_STS_EXPECT,
  367. chip->timeout_c,
  368. NULL);
  369. if (rc < 0) {
  370. dev_err(dev, "%s() timeout on Expect\n",
  371. __func__);
  372. rc = -ETIMEDOUT;
  373. break;
  374. }
  375. }
  376. if (rc < 0)
  377. continue;
  378. /* write last byte */
  379. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
  380. &buf[count]);
  381. if (rc < 0) {
  382. dev_err(dev, "%s() fail to write last byte\n",
  383. __func__);
  384. rc = -EIO;
  385. continue;
  386. }
  387. dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
  388. rc = i2c_nuvoton_wait_for_stat(chip,
  389. TPM_STS_VALID | TPM_STS_EXPECT,
  390. TPM_STS_VALID,
  391. chip->timeout_c, NULL);
  392. if (rc) {
  393. dev_err(dev, "%s() timeout on Expect to clear\n",
  394. __func__);
  395. rc = -ETIMEDOUT;
  396. continue;
  397. }
  398. break;
  399. }
  400. if (rc < 0) {
  401. /* retries == TPM_RETRY */
  402. i2c_nuvoton_ready(chip);
  403. return rc;
  404. }
  405. /* execute the TPM command */
  406. rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
  407. if (rc < 0) {
  408. dev_err(dev, "%s() fail to write Go\n", __func__);
  409. i2c_nuvoton_ready(chip);
  410. return rc;
  411. }
  412. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  413. duration = tpm_calc_ordinal_duration(chip, ordinal);
  414. rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue);
  415. if (rc) {
  416. dev_err(dev, "%s() timeout command duration %ld\n",
  417. __func__, duration);
  418. i2c_nuvoton_ready(chip);
  419. return rc;
  420. }
  421. dev_dbg(dev, "%s() -> %zd\n", __func__, len);
  422. return 0;
  423. }
  424. static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
  425. {
  426. return (status == TPM_STS_COMMAND_READY);
  427. }
  428. static const struct tpm_class_ops tpm_i2c = {
  429. .flags = TPM_OPS_AUTO_STARTUP,
  430. .status = i2c_nuvoton_read_status,
  431. .recv = i2c_nuvoton_recv,
  432. .send = i2c_nuvoton_send,
  433. .cancel = i2c_nuvoton_ready,
  434. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  435. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  436. .req_canceled = i2c_nuvoton_req_canceled,
  437. };
  438. /* The only purpose for the handler is to signal to any waiting threads that
  439. * the interrupt is currently being asserted. The driver does not do any
  440. * processing triggered by interrupts, and the chip provides no way to mask at
  441. * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
  442. * this means it cannot be shared. */
  443. static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
  444. {
  445. struct tpm_chip *chip = dev_id;
  446. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  447. priv->intrs++;
  448. wake_up(&priv->read_queue);
  449. disable_irq_nosync(priv->irq);
  450. return IRQ_HANDLED;
  451. }
  452. static int get_vid(struct i2c_client *client, u32 *res)
  453. {
  454. static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
  455. u32 temp;
  456. s32 rc;
  457. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  458. return -ENODEV;
  459. rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
  460. if (rc < 0)
  461. return rc;
  462. /* check WPCT301 values - ignore RID */
  463. if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
  464. /*
  465. * f/w rev 2.81 has an issue where the VID_DID_RID is not
  466. * reporting the right value. so give it another chance at
  467. * offset 0x20 (FIFO_W).
  468. */
  469. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
  470. (u8 *) (&temp));
  471. if (rc < 0)
  472. return rc;
  473. /* check WPCT301 values - ignore RID */
  474. if (memcmp(&temp, vid_did_rid_value,
  475. sizeof(vid_did_rid_value)))
  476. return -ENODEV;
  477. }
  478. *res = temp;
  479. return 0;
  480. }
  481. static int i2c_nuvoton_probe(struct i2c_client *client)
  482. {
  483. int rc;
  484. struct tpm_chip *chip;
  485. struct device *dev = &client->dev;
  486. struct priv_data *priv;
  487. u32 vid = 0;
  488. rc = get_vid(client, &vid);
  489. if (rc)
  490. return rc;
  491. dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
  492. (u8) (vid >> 16), (u8) (vid >> 24));
  493. chip = tpmm_chip_alloc(dev, &tpm_i2c);
  494. if (IS_ERR(chip))
  495. return PTR_ERR(chip);
  496. priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
  497. if (!priv)
  498. return -ENOMEM;
  499. if (i2c_get_match_data(client))
  500. chip->flags |= TPM_CHIP_FLAG_TPM2;
  501. init_waitqueue_head(&priv->read_queue);
  502. /* Default timeouts */
  503. chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  504. chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
  505. chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  506. chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  507. dev_set_drvdata(&chip->dev, priv);
  508. /*
  509. * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
  510. * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
  511. * The IRQ should be set in the i2c_board_info (which is done
  512. * automatically in of_i2c_register_devices, for device tree users */
  513. priv->irq = client->irq;
  514. if (client->irq) {
  515. dev_dbg(dev, "%s() priv->irq\n", __func__);
  516. rc = devm_request_irq(dev, client->irq,
  517. i2c_nuvoton_int_handler,
  518. IRQF_TRIGGER_LOW,
  519. dev_name(&chip->dev),
  520. chip);
  521. if (rc) {
  522. dev_err(dev, "%s() Unable to request irq: %d for use\n",
  523. __func__, priv->irq);
  524. priv->irq = 0;
  525. } else {
  526. chip->flags |= TPM_CHIP_FLAG_IRQ;
  527. /* Clear any pending interrupt */
  528. i2c_nuvoton_ready(chip);
  529. /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
  530. rc = i2c_nuvoton_wait_for_stat(chip,
  531. TPM_STS_COMMAND_READY,
  532. TPM_STS_COMMAND_READY,
  533. chip->timeout_b,
  534. NULL);
  535. if (rc == 0) {
  536. /*
  537. * TIS is in ready state
  538. * write dummy byte to enter reception state
  539. * TPM_DATA_FIFO_W <- rc (0)
  540. */
  541. rc = i2c_nuvoton_write_buf(client,
  542. TPM_DATA_FIFO_W,
  543. 1, (u8 *) (&rc));
  544. if (rc < 0)
  545. return rc;
  546. /* TPM_STS <- 0x40 (commandReady) */
  547. i2c_nuvoton_ready(chip);
  548. } else {
  549. /*
  550. * timeout_b reached - command was
  551. * aborted. TIS should now be in idle state -
  552. * only TPM_STS_VALID should be set
  553. */
  554. if (i2c_nuvoton_read_status(chip) !=
  555. TPM_STS_VALID)
  556. return -EIO;
  557. }
  558. }
  559. }
  560. return tpm_chip_register(chip);
  561. }
  562. static void i2c_nuvoton_remove(struct i2c_client *client)
  563. {
  564. struct tpm_chip *chip = i2c_get_clientdata(client);
  565. tpm_chip_unregister(chip);
  566. }
  567. static const struct i2c_device_id i2c_nuvoton_id[] = {
  568. {"tpm_i2c_nuvoton"},
  569. {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
  570. {}
  571. };
  572. MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
  573. #ifdef CONFIG_OF
  574. static const struct of_device_id i2c_nuvoton_of_match[] = {
  575. {.compatible = "nuvoton,npct501"},
  576. {.compatible = "winbond,wpct301"},
  577. {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
  578. {},
  579. };
  580. MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
  581. #endif
  582. static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
  583. static struct i2c_driver i2c_nuvoton_driver = {
  584. .id_table = i2c_nuvoton_id,
  585. .probe = i2c_nuvoton_probe,
  586. .remove = i2c_nuvoton_remove,
  587. .driver = {
  588. .name = "tpm_i2c_nuvoton",
  589. .pm = &i2c_nuvoton_pm_ops,
  590. .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
  591. },
  592. };
  593. module_i2c_driver(i2c_nuvoton_driver);
  594. MODULE_AUTHOR("Dan Morav <dan.morav@nuvoton.com>");
  595. MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
  596. MODULE_LICENSE("GPL");