tpm_crb.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2014 Intel Corporation
  4. *
  5. * Authors:
  6. * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
  7. *
  8. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  9. *
  10. * This device driver implements the TPM interface as defined in
  11. * the TCG CRB 2.0 TPM specification.
  12. */
  13. #include <linux/acpi.h>
  14. #include <linux/highmem.h>
  15. #include <linux/rculist.h>
  16. #include <linux/module.h>
  17. #include <linux/pm_runtime.h>
  18. #ifdef CONFIG_ARM64
  19. #include <linux/arm-smccc.h>
  20. #endif
  21. #include "tpm_crb_ffa.h"
  22. #include "tpm.h"
  23. #define ACPI_SIG_TPM2 "TPM2"
  24. #define TPM_CRB_MAX_RESOURCES 3
  25. static const guid_t crb_acpi_start_guid =
  26. GUID_INIT(0x6BBF6CAB, 0x5463, 0x4714,
  27. 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4);
  28. enum crb_defaults {
  29. CRB_ACPI_START_REVISION_ID = 1,
  30. CRB_ACPI_START_INDEX = 1,
  31. };
  32. enum crb_loc_ctrl {
  33. CRB_LOC_CTRL_REQUEST_ACCESS = BIT(0),
  34. CRB_LOC_CTRL_RELINQUISH = BIT(1),
  35. };
  36. enum crb_loc_state {
  37. CRB_LOC_STATE_LOC_ASSIGNED = BIT(1),
  38. CRB_LOC_STATE_TPM_REG_VALID_STS = BIT(7),
  39. };
  40. enum crb_ctrl_req {
  41. CRB_CTRL_REQ_CMD_READY = BIT(0),
  42. CRB_CTRL_REQ_GO_IDLE = BIT(1),
  43. };
  44. enum crb_ctrl_sts {
  45. CRB_CTRL_STS_ERROR = BIT(0),
  46. CRB_CTRL_STS_TPM_IDLE = BIT(1),
  47. };
  48. enum crb_start {
  49. CRB_START_INVOKE = BIT(0),
  50. };
  51. enum crb_cancel {
  52. CRB_CANCEL_INVOKE = BIT(0),
  53. };
  54. struct crb_regs_head {
  55. u32 loc_state;
  56. u32 reserved1;
  57. u32 loc_ctrl;
  58. u32 loc_sts;
  59. u8 reserved2[32];
  60. u64 intf_id;
  61. u64 ctrl_ext;
  62. } __packed;
  63. struct crb_regs_tail {
  64. u32 ctrl_req;
  65. u32 ctrl_sts;
  66. u32 ctrl_cancel;
  67. u32 ctrl_start;
  68. u32 ctrl_int_enable;
  69. u32 ctrl_int_sts;
  70. u32 ctrl_cmd_size;
  71. u32 ctrl_cmd_pa_low;
  72. u32 ctrl_cmd_pa_high;
  73. u32 ctrl_rsp_size;
  74. u64 ctrl_rsp_pa;
  75. } __packed;
  76. enum crb_status {
  77. CRB_DRV_STS_COMPLETE = BIT(0),
  78. };
  79. struct crb_priv {
  80. u32 sm;
  81. const char *hid;
  82. struct crb_regs_head __iomem *regs_h;
  83. struct crb_regs_tail __iomem *regs_t;
  84. u8 __iomem *cmd;
  85. u8 __iomem *rsp;
  86. u32 cmd_size;
  87. u32 smc_func_id;
  88. u32 __iomem *pluton_start_addr;
  89. u32 __iomem *pluton_reply_addr;
  90. u8 ffa_flags;
  91. u8 ffa_attributes;
  92. };
  93. struct tpm2_crb_smc {
  94. u32 interrupt;
  95. u8 interrupt_flags;
  96. u8 op_flags;
  97. u16 reserved2;
  98. u32 smc_func_id;
  99. };
  100. /* CRB over FFA start method parameters in TCG2 ACPI table */
  101. struct tpm2_crb_ffa {
  102. u8 flags;
  103. u8 attributes;
  104. u16 partition_id;
  105. u8 reserved[8];
  106. };
  107. struct tpm2_crb_pluton {
  108. u64 start_addr;
  109. u64 reply_addr;
  110. };
  111. /*
  112. * Returns true if the start method supports idle.
  113. */
  114. static inline bool tpm_crb_has_idle(u32 start_method)
  115. {
  116. return !(start_method == ACPI_TPM2_START_METHOD ||
  117. start_method == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD ||
  118. start_method == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC);
  119. }
  120. static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value,
  121. unsigned long timeout)
  122. {
  123. ktime_t start;
  124. ktime_t stop;
  125. start = ktime_get();
  126. stop = ktime_add(start, ms_to_ktime(timeout));
  127. do {
  128. if ((ioread32(reg) & mask) == value)
  129. return true;
  130. usleep_range(50, 100);
  131. } while (ktime_before(ktime_get(), stop));
  132. return ((ioread32(reg) & mask) == value);
  133. }
  134. static int crb_try_pluton_doorbell(struct crb_priv *priv, bool wait_for_complete)
  135. {
  136. if (priv->sm != ACPI_TPM2_COMMAND_BUFFER_WITH_PLUTON)
  137. return 0;
  138. if (!crb_wait_for_reg_32(priv->pluton_reply_addr, ~0, 1, TPM2_TIMEOUT_C))
  139. return -ETIME;
  140. iowrite32(1, priv->pluton_start_addr);
  141. if (wait_for_complete == false)
  142. return 0;
  143. if (!crb_wait_for_reg_32(priv->pluton_start_addr,
  144. 0xffffffff, 0, 200))
  145. return -ETIME;
  146. return 0;
  147. }
  148. /**
  149. * __crb_go_idle - request tpm crb device to go the idle state
  150. *
  151. * @dev: crb device
  152. * @priv: crb private data
  153. * @loc: locality
  154. *
  155. * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ
  156. * The device should respond within TIMEOUT_C by clearing the bit.
  157. * Anyhow, we do not wait here as a consequent CMD_READY request
  158. * will be handled correctly even if idle was not completed.
  159. *
  160. * The function does nothing for devices with ACPI-start method
  161. * or SMC-start method.
  162. *
  163. * Return: 0 always
  164. */
  165. static int __crb_go_idle(struct device *dev, struct crb_priv *priv, int loc)
  166. {
  167. int rc;
  168. if (!tpm_crb_has_idle(priv->sm))
  169. return 0;
  170. iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req);
  171. if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  172. rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_COMMAND, loc);
  173. if (rc)
  174. return rc;
  175. }
  176. rc = crb_try_pluton_doorbell(priv, true);
  177. if (rc)
  178. return rc;
  179. if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
  180. CRB_CTRL_REQ_GO_IDLE/* mask */,
  181. 0, /* value */
  182. TPM2_TIMEOUT_C)) {
  183. dev_warn(dev, "goIdle timed out\n");
  184. return -ETIME;
  185. }
  186. return 0;
  187. }
  188. static int crb_go_idle(struct tpm_chip *chip)
  189. {
  190. struct device *dev = &chip->dev;
  191. struct crb_priv *priv = dev_get_drvdata(dev);
  192. return __crb_go_idle(dev, priv, chip->locality);
  193. }
  194. /**
  195. * __crb_cmd_ready - request tpm crb device to enter ready state
  196. *
  197. * @dev: crb device
  198. * @priv: crb private data
  199. * @loc: locality
  200. *
  201. * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ
  202. * and poll till the device acknowledge it by clearing the bit.
  203. * The device should respond within TIMEOUT_C.
  204. *
  205. * The function does nothing for devices with ACPI-start method
  206. * or SMC-start method.
  207. *
  208. * Return: 0 on success -ETIME on timeout;
  209. */
  210. static int __crb_cmd_ready(struct device *dev, struct crb_priv *priv, int loc)
  211. {
  212. int rc;
  213. if (!tpm_crb_has_idle(priv->sm))
  214. return 0;
  215. iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req);
  216. if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  217. rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_COMMAND, loc);
  218. if (rc)
  219. return rc;
  220. }
  221. rc = crb_try_pluton_doorbell(priv, true);
  222. if (rc)
  223. return rc;
  224. if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
  225. CRB_CTRL_REQ_CMD_READY /* mask */,
  226. 0, /* value */
  227. TPM2_TIMEOUT_C)) {
  228. dev_warn(dev, "cmdReady timed out\n");
  229. return -ETIME;
  230. }
  231. return 0;
  232. }
  233. static int crb_cmd_ready(struct tpm_chip *chip)
  234. {
  235. struct device *dev = &chip->dev;
  236. struct crb_priv *priv = dev_get_drvdata(dev);
  237. return __crb_cmd_ready(dev, priv, chip->locality);
  238. }
  239. static int __crb_request_locality(struct device *dev,
  240. struct crb_priv *priv, int loc)
  241. {
  242. u32 value = CRB_LOC_STATE_LOC_ASSIGNED | CRB_LOC_STATE_TPM_REG_VALID_STS;
  243. int rc;
  244. if (!priv->regs_h)
  245. return 0;
  246. iowrite32(CRB_LOC_CTRL_REQUEST_ACCESS, &priv->regs_h->loc_ctrl);
  247. if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  248. rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_LOCALITY_REQUEST, loc);
  249. if (rc)
  250. return rc;
  251. }
  252. if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, value, value,
  253. TPM2_TIMEOUT_C)) {
  254. dev_warn(dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
  255. return -ETIME;
  256. }
  257. return 0;
  258. }
  259. static int crb_request_locality(struct tpm_chip *chip, int loc)
  260. {
  261. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  262. return __crb_request_locality(&chip->dev, priv, loc);
  263. }
  264. static int __crb_relinquish_locality(struct device *dev,
  265. struct crb_priv *priv, int loc)
  266. {
  267. u32 mask = CRB_LOC_STATE_LOC_ASSIGNED | CRB_LOC_STATE_TPM_REG_VALID_STS;
  268. u32 value = CRB_LOC_STATE_TPM_REG_VALID_STS;
  269. int rc;
  270. if (!priv->regs_h)
  271. return 0;
  272. iowrite32(CRB_LOC_CTRL_RELINQUISH, &priv->regs_h->loc_ctrl);
  273. if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  274. rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_LOCALITY_REQUEST, loc);
  275. if (rc)
  276. return rc;
  277. }
  278. if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, mask, value,
  279. TPM2_TIMEOUT_C)) {
  280. dev_warn(dev, "TPM_LOC_STATE_x.Relinquish timed out\n");
  281. return -ETIME;
  282. }
  283. return 0;
  284. }
  285. static int crb_relinquish_locality(struct tpm_chip *chip, int loc)
  286. {
  287. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  288. return __crb_relinquish_locality(&chip->dev, priv, loc);
  289. }
  290. static u8 crb_status(struct tpm_chip *chip)
  291. {
  292. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  293. u8 sts = 0;
  294. if ((ioread32(&priv->regs_t->ctrl_start) & CRB_START_INVOKE) !=
  295. CRB_START_INVOKE)
  296. sts |= CRB_DRV_STS_COMPLETE;
  297. return sts;
  298. }
  299. static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  300. {
  301. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  302. unsigned int expected;
  303. /* A sanity check that the upper layer wants to get at least the header
  304. * as that is the minimum size for any TPM response.
  305. */
  306. if (count < TPM_HEADER_SIZE)
  307. return -EIO;
  308. /* If this bit is set, according to the spec, the TPM is in
  309. * unrecoverable condition.
  310. */
  311. if (ioread32(&priv->regs_t->ctrl_sts) & CRB_CTRL_STS_ERROR)
  312. return -EIO;
  313. /* Read the first 8 bytes in order to get the length of the response.
  314. * We read exactly a quad word in order to make sure that the remaining
  315. * reads will be aligned.
  316. */
  317. memcpy_fromio(buf, priv->rsp, 8);
  318. expected = be32_to_cpup((__be32 *)&buf[2]);
  319. if (expected > count || expected < TPM_HEADER_SIZE)
  320. return -EIO;
  321. memcpy_fromio(&buf[8], &priv->rsp[8], expected - 8);
  322. return expected;
  323. }
  324. static int crb_do_acpi_start(struct tpm_chip *chip)
  325. {
  326. union acpi_object *obj;
  327. int rc;
  328. obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
  329. &crb_acpi_start_guid,
  330. CRB_ACPI_START_REVISION_ID,
  331. CRB_ACPI_START_INDEX,
  332. NULL);
  333. if (!obj)
  334. return -ENXIO;
  335. rc = obj->integer.value == 0 ? 0 : -ENXIO;
  336. ACPI_FREE(obj);
  337. return rc;
  338. }
  339. #ifdef CONFIG_ARM64
  340. /*
  341. * This is a TPM Command Response Buffer start method that invokes a
  342. * Secure Monitor Call to request the firmware to execute or cancel
  343. * a TPM 2.0 command.
  344. */
  345. static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
  346. {
  347. struct arm_smccc_res res;
  348. arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res);
  349. if (res.a0 != 0) {
  350. dev_err(dev,
  351. FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n",
  352. res.a0);
  353. return -EIO;
  354. }
  355. return 0;
  356. }
  357. #else
  358. static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
  359. {
  360. dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n");
  361. return -EINVAL;
  362. }
  363. #endif
  364. static int crb_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz, size_t len)
  365. {
  366. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  367. int rc = 0;
  368. /* Zero the cancel register so that the next command will not get
  369. * canceled.
  370. */
  371. iowrite32(0, &priv->regs_t->ctrl_cancel);
  372. if (len > priv->cmd_size) {
  373. dev_err(&chip->dev, "invalid command count value %zd %d\n",
  374. len, priv->cmd_size);
  375. return -E2BIG;
  376. }
  377. /* Seems to be necessary for every command */
  378. if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_PLUTON)
  379. __crb_cmd_ready(&chip->dev, priv, chip->locality);
  380. memcpy_toio(priv->cmd, buf, len);
  381. /* Make sure that cmd is populated before issuing start. */
  382. wmb();
  383. /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
  384. * report only ACPI start but in practice seems to require both
  385. * CRB start, hence invoking CRB start method if hid == MSFT0101.
  386. */
  387. if (priv->sm == ACPI_TPM2_COMMAND_BUFFER ||
  388. priv->sm == ACPI_TPM2_MEMORY_MAPPED ||
  389. !strcmp(priv->hid, "MSFT0101"))
  390. iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
  391. if (priv->sm == ACPI_TPM2_START_METHOD ||
  392. priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)
  393. rc = crb_do_acpi_start(chip);
  394. if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
  395. iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
  396. rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id);
  397. }
  398. if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  399. iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
  400. rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_COMMAND, chip->locality);
  401. }
  402. if (rc)
  403. return rc;
  404. return crb_try_pluton_doorbell(priv, false);
  405. }
  406. static void crb_cancel(struct tpm_chip *chip)
  407. {
  408. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  409. int rc;
  410. iowrite32(CRB_CANCEL_INVOKE, &priv->regs_t->ctrl_cancel);
  411. if ((priv->sm == ACPI_TPM2_START_METHOD ||
  412. priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) &&
  413. crb_do_acpi_start(chip))
  414. dev_err(&chip->dev, "ACPI Start failed\n");
  415. if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  416. rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_COMMAND, chip->locality);
  417. if (rc)
  418. dev_err(&chip->dev, "FF-A Start failed\n");
  419. }
  420. }
  421. static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
  422. {
  423. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  424. u32 cancel = ioread32(&priv->regs_t->ctrl_cancel);
  425. return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
  426. }
  427. static const struct tpm_class_ops tpm_crb = {
  428. .flags = TPM_OPS_AUTO_STARTUP,
  429. .status = crb_status,
  430. .recv = crb_recv,
  431. .send = crb_send,
  432. .cancel = crb_cancel,
  433. .req_canceled = crb_req_canceled,
  434. .go_idle = crb_go_idle,
  435. .cmd_ready = crb_cmd_ready,
  436. .request_locality = crb_request_locality,
  437. .relinquish_locality = crb_relinquish_locality,
  438. .req_complete_mask = CRB_DRV_STS_COMPLETE,
  439. .req_complete_val = CRB_DRV_STS_COMPLETE,
  440. };
  441. static int crb_check_resource(struct acpi_resource *ares, void *data)
  442. {
  443. struct resource *iores_array = data;
  444. struct resource_win win;
  445. struct resource *res = &(win.res);
  446. int i;
  447. if (acpi_dev_resource_memory(ares, res) ||
  448. acpi_dev_resource_address_space(ares, &win)) {
  449. for (i = 0; i < TPM_CRB_MAX_RESOURCES + 1; ++i) {
  450. if (resource_type(iores_array + i) != IORESOURCE_MEM) {
  451. iores_array[i] = *res;
  452. iores_array[i].name = NULL;
  453. break;
  454. }
  455. }
  456. }
  457. return 1;
  458. }
  459. static void __iomem *crb_map_res(struct device *dev, struct resource *iores,
  460. void __iomem **iobase_ptr, u64 start, u32 size)
  461. {
  462. struct resource new_res = {
  463. .start = start,
  464. .end = start + size - 1,
  465. .flags = IORESOURCE_MEM,
  466. };
  467. /* Detect a 64 bit address on a 32 bit system */
  468. if (start != new_res.start)
  469. return IOMEM_ERR_PTR(-EINVAL);
  470. if (!iores)
  471. return devm_ioremap_resource(dev, &new_res);
  472. if (!*iobase_ptr) {
  473. *iobase_ptr = devm_ioremap_resource(dev, iores);
  474. if (IS_ERR(*iobase_ptr))
  475. return *iobase_ptr;
  476. }
  477. return *iobase_ptr + (new_res.start - iores->start);
  478. }
  479. /*
  480. * Work around broken BIOSs that return inconsistent values from the ACPI
  481. * region vs the registers. Trust the ACPI region. Such broken systems
  482. * probably cannot send large TPM commands since the buffer will be truncated.
  483. */
  484. static u64 crb_fixup_cmd_size(struct device *dev, struct resource *io_res,
  485. u64 start, u64 size)
  486. {
  487. if (io_res->start > start || io_res->end < start)
  488. return size;
  489. if (start + size - 1 <= io_res->end)
  490. return size;
  491. dev_err(dev,
  492. FW_BUG "ACPI region does not cover the entire command/response buffer. %pr vs %llx %llx\n",
  493. io_res, start, size);
  494. return io_res->end - start + 1;
  495. }
  496. static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
  497. struct acpi_table_tpm2 *buf)
  498. {
  499. struct list_head acpi_resource_list;
  500. struct resource iores_array[TPM_CRB_MAX_RESOURCES + 1] = { {0} };
  501. void __iomem *iobase_array[TPM_CRB_MAX_RESOURCES] = {NULL};
  502. struct device *dev = &device->dev;
  503. struct resource *iores;
  504. void __iomem **iobase_ptr;
  505. int i;
  506. u32 pa_high, pa_low;
  507. u64 cmd_pa;
  508. u32 cmd_size;
  509. __le64 __rsp_pa;
  510. u64 rsp_pa;
  511. u32 rsp_size;
  512. int ret;
  513. /*
  514. * Pluton sometimes does not define ACPI memory regions.
  515. * Mapping is then done in crb_map_pluton
  516. */
  517. if (priv->sm != ACPI_TPM2_COMMAND_BUFFER_WITH_PLUTON) {
  518. INIT_LIST_HEAD(&acpi_resource_list);
  519. ret = acpi_dev_get_resources(device, &acpi_resource_list,
  520. crb_check_resource, iores_array);
  521. if (ret < 0)
  522. return ret;
  523. acpi_dev_free_resource_list(&acpi_resource_list);
  524. if (resource_type(iores_array) != IORESOURCE_MEM) {
  525. dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n");
  526. return -EINVAL;
  527. } else if (resource_type(iores_array + TPM_CRB_MAX_RESOURCES) ==
  528. IORESOURCE_MEM) {
  529. dev_warn(dev, "TPM2 ACPI table defines too many memory resources\n");
  530. memset(iores_array + TPM_CRB_MAX_RESOURCES,
  531. 0, sizeof(*iores_array));
  532. iores_array[TPM_CRB_MAX_RESOURCES].flags = 0;
  533. }
  534. }
  535. iores = NULL;
  536. iobase_ptr = NULL;
  537. for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
  538. if (buf->control_address >= iores_array[i].start &&
  539. buf->control_address + sizeof(struct crb_regs_tail) - 1 <=
  540. iores_array[i].end) {
  541. iores = iores_array + i;
  542. iobase_ptr = iobase_array + i;
  543. break;
  544. }
  545. }
  546. priv->regs_t = crb_map_res(dev, iores, iobase_ptr, buf->control_address,
  547. sizeof(struct crb_regs_tail));
  548. if (IS_ERR(priv->regs_t))
  549. return PTR_ERR(priv->regs_t);
  550. /* The ACPI IO region starts at the head area and continues to include
  551. * the control area, as one nice sane region except for some older
  552. * stuff that puts the control area outside the ACPI IO region.
  553. */
  554. if (priv->sm == ACPI_TPM2_COMMAND_BUFFER ||
  555. priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA ||
  556. priv->sm == ACPI_TPM2_MEMORY_MAPPED) {
  557. if (iores &&
  558. buf->control_address == iores->start +
  559. sizeof(*priv->regs_h))
  560. priv->regs_h = *iobase_ptr;
  561. else
  562. dev_warn(dev, FW_BUG "Bad ACPI memory layout");
  563. }
  564. ret = __crb_request_locality(dev, priv, 0);
  565. if (ret)
  566. return ret;
  567. /*
  568. * PTT HW bug w/a: wake up the device to access
  569. * possibly not retained registers.
  570. */
  571. ret = __crb_cmd_ready(dev, priv, 0);
  572. if (ret)
  573. goto out_relinquish_locality;
  574. pa_high = ioread32(&priv->regs_t->ctrl_cmd_pa_high);
  575. pa_low = ioread32(&priv->regs_t->ctrl_cmd_pa_low);
  576. cmd_pa = ((u64)pa_high << 32) | pa_low;
  577. cmd_size = ioread32(&priv->regs_t->ctrl_cmd_size);
  578. iores = NULL;
  579. iobase_ptr = NULL;
  580. for (i = 0; iores_array[i].end; ++i) {
  581. if (cmd_pa >= iores_array[i].start &&
  582. cmd_pa <= iores_array[i].end) {
  583. iores = iores_array + i;
  584. iobase_ptr = iobase_array + i;
  585. break;
  586. }
  587. }
  588. if (iores)
  589. cmd_size = crb_fixup_cmd_size(dev, iores, cmd_pa, cmd_size);
  590. dev_dbg(dev, "cmd_hi = %X cmd_low = %X cmd_size %X\n",
  591. pa_high, pa_low, cmd_size);
  592. priv->cmd = crb_map_res(dev, iores, iobase_ptr, cmd_pa, cmd_size);
  593. if (IS_ERR(priv->cmd)) {
  594. ret = PTR_ERR(priv->cmd);
  595. goto out;
  596. }
  597. memcpy_fromio(&__rsp_pa, &priv->regs_t->ctrl_rsp_pa, 8);
  598. rsp_pa = le64_to_cpu(__rsp_pa);
  599. rsp_size = ioread32(&priv->regs_t->ctrl_rsp_size);
  600. iores = NULL;
  601. iobase_ptr = NULL;
  602. for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
  603. if (rsp_pa >= iores_array[i].start &&
  604. rsp_pa <= iores_array[i].end) {
  605. iores = iores_array + i;
  606. iobase_ptr = iobase_array + i;
  607. break;
  608. }
  609. }
  610. if (iores)
  611. rsp_size = crb_fixup_cmd_size(dev, iores, rsp_pa, rsp_size);
  612. if (cmd_pa != rsp_pa) {
  613. priv->rsp = crb_map_res(dev, iores, iobase_ptr,
  614. rsp_pa, rsp_size);
  615. ret = PTR_ERR_OR_ZERO(priv->rsp);
  616. goto out;
  617. }
  618. /* According to the PTP specification, overlapping command and response
  619. * buffer sizes must be identical.
  620. */
  621. if (cmd_size != rsp_size) {
  622. dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical");
  623. ret = -EINVAL;
  624. goto out;
  625. }
  626. priv->rsp = priv->cmd;
  627. out:
  628. if (!ret)
  629. priv->cmd_size = cmd_size;
  630. __crb_go_idle(dev, priv, 0);
  631. out_relinquish_locality:
  632. __crb_relinquish_locality(dev, priv, 0);
  633. return ret;
  634. }
  635. static int crb_map_pluton(struct device *dev, struct crb_priv *priv,
  636. struct acpi_table_tpm2 *buf, struct tpm2_crb_pluton *crb_pluton)
  637. {
  638. priv->pluton_start_addr = crb_map_res(dev, NULL, NULL,
  639. crb_pluton->start_addr, 4);
  640. if (IS_ERR(priv->pluton_start_addr))
  641. return PTR_ERR(priv->pluton_start_addr);
  642. priv->pluton_reply_addr = crb_map_res(dev, NULL, NULL,
  643. crb_pluton->reply_addr, 4);
  644. if (IS_ERR(priv->pluton_reply_addr))
  645. return PTR_ERR(priv->pluton_reply_addr);
  646. return 0;
  647. }
  648. static int crb_acpi_add(struct acpi_device *device)
  649. {
  650. struct acpi_table_tpm2 *buf;
  651. struct crb_priv *priv;
  652. struct tpm_chip *chip;
  653. struct device *dev = &device->dev;
  654. struct tpm2_crb_smc *crb_smc;
  655. struct tpm2_crb_ffa *crb_ffa;
  656. struct tpm2_crb_pluton *crb_pluton;
  657. acpi_status status;
  658. u32 sm;
  659. int rc;
  660. status = acpi_get_table(ACPI_SIG_TPM2, 1,
  661. (struct acpi_table_header **) &buf);
  662. if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
  663. dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
  664. return -EINVAL;
  665. }
  666. /* Should the FIFO driver handle this? */
  667. sm = buf->start_method;
  668. if (sm == ACPI_TPM2_MEMORY_MAPPED) {
  669. rc = -ENODEV;
  670. goto out;
  671. }
  672. priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
  673. if (!priv) {
  674. rc = -ENOMEM;
  675. goto out;
  676. }
  677. if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
  678. if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) {
  679. dev_err(dev,
  680. FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
  681. buf->header.length,
  682. ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC);
  683. rc = -EINVAL;
  684. goto out;
  685. }
  686. crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, sizeof(*buf));
  687. priv->smc_func_id = crb_smc->smc_func_id;
  688. }
  689. if (sm == ACPI_TPM2_CRB_WITH_ARM_FFA) {
  690. if (buf->header.length < (sizeof(*buf) + sizeof(*crb_ffa))) {
  691. dev_err(dev,
  692. FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
  693. buf->header.length,
  694. ACPI_TPM2_CRB_WITH_ARM_FFA);
  695. rc = -EINVAL;
  696. goto out;
  697. }
  698. crb_ffa = ACPI_ADD_PTR(struct tpm2_crb_ffa, buf, sizeof(*buf));
  699. priv->ffa_flags = crb_ffa->flags;
  700. priv->ffa_attributes = crb_ffa->attributes;
  701. rc = tpm_crb_ffa_init();
  702. if (rc) {
  703. /* If FF-A driver is not available yet, request probe retry */
  704. if (rc == -ENOENT)
  705. rc = -EPROBE_DEFER;
  706. goto out;
  707. }
  708. }
  709. if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_PLUTON) {
  710. if (buf->header.length < (sizeof(*buf) + sizeof(*crb_pluton))) {
  711. dev_err(dev,
  712. FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
  713. buf->header.length,
  714. ACPI_TPM2_COMMAND_BUFFER_WITH_PLUTON);
  715. rc = -EINVAL;
  716. goto out;
  717. }
  718. crb_pluton = ACPI_ADD_PTR(struct tpm2_crb_pluton, buf, sizeof(*buf));
  719. rc = crb_map_pluton(dev, priv, buf, crb_pluton);
  720. if (rc)
  721. goto out;
  722. }
  723. priv->sm = sm;
  724. priv->hid = acpi_device_hid(device);
  725. rc = crb_map_io(device, priv, buf);
  726. if (rc)
  727. goto out;
  728. chip = tpmm_chip_alloc(dev, &tpm_crb);
  729. if (IS_ERR(chip)) {
  730. rc = PTR_ERR(chip);
  731. goto out;
  732. }
  733. dev_set_drvdata(&chip->dev, priv);
  734. chip->acpi_dev_handle = device->handle;
  735. chip->flags = TPM_CHIP_FLAG_TPM2;
  736. rc = tpm_chip_bootstrap(chip);
  737. if (rc)
  738. goto out;
  739. #ifdef CONFIG_X86
  740. /* A quirk for https://www.amd.com/en/support/kb/faq/pa-410 */
  741. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  742. priv->sm != ACPI_TPM2_COMMAND_BUFFER_WITH_PLUTON) {
  743. dev_info(dev, "Disabling hwrng\n");
  744. chip->flags |= TPM_CHIP_FLAG_HWRNG_DISABLED;
  745. }
  746. #endif /* CONFIG_X86 */
  747. rc = tpm_chip_register(chip);
  748. out:
  749. acpi_put_table((struct acpi_table_header *)buf);
  750. return rc;
  751. }
  752. static void crb_acpi_remove(struct acpi_device *device)
  753. {
  754. struct device *dev = &device->dev;
  755. struct tpm_chip *chip = dev_get_drvdata(dev);
  756. tpm_chip_unregister(chip);
  757. }
  758. static const struct dev_pm_ops crb_pm = {
  759. SET_SYSTEM_SLEEP_PM_OPS(tpm_pm_suspend, tpm_pm_resume)
  760. };
  761. static const struct acpi_device_id crb_device_ids[] = {
  762. {"MSFT0101", 0},
  763. {"", 0},
  764. };
  765. MODULE_DEVICE_TABLE(acpi, crb_device_ids);
  766. static struct acpi_driver crb_acpi_driver = {
  767. .name = "tpm_crb",
  768. .ids = crb_device_ids,
  769. .ops = {
  770. .add = crb_acpi_add,
  771. .remove = crb_acpi_remove,
  772. },
  773. .drv = {
  774. .pm = &crb_pm,
  775. },
  776. };
  777. module_acpi_driver(crb_acpi_driver);
  778. MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
  779. MODULE_DESCRIPTION("TPM2 Driver");
  780. MODULE_VERSION("0.1");
  781. MODULE_LICENSE("GPL");