mtk-rng.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for Mediatek Hardware Random Number Generator
  4. *
  5. * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
  6. */
  7. #define MTK_RNG_DEV KBUILD_MODNAME
  8. #include <linux/clk.h>
  9. #include <linux/delay.h>
  10. #include <linux/err.h>
  11. #include <linux/hw_random.h>
  12. #include <linux/io.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pm_runtime.h>
  19. /* Runtime PM autosuspend timeout: */
  20. #define RNG_AUTOSUSPEND_TIMEOUT 100
  21. #define USEC_POLL 2
  22. #define TIMEOUT_POLL 60
  23. #define RNG_CTRL 0x00
  24. #define RNG_EN BIT(0)
  25. #define RNG_READY BIT(31)
  26. #define RNG_DATA 0x08
  27. #define to_mtk_rng(p) container_of(p, struct mtk_rng, rng)
  28. struct mtk_rng {
  29. void __iomem *base;
  30. struct clk *clk;
  31. struct hwrng rng;
  32. struct device *dev;
  33. };
  34. static int mtk_rng_init(struct hwrng *rng)
  35. {
  36. struct mtk_rng *priv = to_mtk_rng(rng);
  37. u32 val;
  38. int err;
  39. err = clk_prepare_enable(priv->clk);
  40. if (err)
  41. return err;
  42. val = readl(priv->base + RNG_CTRL);
  43. val |= RNG_EN;
  44. writel(val, priv->base + RNG_CTRL);
  45. return 0;
  46. }
  47. static void mtk_rng_cleanup(struct hwrng *rng)
  48. {
  49. struct mtk_rng *priv = to_mtk_rng(rng);
  50. u32 val;
  51. val = readl(priv->base + RNG_CTRL);
  52. val &= ~RNG_EN;
  53. writel(val, priv->base + RNG_CTRL);
  54. clk_disable_unprepare(priv->clk);
  55. }
  56. static bool mtk_rng_wait_ready(struct hwrng *rng, bool wait)
  57. {
  58. struct mtk_rng *priv = to_mtk_rng(rng);
  59. int ready;
  60. ready = readl(priv->base + RNG_CTRL) & RNG_READY;
  61. if (!ready && wait)
  62. readl_poll_timeout_atomic(priv->base + RNG_CTRL, ready,
  63. ready & RNG_READY, USEC_POLL,
  64. TIMEOUT_POLL);
  65. return !!(ready & RNG_READY);
  66. }
  67. static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
  68. {
  69. struct mtk_rng *priv = to_mtk_rng(rng);
  70. int retval = 0;
  71. pm_runtime_get_sync(priv->dev);
  72. while (max >= sizeof(u32)) {
  73. if (!mtk_rng_wait_ready(rng, wait))
  74. break;
  75. *(u32 *)buf = readl(priv->base + RNG_DATA);
  76. retval += sizeof(u32);
  77. buf += sizeof(u32);
  78. max -= sizeof(u32);
  79. }
  80. pm_runtime_put_sync_autosuspend(priv->dev);
  81. return retval || !wait ? retval : -EIO;
  82. }
  83. static int mtk_rng_probe(struct platform_device *pdev)
  84. {
  85. int ret;
  86. struct mtk_rng *priv;
  87. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  88. if (!priv)
  89. return -ENOMEM;
  90. priv->dev = &pdev->dev;
  91. priv->rng.name = pdev->name;
  92. #ifndef CONFIG_PM
  93. priv->rng.init = mtk_rng_init;
  94. priv->rng.cleanup = mtk_rng_cleanup;
  95. #endif
  96. priv->rng.read = mtk_rng_read;
  97. priv->rng.quality = 900;
  98. priv->clk = devm_clk_get(&pdev->dev, "rng");
  99. if (IS_ERR(priv->clk)) {
  100. ret = PTR_ERR(priv->clk);
  101. dev_err(&pdev->dev, "no clock for device: %d\n", ret);
  102. return ret;
  103. }
  104. priv->base = devm_platform_ioremap_resource(pdev, 0);
  105. if (IS_ERR(priv->base))
  106. return PTR_ERR(priv->base);
  107. ret = devm_hwrng_register(&pdev->dev, &priv->rng);
  108. if (ret) {
  109. dev_err(&pdev->dev, "failed to register rng device: %d\n",
  110. ret);
  111. return ret;
  112. }
  113. dev_set_drvdata(&pdev->dev, priv);
  114. pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT);
  115. pm_runtime_use_autosuspend(&pdev->dev);
  116. ret = devm_pm_runtime_enable(&pdev->dev);
  117. if (ret)
  118. return ret;
  119. dev_info(&pdev->dev, "registered RNG driver\n");
  120. return 0;
  121. }
  122. #ifdef CONFIG_PM
  123. static int mtk_rng_runtime_suspend(struct device *dev)
  124. {
  125. struct mtk_rng *priv = dev_get_drvdata(dev);
  126. mtk_rng_cleanup(&priv->rng);
  127. return 0;
  128. }
  129. static int mtk_rng_runtime_resume(struct device *dev)
  130. {
  131. struct mtk_rng *priv = dev_get_drvdata(dev);
  132. return mtk_rng_init(&priv->rng);
  133. }
  134. static const struct dev_pm_ops mtk_rng_pm_ops = {
  135. SET_RUNTIME_PM_OPS(mtk_rng_runtime_suspend,
  136. mtk_rng_runtime_resume, NULL)
  137. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  138. pm_runtime_force_resume)
  139. };
  140. #define MTK_RNG_PM_OPS (&mtk_rng_pm_ops)
  141. #else /* CONFIG_PM */
  142. #define MTK_RNG_PM_OPS NULL
  143. #endif /* CONFIG_PM */
  144. static const struct of_device_id mtk_rng_match[] = {
  145. { .compatible = "mediatek,mt7986-rng" },
  146. { .compatible = "mediatek,mt7623-rng" },
  147. {},
  148. };
  149. MODULE_DEVICE_TABLE(of, mtk_rng_match);
  150. static struct platform_driver mtk_rng_driver = {
  151. .probe = mtk_rng_probe,
  152. .driver = {
  153. .name = MTK_RNG_DEV,
  154. .pm = MTK_RNG_PM_OPS,
  155. .of_match_table = mtk_rng_match,
  156. },
  157. };
  158. module_platform_driver(mtk_rng_driver);
  159. MODULE_DESCRIPTION("Mediatek Random Number Generator Driver");
  160. MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
  161. MODULE_LICENSE("GPL");