iproc-rng200.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2015 Broadcom Corporation
  4. *
  5. */
  6. /*
  7. * DESCRIPTION: The Broadcom iProc RNG200 Driver
  8. */
  9. #include <linux/hw_random.h>
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/mod_devicetable.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/delay.h>
  17. /* Registers */
  18. #define RNG_CTRL_OFFSET 0x00
  19. #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
  20. #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
  21. #define RNG_SOFT_RESET_OFFSET 0x04
  22. #define RNG_SOFT_RESET 0x00000001
  23. #define RBG_SOFT_RESET_OFFSET 0x08
  24. #define RBG_SOFT_RESET 0x00000001
  25. #define RNG_INT_STATUS_OFFSET 0x18
  26. #define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
  27. #define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK 0x00020000
  28. #define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
  29. #define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK 0x00000001
  30. #define RNG_FIFO_DATA_OFFSET 0x20
  31. #define RNG_FIFO_COUNT_OFFSET 0x24
  32. #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
  33. struct iproc_rng200_dev {
  34. struct hwrng rng;
  35. void __iomem *base;
  36. };
  37. #define to_rng_priv(rng) container_of(rng, struct iproc_rng200_dev, rng)
  38. static void iproc_rng200_enable_set(void __iomem *rng_base, bool enable)
  39. {
  40. u32 val;
  41. val = ioread32(rng_base + RNG_CTRL_OFFSET);
  42. val &= ~RNG_CTRL_RNG_RBGEN_MASK;
  43. if (enable)
  44. val |= RNG_CTRL_RNG_RBGEN_ENABLE;
  45. iowrite32(val, rng_base + RNG_CTRL_OFFSET);
  46. }
  47. static void iproc_rng200_restart(void __iomem *rng_base)
  48. {
  49. uint32_t val;
  50. iproc_rng200_enable_set(rng_base, false);
  51. /* Clear all interrupt status */
  52. iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
  53. /* Reset RNG and RBG */
  54. val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
  55. val |= RBG_SOFT_RESET;
  56. iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
  57. val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
  58. val |= RNG_SOFT_RESET;
  59. iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
  60. val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
  61. val &= ~RNG_SOFT_RESET;
  62. iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
  63. val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
  64. val &= ~RBG_SOFT_RESET;
  65. iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
  66. iproc_rng200_enable_set(rng_base, true);
  67. }
  68. static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max,
  69. bool wait)
  70. {
  71. struct iproc_rng200_dev *priv = to_rng_priv(rng);
  72. uint32_t num_remaining = max;
  73. uint32_t status;
  74. #define MAX_RESETS_PER_READ 1
  75. uint32_t num_resets = 0;
  76. #define MAX_IDLE_TIME (1 * HZ)
  77. unsigned long idle_endtime = jiffies + MAX_IDLE_TIME;
  78. while ((num_remaining > 0) && time_before(jiffies, idle_endtime)) {
  79. /* Is RNG sane? If not, reset it. */
  80. status = ioread32(priv->base + RNG_INT_STATUS_OFFSET);
  81. if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
  82. RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
  83. if (num_resets >= MAX_RESETS_PER_READ)
  84. return max - num_remaining;
  85. iproc_rng200_restart(priv->base);
  86. num_resets++;
  87. }
  88. /* Are there any random numbers available? */
  89. if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
  90. RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
  91. if (num_remaining >= sizeof(uint32_t)) {
  92. /* Buffer has room to store entire word */
  93. *(uint32_t *)buf = ioread32(priv->base +
  94. RNG_FIFO_DATA_OFFSET);
  95. buf += sizeof(uint32_t);
  96. num_remaining -= sizeof(uint32_t);
  97. } else {
  98. /* Buffer can only store partial word */
  99. uint32_t rnd_number = ioread32(priv->base +
  100. RNG_FIFO_DATA_OFFSET);
  101. memcpy(buf, &rnd_number, num_remaining);
  102. buf += num_remaining;
  103. num_remaining = 0;
  104. }
  105. /* Reset the IDLE timeout */
  106. idle_endtime = jiffies + MAX_IDLE_TIME;
  107. } else {
  108. if (!wait)
  109. /* Cannot wait, return immediately */
  110. return max - num_remaining;
  111. /* Can wait, give others chance to run */
  112. usleep_range(min(num_remaining * 10, 500U), 500);
  113. }
  114. }
  115. return max - num_remaining;
  116. }
  117. static int iproc_rng200_init(struct hwrng *rng)
  118. {
  119. struct iproc_rng200_dev *priv = to_rng_priv(rng);
  120. iproc_rng200_enable_set(priv->base, true);
  121. return 0;
  122. }
  123. static void iproc_rng200_cleanup(struct hwrng *rng)
  124. {
  125. struct iproc_rng200_dev *priv = to_rng_priv(rng);
  126. iproc_rng200_enable_set(priv->base, false);
  127. }
  128. static int iproc_rng200_probe(struct platform_device *pdev)
  129. {
  130. struct iproc_rng200_dev *priv;
  131. struct device *dev = &pdev->dev;
  132. int ret;
  133. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  134. if (!priv)
  135. return -ENOMEM;
  136. /* Map peripheral */
  137. priv->base = devm_platform_ioremap_resource(pdev, 0);
  138. if (IS_ERR(priv->base)) {
  139. dev_err(dev, "failed to remap rng regs\n");
  140. return PTR_ERR(priv->base);
  141. }
  142. dev_set_drvdata(dev, priv);
  143. priv->rng.name = "iproc-rng200";
  144. priv->rng.read = iproc_rng200_read;
  145. priv->rng.init = iproc_rng200_init;
  146. priv->rng.cleanup = iproc_rng200_cleanup;
  147. /* Register driver */
  148. ret = devm_hwrng_register(dev, &priv->rng);
  149. if (ret) {
  150. dev_err(dev, "hwrng registration failed\n");
  151. return ret;
  152. }
  153. dev_info(dev, "hwrng registered\n");
  154. return 0;
  155. }
  156. static int __maybe_unused iproc_rng200_suspend(struct device *dev)
  157. {
  158. struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
  159. iproc_rng200_cleanup(&priv->rng);
  160. return 0;
  161. }
  162. static int __maybe_unused iproc_rng200_resume(struct device *dev)
  163. {
  164. struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
  165. iproc_rng200_init(&priv->rng);
  166. return 0;
  167. }
  168. static const struct dev_pm_ops iproc_rng200_pm_ops = {
  169. SET_SYSTEM_SLEEP_PM_OPS(iproc_rng200_suspend, iproc_rng200_resume)
  170. };
  171. static const struct of_device_id iproc_rng200_of_match[] = {
  172. { .compatible = "brcm,bcm2711-rng200", },
  173. { .compatible = "brcm,bcm7211-rng200", },
  174. { .compatible = "brcm,bcm7278-rng200", },
  175. { .compatible = "brcm,iproc-rng200", },
  176. {},
  177. };
  178. MODULE_DEVICE_TABLE(of, iproc_rng200_of_match);
  179. static struct platform_driver iproc_rng200_driver = {
  180. .driver = {
  181. .name = "iproc-rng200",
  182. .of_match_table = iproc_rng200_of_match,
  183. .pm = &iproc_rng200_pm_ops,
  184. },
  185. .probe = iproc_rng200_probe,
  186. };
  187. module_platform_driver(iproc_rng200_driver);
  188. MODULE_AUTHOR("Broadcom");
  189. MODULE_DESCRIPTION("iProc RNG200 Random Number Generator driver");
  190. MODULE_LICENSE("GPL v2");