btqca.h 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Bluetooth supports for Qualcomm Atheros ROME chips
  4. *
  5. * Copyright (c) 2015 The Linux Foundation. All rights reserved.
  6. */
  7. #define EDL_PATCH_CMD_OPCODE 0xFC00
  8. #define EDL_NVM_ACCESS_OPCODE 0xFC0B
  9. #define EDL_WRITE_BD_ADDR_OPCODE 0xFC14
  10. #define EDL_PATCH_CMD_LEN 1
  11. #define EDL_PATCH_VER_REQ_CMD 0x19
  12. #define EDL_PATCH_TLV_REQ_CMD 0x1E
  13. #define EDL_GET_BUILD_INFO_CMD 0x20
  14. #define EDL_GET_BID_REQ_CMD 0x23
  15. #define EDL_NVM_ACCESS_SET_REQ_CMD 0x01
  16. #define EDL_PATCH_CONFIG_CMD 0x28
  17. #define MAX_SIZE_PER_TLV_SEGMENT 243
  18. #define QCA_PRE_SHUTDOWN_CMD 0xFC08
  19. #define QCA_DISABLE_LOGGING 0xFC17
  20. #define EDL_CMD_REQ_RES_EVT 0x00
  21. #define EDL_PATCH_VER_RES_EVT 0x19
  22. #define EDL_APP_VER_RES_EVT 0x02
  23. #define EDL_TVL_DNLD_RES_EVT 0x04
  24. #define EDL_CMD_EXE_STATUS_EVT 0x00
  25. #define EDL_SET_BAUDRATE_RSP_EVT 0x92
  26. #define EDL_NVM_ACCESS_CODE_EVT 0x0B
  27. #define EDL_PATCH_CONFIG_RES_EVT 0x00
  28. #define QCA_DISABLE_LOGGING_SUB_OP 0x14
  29. #define EDL_TAG_ID_BD_ADDR 2
  30. #define EDL_TAG_ID_HCI 17
  31. #define EDL_TAG_ID_DEEP_SLEEP 27
  32. #define QCA_WCN3990_POWERON_PULSE 0xFC
  33. #define QCA_WCN3990_POWEROFF_PULSE 0xC0
  34. #define QCA_HCI_CC_OPCODE 0xFC00
  35. #define QCA_HCI_CC_SUCCESS 0x00
  36. #define QCA_WCN3991_SOC_ID 0x40014320
  37. #define QCA_WCN3950_SOC_ID_T 0x40074130
  38. #define QCA_WCN3950_SOC_ID_S 0x40075130
  39. /* QCA chipset version can be decided by patch and SoC
  40. * version, combination with upper 2 bytes from SoC
  41. * and lower 2 bytes from patch will be used.
  42. */
  43. #define get_soc_ver(soc_id, rom_ver) \
  44. ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver)))
  45. #define QCA_HSP_GF_SOC_ID 0x1200
  46. #define QCA_HSP_GF_SOC_MASK 0x0000ff00
  47. enum qca_baudrate {
  48. QCA_BAUDRATE_115200 = 0,
  49. QCA_BAUDRATE_57600,
  50. QCA_BAUDRATE_38400,
  51. QCA_BAUDRATE_19200,
  52. QCA_BAUDRATE_9600,
  53. QCA_BAUDRATE_230400,
  54. QCA_BAUDRATE_250000,
  55. QCA_BAUDRATE_460800,
  56. QCA_BAUDRATE_500000,
  57. QCA_BAUDRATE_720000,
  58. QCA_BAUDRATE_921600,
  59. QCA_BAUDRATE_1000000,
  60. QCA_BAUDRATE_1250000,
  61. QCA_BAUDRATE_2000000,
  62. QCA_BAUDRATE_3000000,
  63. QCA_BAUDRATE_4000000,
  64. QCA_BAUDRATE_1600000,
  65. QCA_BAUDRATE_3200000,
  66. QCA_BAUDRATE_3500000,
  67. QCA_BAUDRATE_AUTO = 0xFE,
  68. QCA_BAUDRATE_RESERVED
  69. };
  70. enum qca_tlv_dnld_mode {
  71. QCA_SKIP_EVT_NONE,
  72. QCA_SKIP_EVT_VSE,
  73. QCA_SKIP_EVT_CC,
  74. QCA_SKIP_EVT_VSE_CC
  75. };
  76. enum qca_tlv_type {
  77. TLV_TYPE_PATCH = 1,
  78. TLV_TYPE_NVM,
  79. ELF_TYPE_PATCH,
  80. };
  81. struct qca_fw_config {
  82. u8 type;
  83. char fwname[64];
  84. uint8_t user_baud_rate;
  85. enum qca_tlv_dnld_mode dnld_mode;
  86. enum qca_tlv_dnld_mode dnld_type;
  87. bdaddr_t bdaddr;
  88. };
  89. struct edl_event_hdr {
  90. __u8 cresp;
  91. __u8 rtype;
  92. __u8 data[];
  93. } __packed;
  94. struct qca_btsoc_version {
  95. __le32 product_id;
  96. __le16 patch_ver;
  97. __le16 rom_ver;
  98. __le32 soc_id;
  99. } __packed;
  100. struct tlv_seg_resp {
  101. __u8 result;
  102. } __packed;
  103. struct tlv_type_patch {
  104. __le32 total_size;
  105. __le32 data_length;
  106. __u8 format_version;
  107. __u8 signature;
  108. __u8 download_mode;
  109. __u8 reserved1;
  110. __le16 product_id;
  111. __le16 rom_build;
  112. __le16 patch_version;
  113. __le16 reserved2;
  114. __le32 entry;
  115. } __packed;
  116. struct tlv_type_nvm {
  117. __le16 tag_id;
  118. __le16 tag_len;
  119. __le32 reserve1;
  120. __le32 reserve2;
  121. __u8 data[];
  122. } __packed;
  123. struct tlv_type_hdr {
  124. __le32 type_len;
  125. __u8 data[];
  126. } __packed;
  127. enum qca_btsoc_type {
  128. QCA_INVALID = -1,
  129. QCA_AR3002,
  130. QCA_ROME,
  131. QCA_WCN3950,
  132. QCA_WCN3988,
  133. QCA_WCN3990,
  134. QCA_WCN3998,
  135. QCA_WCN3991,
  136. QCA_QCA2066,
  137. QCA_QCA6390,
  138. QCA_WCN6750,
  139. QCA_WCN6855,
  140. QCA_WCN7850,
  141. };
  142. #if IS_ENABLED(CONFIG_BT_QCA)
  143. int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr);
  144. int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
  145. enum qca_btsoc_type soc_type, struct qca_btsoc_version ver,
  146. const char *firmware_name, const char *rampatch_name);
  147. int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,
  148. enum qca_btsoc_type);
  149. int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
  150. int qca_send_pre_shutdown_cmd(struct hci_dev *hdev);
  151. #else
  152. static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)
  153. {
  154. return -EOPNOTSUPP;
  155. }
  156. static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
  157. enum qca_btsoc_type soc_type,
  158. struct qca_btsoc_version ver,
  159. const char *firmware_name,
  160. const char *rampatch_name)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static inline int qca_read_soc_version(struct hci_dev *hdev,
  165. struct qca_btsoc_version *ver,
  166. enum qca_btsoc_type)
  167. {
  168. return -EOPNOTSUPP;
  169. }
  170. static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
  171. {
  172. return -EOPNOTSUPP;
  173. }
  174. static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev)
  175. {
  176. return -EOPNOTSUPP;
  177. }
  178. #endif