arm-charlcd.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for the on-board character LCD found on some ARM reference boards
  4. * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
  5. * https://en.wikipedia.org/wiki/HD44780_Character_LCD
  6. * Currently it will just display the text "ARM Linux" and the linux version
  7. *
  8. * Author: Linus Walleij <triad@df.lth.se>
  9. */
  10. #include <linux/completion.h>
  11. #include <linux/container_of.h>
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/iopoll.h>
  17. #include <linux/mod_devicetable.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/string.h>
  20. #include <linux/types.h>
  21. #include <linux/workqueue.h>
  22. #include <generated/utsrelease.h>
  23. #define DRIVERNAME "arm-charlcd"
  24. #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000))
  25. /* Offsets to registers */
  26. #define CHAR_COM 0x00U
  27. #define CHAR_DAT 0x04U
  28. #define CHAR_RD 0x08U
  29. #define CHAR_RAW 0x0CU
  30. #define CHAR_MASK 0x10U
  31. #define CHAR_STAT 0x14U
  32. #define CHAR_RAW_CLEAR 0x00000000U
  33. #define CHAR_RAW_VALID 0x00000100U
  34. /* Hitachi HD44780 display commands */
  35. #define HD_CLEAR 0x01U
  36. #define HD_HOME 0x02U
  37. #define HD_ENTRYMODE 0x04U
  38. #define HD_ENTRYMODE_INCREMENT 0x02U
  39. #define HD_ENTRYMODE_SHIFT 0x01U
  40. #define HD_DISPCTRL 0x08U
  41. #define HD_DISPCTRL_ON 0x04U
  42. #define HD_DISPCTRL_CURSOR_ON 0x02U
  43. #define HD_DISPCTRL_CURSOR_BLINK 0x01U
  44. #define HD_CRSR_SHIFT 0x10U
  45. #define HD_CRSR_SHIFT_DISPLAY 0x08U
  46. #define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U
  47. #define HD_FUNCSET 0x20U
  48. #define HD_FUNCSET_8BIT 0x10U
  49. #define HD_FUNCSET_2_LINES 0x08U
  50. #define HD_FUNCSET_FONT_5X10 0x04U
  51. #define HD_SET_CGRAM 0x40U
  52. #define HD_SET_DDRAM 0x80U
  53. #define HD_BUSY_FLAG 0x80U
  54. /**
  55. * struct charlcd - Private data structure
  56. * @dev: a pointer back to containing device
  57. * @virtbase: the offset to the controller in virtual memory
  58. * @irq: reserved interrupt number
  59. * @complete: completion structure for the last LCD command
  60. * @init_work: delayed work structure to initialize the display on boot
  61. */
  62. struct charlcd {
  63. struct device *dev;
  64. void __iomem *virtbase;
  65. int irq;
  66. struct completion complete;
  67. struct delayed_work init_work;
  68. };
  69. static irqreturn_t charlcd_interrupt(int irq, void *data)
  70. {
  71. struct charlcd *lcd = data;
  72. u8 status;
  73. status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
  74. /* Clear IRQ */
  75. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  76. if (status)
  77. complete(&lcd->complete);
  78. else
  79. dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status);
  80. return IRQ_HANDLED;
  81. }
  82. static void charlcd_wait_complete_irq(struct charlcd *lcd)
  83. {
  84. int ret;
  85. ret = wait_for_completion_interruptible_timeout(&lcd->complete,
  86. CHARLCD_TIMEOUT);
  87. /* Disable IRQ after completion */
  88. writel(0x00, lcd->virtbase + CHAR_MASK);
  89. if (ret < 0) {
  90. dev_err(lcd->dev,
  91. "wait_for_completion_interruptible_timeout() returned %d waiting for ready\n",
  92. ret);
  93. return;
  94. }
  95. if (ret == 0) {
  96. dev_err(lcd->dev, "charlcd controller timed out waiting for ready\n");
  97. return;
  98. }
  99. }
  100. static u8 charlcd_4bit_read_char(struct charlcd *lcd)
  101. {
  102. u8 data;
  103. u32 val;
  104. /* If we can, use an IRQ to wait for the data, else poll */
  105. if (lcd->irq >= 0)
  106. charlcd_wait_complete_irq(lcd);
  107. else {
  108. udelay(100);
  109. readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val,
  110. val & CHAR_RAW_VALID, 100, 1000);
  111. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  112. }
  113. msleep(1);
  114. /* Read the 4 high bits of the data */
  115. data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
  116. /*
  117. * The second read for the low bits does not trigger an IRQ
  118. * so in this case we have to poll for the 4 lower bits
  119. */
  120. udelay(100);
  121. readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val,
  122. val & CHAR_RAW_VALID, 100, 1000);
  123. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  124. msleep(1);
  125. /* Read the 4 low bits of the data */
  126. data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
  127. return data;
  128. }
  129. static bool charlcd_4bit_read_bf(struct charlcd *lcd)
  130. {
  131. if (lcd->irq >= 0) {
  132. /*
  133. * If we'll use IRQs to wait for the busyflag, clear any
  134. * pending flag and enable IRQ
  135. */
  136. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  137. init_completion(&lcd->complete);
  138. writel(0x01, lcd->virtbase + CHAR_MASK);
  139. }
  140. readl(lcd->virtbase + CHAR_COM);
  141. return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG;
  142. }
  143. static void charlcd_4bit_wait_busy(struct charlcd *lcd)
  144. {
  145. int retries = 50;
  146. udelay(100);
  147. while (charlcd_4bit_read_bf(lcd) && retries)
  148. retries--;
  149. if (!retries)
  150. dev_err(lcd->dev, "timeout waiting for busyflag\n");
  151. }
  152. static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd)
  153. {
  154. u32 cmdlo = (cmd << 4) & 0xf0;
  155. u32 cmdhi = (cmd & 0xf0);
  156. writel(cmdhi, lcd->virtbase + CHAR_COM);
  157. udelay(10);
  158. writel(cmdlo, lcd->virtbase + CHAR_COM);
  159. charlcd_4bit_wait_busy(lcd);
  160. }
  161. static void charlcd_4bit_char(struct charlcd *lcd, u8 ch)
  162. {
  163. u32 chlo = (ch << 4) & 0xf0;
  164. u32 chhi = (ch & 0xf0);
  165. writel(chhi, lcd->virtbase + CHAR_DAT);
  166. udelay(10);
  167. writel(chlo, lcd->virtbase + CHAR_DAT);
  168. charlcd_4bit_wait_busy(lcd);
  169. }
  170. static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str)
  171. {
  172. u8 offset;
  173. int i;
  174. /*
  175. * We support line 0, 1
  176. * Line 1 runs from 0x00..0x27
  177. * Line 2 runs from 0x28..0x4f
  178. */
  179. if (line == 0)
  180. offset = 0;
  181. else if (line == 1)
  182. offset = 0x28;
  183. else
  184. return;
  185. /* Set offset */
  186. charlcd_4bit_command(lcd, HD_SET_DDRAM | offset);
  187. /* Send string */
  188. for (i = 0; i < strlen(str) && i < 0x28; i++)
  189. charlcd_4bit_char(lcd, str[i]);
  190. }
  191. static void charlcd_4bit_init(struct charlcd *lcd)
  192. {
  193. /* These commands cannot be checked with the busy flag */
  194. writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
  195. msleep(5);
  196. writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
  197. udelay(100);
  198. writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
  199. udelay(100);
  200. /* Go to 4bit mode */
  201. writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
  202. udelay(100);
  203. /*
  204. * 4bit mode, 2 lines, 5x8 font, after this the number of lines
  205. * and the font cannot be changed until the next initialization sequence
  206. */
  207. charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES);
  208. charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
  209. charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT);
  210. charlcd_4bit_command(lcd, HD_CLEAR);
  211. charlcd_4bit_command(lcd, HD_HOME);
  212. /* Put something useful in the display */
  213. charlcd_4bit_print(lcd, 0, "ARM Linux");
  214. charlcd_4bit_print(lcd, 1, UTS_RELEASE);
  215. }
  216. static void charlcd_init_work(struct work_struct *work)
  217. {
  218. struct charlcd *lcd =
  219. container_of(work, struct charlcd, init_work.work);
  220. charlcd_4bit_init(lcd);
  221. }
  222. static int __init charlcd_probe(struct platform_device *pdev)
  223. {
  224. struct device *dev = &pdev->dev;
  225. int ret;
  226. struct charlcd *lcd;
  227. lcd = devm_kzalloc(dev, sizeof(*lcd), GFP_KERNEL);
  228. if (!lcd)
  229. return -ENOMEM;
  230. lcd->dev = &pdev->dev;
  231. lcd->virtbase = devm_platform_ioremap_resource(pdev, 0);
  232. if (IS_ERR(lcd->virtbase))
  233. return PTR_ERR(lcd->virtbase);
  234. lcd->irq = platform_get_irq(pdev, 0);
  235. /* If no IRQ is supplied, we'll survive without it */
  236. if (lcd->irq >= 0) {
  237. ret = devm_request_irq(dev, lcd->irq, charlcd_interrupt, 0, DRIVERNAME, lcd);
  238. if (ret)
  239. return ret;
  240. }
  241. platform_set_drvdata(pdev, lcd);
  242. /*
  243. * Initialize the display in a delayed work, because
  244. * it is VERY slow and would slow down the boot of the system.
  245. */
  246. INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work);
  247. schedule_delayed_work(&lcd->init_work, 0);
  248. return 0;
  249. }
  250. static int charlcd_suspend(struct device *dev)
  251. {
  252. struct charlcd *lcd = dev_get_drvdata(dev);
  253. /* Power the display off */
  254. charlcd_4bit_command(lcd, HD_DISPCTRL);
  255. return 0;
  256. }
  257. static int charlcd_resume(struct device *dev)
  258. {
  259. struct charlcd *lcd = dev_get_drvdata(dev);
  260. /* Turn the display back on */
  261. charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
  262. return 0;
  263. }
  264. static const struct dev_pm_ops charlcd_pm_ops = {
  265. .suspend = charlcd_suspend,
  266. .resume = charlcd_resume,
  267. };
  268. static const struct of_device_id charlcd_match[] = {
  269. { .compatible = "arm,versatile-lcd", },
  270. {}
  271. };
  272. static struct platform_driver charlcd_driver = {
  273. .driver = {
  274. .name = DRIVERNAME,
  275. .pm = &charlcd_pm_ops,
  276. .suppress_bind_attrs = true,
  277. .of_match_table = charlcd_match,
  278. },
  279. };
  280. builtin_platform_driver_probe(charlcd_driver, charlcd_probe);