setup.c 6.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. *
  4. * arch/xtensa/platform/xtavnet/setup.c
  5. *
  6. * ...
  7. *
  8. * Authors: Chris Zankel <chris@zankel.net>
  9. * Joe Taylor <joe@tensilica.com>
  10. *
  11. * Copyright 2001 - 2006 Tensilica Inc.
  12. */
  13. #include <linux/stddef.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/io.h>
  17. #include <linux/errno.h>
  18. #include <linux/reboot.h>
  19. #include <linux/kdev_t.h>
  20. #include <linux/types.h>
  21. #include <linux/major.h>
  22. #include <linux/console.h>
  23. #include <linux/delay.h>
  24. #include <linux/of.h>
  25. #include <linux/clk-provider.h>
  26. #include <linux/of_address.h>
  27. #include <linux/slab.h>
  28. #include <asm/timex.h>
  29. #include <asm/processor.h>
  30. #include <asm/platform.h>
  31. #include <asm/bootparam.h>
  32. #include <platform/lcd.h>
  33. #include <platform/hardware.h>
  34. static int xtfpga_power_off(struct sys_off_data *unused)
  35. {
  36. lcd_disp_at_pos("POWEROFF", 0);
  37. local_irq_disable();
  38. while (1)
  39. cpu_relax();
  40. return NOTIFY_DONE;
  41. }
  42. static int xtfpga_restart(struct notifier_block *this,
  43. unsigned long event, void *ptr)
  44. {
  45. /* Try software reset first. */
  46. WRITE_ONCE(*(u32 *)XTFPGA_SWRST_VADDR, 0xdead);
  47. /* If software reset did not work, flush and reset the mmu,
  48. * simulate a processor reset, and jump to the reset vector.
  49. */
  50. cpu_reset();
  51. return NOTIFY_DONE;
  52. }
  53. static struct notifier_block xtfpga_restart_block = {
  54. .notifier_call = xtfpga_restart,
  55. };
  56. #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
  57. void __init platform_calibrate_ccount(void)
  58. {
  59. ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
  60. }
  61. #endif
  62. static void __init xtfpga_register_handlers(void)
  63. {
  64. register_restart_handler(&xtfpga_restart_block);
  65. register_sys_off_handler(SYS_OFF_MODE_POWER_OFF,
  66. SYS_OFF_PRIO_DEFAULT,
  67. xtfpga_power_off, NULL);
  68. }
  69. #ifdef CONFIG_USE_OF
  70. static void __init xtfpga_clk_setup(struct device_node *np)
  71. {
  72. void __iomem *base = of_iomap(np, 0);
  73. struct clk *clk;
  74. u32 freq;
  75. if (!base) {
  76. pr_err("%pOFn: invalid address\n", np);
  77. return;
  78. }
  79. freq = __raw_readl(base);
  80. iounmap(base);
  81. clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
  82. if (IS_ERR(clk)) {
  83. pr_err("%pOFn: clk registration failed\n", np);
  84. return;
  85. }
  86. if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {
  87. pr_err("%pOFn: clk provider registration failed\n", np);
  88. return;
  89. }
  90. }
  91. CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup);
  92. #define MAC_LEN 6
  93. static void __init update_local_mac(struct device_node *node)
  94. {
  95. struct property *newmac;
  96. const u8* macaddr;
  97. int prop_len;
  98. macaddr = of_get_property(node, "local-mac-address", &prop_len);
  99. if (macaddr == NULL || prop_len != MAC_LEN)
  100. return;
  101. newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
  102. if (newmac == NULL)
  103. return;
  104. newmac->value = newmac + 1;
  105. newmac->length = MAC_LEN;
  106. newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
  107. if (newmac->name == NULL) {
  108. kfree(newmac);
  109. return;
  110. }
  111. memcpy(newmac->value, macaddr, MAC_LEN);
  112. ((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
  113. of_update_property(node, newmac);
  114. }
  115. static int __init machine_setup(void)
  116. {
  117. struct device_node *eth = NULL;
  118. if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
  119. update_local_mac(eth);
  120. of_node_put(eth);
  121. xtfpga_register_handlers();
  122. return 0;
  123. }
  124. arch_initcall(machine_setup);
  125. #else
  126. #include <linux/serial_8250.h>
  127. #include <linux/if.h>
  128. #include <net/ethoc.h>
  129. #include <linux/usb/c67x00.h>
  130. /*----------------------------------------------------------------------------
  131. * Ethernet -- OpenCores Ethernet MAC (ethoc driver)
  132. */
  133. static struct resource ethoc_res[] = {
  134. [0] = { /* register space */
  135. .start = OETH_REGS_PADDR,
  136. .end = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. [1] = { /* buffer space */
  140. .start = OETH_SRAMBUFF_PADDR,
  141. .end = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. [2] = { /* IRQ number */
  145. .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
  146. .end = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
  147. .flags = IORESOURCE_IRQ,
  148. },
  149. };
  150. static struct ethoc_platform_data ethoc_pdata = {
  151. /*
  152. * The MAC address for these boards is 00:50:c2:13:6f:xx.
  153. * The last byte (here as zero) is read from the DIP switches on the
  154. * board.
  155. */
  156. .hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
  157. .phy_id = -1,
  158. .big_endian = XCHAL_HAVE_BE,
  159. };
  160. static struct platform_device ethoc_device = {
  161. .name = "ethoc",
  162. .id = -1,
  163. .num_resources = ARRAY_SIZE(ethoc_res),
  164. .resource = ethoc_res,
  165. .dev = {
  166. .platform_data = &ethoc_pdata,
  167. },
  168. };
  169. /*----------------------------------------------------------------------------
  170. * USB Host/Device -- Cypress CY7C67300
  171. */
  172. static struct resource c67x00_res[] = {
  173. [0] = { /* register space */
  174. .start = C67X00_PADDR,
  175. .end = C67X00_PADDR + C67X00_SIZE - 1,
  176. .flags = IORESOURCE_MEM,
  177. },
  178. [1] = { /* IRQ number */
  179. .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
  180. .end = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
  181. .flags = IORESOURCE_IRQ,
  182. },
  183. };
  184. static struct c67x00_platform_data c67x00_pdata = {
  185. .sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED,
  186. .hpi_regstep = 4,
  187. };
  188. static struct platform_device c67x00_device = {
  189. .name = "c67x00",
  190. .id = -1,
  191. .num_resources = ARRAY_SIZE(c67x00_res),
  192. .resource = c67x00_res,
  193. .dev = {
  194. .platform_data = &c67x00_pdata,
  195. },
  196. };
  197. /*----------------------------------------------------------------------------
  198. * UART
  199. */
  200. static struct resource serial_resource = {
  201. .start = DUART16552_PADDR,
  202. .end = DUART16552_PADDR + 0x1f,
  203. .flags = IORESOURCE_MEM,
  204. };
  205. static struct plat_serial8250_port serial_platform_data[] = {
  206. [0] = {
  207. .mapbase = DUART16552_PADDR,
  208. .irq = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
  209. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  210. UPF_IOREMAP,
  211. .iotype = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
  212. .regshift = 2,
  213. .uartclk = 0, /* set in xtavnet_init() */
  214. },
  215. { },
  216. };
  217. static struct platform_device xtavnet_uart = {
  218. .name = "serial8250",
  219. .id = PLAT8250_DEV_PLATFORM,
  220. .dev = {
  221. .platform_data = serial_platform_data,
  222. },
  223. .num_resources = 1,
  224. .resource = &serial_resource,
  225. };
  226. /* platform devices */
  227. static struct platform_device *platform_devices[] __initdata = {
  228. &ethoc_device,
  229. &c67x00_device,
  230. &xtavnet_uart,
  231. };
  232. static int __init xtavnet_init(void)
  233. {
  234. /* Ethernet MAC address. */
  235. ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
  236. /* Clock rate varies among FPGA bitstreams; board specific FPGA register
  237. * reports the actual clock rate.
  238. */
  239. serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
  240. /* register platform devices */
  241. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  242. /* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
  243. * knows whether they set it correctly on the DIP switches.
  244. */
  245. pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
  246. ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
  247. xtfpga_register_handlers();
  248. return 0;
  249. }
  250. /*
  251. * Register to be done during do_initcalls().
  252. */
  253. arch_initcall(xtavnet_init);
  254. #endif /* CONFIG_USE_OF */