book3s.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
  4. *
  5. * Authors:
  6. * Alexander Graf <agraf@suse.de>
  7. * Kevin Wolf <mail@kevin-wolf.de>
  8. *
  9. * Description:
  10. * This file is derived from arch/powerpc/kvm/44x.c,
  11. * by Hollis Blanchard <hollisb@us.ibm.com>.
  12. */
  13. #include <linux/kvm_host.h>
  14. #include <linux/err.h>
  15. #include <linux/export.h>
  16. #include <linux/slab.h>
  17. #include <linux/module.h>
  18. #include <linux/miscdevice.h>
  19. #include <linux/gfp.h>
  20. #include <linux/sched.h>
  21. #include <linux/vmalloc.h>
  22. #include <linux/highmem.h>
  23. #include <asm/reg.h>
  24. #include <asm/cputable.h>
  25. #include <asm/cacheflush.h>
  26. #include <linux/uaccess.h>
  27. #include <asm/io.h>
  28. #include <asm/kvm_ppc.h>
  29. #include <asm/kvm_book3s.h>
  30. #include <asm/mmu_context.h>
  31. #include <asm/page.h>
  32. #include <asm/xive.h>
  33. #include "book3s.h"
  34. #include "trace.h"
  35. /* #define EXIT_DEBUG */
  36. const struct kvm_stats_desc kvm_vm_stats_desc[] = {
  37. KVM_GENERIC_VM_STATS(),
  38. STATS_DESC_ICOUNTER(VM, num_2M_pages),
  39. STATS_DESC_ICOUNTER(VM, num_1G_pages)
  40. };
  41. const struct kvm_stats_header kvm_vm_stats_header = {
  42. .name_size = KVM_STATS_NAME_SIZE,
  43. .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
  44. .id_offset = sizeof(struct kvm_stats_header),
  45. .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
  46. .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
  47. sizeof(kvm_vm_stats_desc),
  48. };
  49. const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
  50. KVM_GENERIC_VCPU_STATS(),
  51. STATS_DESC_COUNTER(VCPU, sum_exits),
  52. STATS_DESC_COUNTER(VCPU, mmio_exits),
  53. STATS_DESC_COUNTER(VCPU, signal_exits),
  54. STATS_DESC_COUNTER(VCPU, light_exits),
  55. STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
  56. STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
  57. STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
  58. STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
  59. STATS_DESC_COUNTER(VCPU, syscall_exits),
  60. STATS_DESC_COUNTER(VCPU, isi_exits),
  61. STATS_DESC_COUNTER(VCPU, dsi_exits),
  62. STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
  63. STATS_DESC_COUNTER(VCPU, dec_exits),
  64. STATS_DESC_COUNTER(VCPU, ext_intr_exits),
  65. STATS_DESC_COUNTER(VCPU, halt_successful_wait),
  66. STATS_DESC_COUNTER(VCPU, dbell_exits),
  67. STATS_DESC_COUNTER(VCPU, gdbell_exits),
  68. STATS_DESC_COUNTER(VCPU, ld),
  69. STATS_DESC_COUNTER(VCPU, st),
  70. STATS_DESC_COUNTER(VCPU, pf_storage),
  71. STATS_DESC_COUNTER(VCPU, pf_instruc),
  72. STATS_DESC_COUNTER(VCPU, sp_storage),
  73. STATS_DESC_COUNTER(VCPU, sp_instruc),
  74. STATS_DESC_COUNTER(VCPU, queue_intr),
  75. STATS_DESC_COUNTER(VCPU, ld_slow),
  76. STATS_DESC_COUNTER(VCPU, st_slow),
  77. STATS_DESC_COUNTER(VCPU, pthru_all),
  78. STATS_DESC_COUNTER(VCPU, pthru_host),
  79. STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
  80. };
  81. const struct kvm_stats_header kvm_vcpu_stats_header = {
  82. .name_size = KVM_STATS_NAME_SIZE,
  83. .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
  84. .id_offset = sizeof(struct kvm_stats_header),
  85. .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
  86. .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
  87. sizeof(kvm_vcpu_stats_desc),
  88. };
  89. static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
  90. unsigned long pending_now, unsigned long old_pending)
  91. {
  92. if (is_kvmppc_hv_enabled(vcpu->kvm))
  93. return;
  94. if (pending_now)
  95. kvmppc_set_int_pending(vcpu, 1);
  96. else if (old_pending)
  97. kvmppc_set_int_pending(vcpu, 0);
  98. }
  99. static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
  100. {
  101. ulong crit_raw;
  102. ulong crit_r1;
  103. bool crit;
  104. if (is_kvmppc_hv_enabled(vcpu->kvm))
  105. return false;
  106. crit_raw = kvmppc_get_critical(vcpu);
  107. crit_r1 = kvmppc_get_gpr(vcpu, 1);
  108. /* Truncate crit indicators in 32 bit mode */
  109. if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
  110. crit_raw &= 0xffffffff;
  111. crit_r1 &= 0xffffffff;
  112. }
  113. /* Critical section when crit == r1 */
  114. crit = (crit_raw == crit_r1);
  115. /* ... and we're in supervisor mode */
  116. crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
  117. return crit;
  118. }
  119. void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
  120. {
  121. vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
  122. }
  123. static int kvmppc_book3s_vec2irqprio(unsigned int vec)
  124. {
  125. unsigned int prio;
  126. switch (vec) {
  127. case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
  128. case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
  129. case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
  130. case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
  131. case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
  132. case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
  133. case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
  134. case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
  135. case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
  136. case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
  137. case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
  138. case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
  139. case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
  140. case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
  141. case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
  142. case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
  143. default: prio = BOOK3S_IRQPRIO_MAX; break;
  144. }
  145. return prio;
  146. }
  147. void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
  148. unsigned int vec)
  149. {
  150. unsigned long old_pending = vcpu->arch.pending_exceptions;
  151. clear_bit(kvmppc_book3s_vec2irqprio(vec),
  152. &vcpu->arch.pending_exceptions);
  153. kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
  154. old_pending);
  155. }
  156. void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
  157. {
  158. vcpu->stat.queue_intr++;
  159. set_bit(kvmppc_book3s_vec2irqprio(vec),
  160. &vcpu->arch.pending_exceptions);
  161. #ifdef EXIT_DEBUG
  162. printk(KERN_INFO "Queueing interrupt %x\n", vec);
  163. #endif
  164. }
  165. EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
  166. void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong srr1_flags)
  167. {
  168. /* might as well deliver this straight away */
  169. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, srr1_flags);
  170. }
  171. EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
  172. void kvmppc_core_queue_syscall(struct kvm_vcpu *vcpu)
  173. {
  174. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_SYSCALL, 0);
  175. }
  176. EXPORT_SYMBOL(kvmppc_core_queue_syscall);
  177. void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong srr1_flags)
  178. {
  179. /* might as well deliver this straight away */
  180. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, srr1_flags);
  181. }
  182. EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
  183. void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu, ulong srr1_flags)
  184. {
  185. /* might as well deliver this straight away */
  186. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, srr1_flags);
  187. }
  188. void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags)
  189. {
  190. /* might as well deliver this straight away */
  191. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, srr1_flags);
  192. }
  193. void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu, ulong srr1_flags)
  194. {
  195. /* might as well deliver this straight away */
  196. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, srr1_flags);
  197. }
  198. void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
  199. {
  200. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
  201. }
  202. EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
  203. int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
  204. {
  205. return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
  206. }
  207. EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
  208. void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
  209. {
  210. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
  211. }
  212. EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
  213. void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
  214. struct kvm_interrupt *irq)
  215. {
  216. /*
  217. * This case (KVM_INTERRUPT_SET) should never actually arise for
  218. * a pseries guest (because pseries guests expect their interrupt
  219. * controllers to continue asserting an external interrupt request
  220. * until it is acknowledged at the interrupt controller), but is
  221. * included to avoid ABI breakage and potentially for other
  222. * sorts of guest.
  223. *
  224. * There is a subtlety here: HV KVM does not test the
  225. * external_oneshot flag in the code that synthesizes
  226. * external interrupts for the guest just before entering
  227. * the guest. That is OK even if userspace did do a
  228. * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
  229. * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
  230. * which ends up doing a smp_send_reschedule(), which will
  231. * pull the guest all the way out to the host, meaning that
  232. * we will call kvmppc_core_prepare_to_enter() before entering
  233. * the guest again, and that will handle the external_oneshot
  234. * flag correctly.
  235. */
  236. if (irq->irq == KVM_INTERRUPT_SET)
  237. vcpu->arch.external_oneshot = 1;
  238. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
  239. }
  240. void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
  241. {
  242. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
  243. }
  244. void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong srr1_flags,
  245. ulong dar, ulong dsisr)
  246. {
  247. kvmppc_set_dar(vcpu, dar);
  248. kvmppc_set_dsisr(vcpu, dsisr);
  249. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, srr1_flags);
  250. }
  251. EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
  252. void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong srr1_flags)
  253. {
  254. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, srr1_flags);
  255. }
  256. EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
  257. static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
  258. unsigned int priority)
  259. {
  260. int deliver = 1;
  261. int vec = 0;
  262. bool crit = kvmppc_critical_section(vcpu);
  263. switch (priority) {
  264. case BOOK3S_IRQPRIO_DECREMENTER:
  265. deliver = !kvmhv_is_nestedv2() && (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
  266. vec = BOOK3S_INTERRUPT_DECREMENTER;
  267. break;
  268. case BOOK3S_IRQPRIO_EXTERNAL:
  269. deliver = !kvmhv_is_nestedv2() && (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
  270. vec = BOOK3S_INTERRUPT_EXTERNAL;
  271. break;
  272. case BOOK3S_IRQPRIO_SYSTEM_RESET:
  273. vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
  274. break;
  275. case BOOK3S_IRQPRIO_MACHINE_CHECK:
  276. vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
  277. break;
  278. case BOOK3S_IRQPRIO_DATA_STORAGE:
  279. vec = BOOK3S_INTERRUPT_DATA_STORAGE;
  280. break;
  281. case BOOK3S_IRQPRIO_INST_STORAGE:
  282. vec = BOOK3S_INTERRUPT_INST_STORAGE;
  283. break;
  284. case BOOK3S_IRQPRIO_DATA_SEGMENT:
  285. vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
  286. break;
  287. case BOOK3S_IRQPRIO_INST_SEGMENT:
  288. vec = BOOK3S_INTERRUPT_INST_SEGMENT;
  289. break;
  290. case BOOK3S_IRQPRIO_ALIGNMENT:
  291. vec = BOOK3S_INTERRUPT_ALIGNMENT;
  292. break;
  293. case BOOK3S_IRQPRIO_PROGRAM:
  294. vec = BOOK3S_INTERRUPT_PROGRAM;
  295. break;
  296. case BOOK3S_IRQPRIO_VSX:
  297. vec = BOOK3S_INTERRUPT_VSX;
  298. break;
  299. case BOOK3S_IRQPRIO_ALTIVEC:
  300. vec = BOOK3S_INTERRUPT_ALTIVEC;
  301. break;
  302. case BOOK3S_IRQPRIO_FP_UNAVAIL:
  303. vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
  304. break;
  305. case BOOK3S_IRQPRIO_SYSCALL:
  306. vec = BOOK3S_INTERRUPT_SYSCALL;
  307. break;
  308. case BOOK3S_IRQPRIO_DEBUG:
  309. vec = BOOK3S_INTERRUPT_TRACE;
  310. break;
  311. case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
  312. vec = BOOK3S_INTERRUPT_PERFMON;
  313. break;
  314. case BOOK3S_IRQPRIO_FAC_UNAVAIL:
  315. vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
  316. break;
  317. default:
  318. deliver = 0;
  319. printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
  320. break;
  321. }
  322. if (deliver)
  323. kvmppc_inject_interrupt(vcpu, vec, 0);
  324. return deliver;
  325. }
  326. /*
  327. * This function determines if an irqprio should be cleared once issued.
  328. */
  329. static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
  330. {
  331. switch (priority) {
  332. case BOOK3S_IRQPRIO_DECREMENTER:
  333. /* DEC interrupts get cleared by mtdec */
  334. return false;
  335. case BOOK3S_IRQPRIO_EXTERNAL:
  336. /*
  337. * External interrupts get cleared by userspace
  338. * except when set by the KVM_INTERRUPT ioctl with
  339. * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
  340. */
  341. if (vcpu->arch.external_oneshot) {
  342. vcpu->arch.external_oneshot = 0;
  343. return true;
  344. }
  345. return false;
  346. }
  347. return true;
  348. }
  349. int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
  350. {
  351. unsigned long *pending = &vcpu->arch.pending_exceptions;
  352. unsigned long old_pending = vcpu->arch.pending_exceptions;
  353. unsigned int priority;
  354. #ifdef EXIT_DEBUG
  355. if (vcpu->arch.pending_exceptions)
  356. printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
  357. #endif
  358. priority = __ffs(*pending);
  359. while (priority < BOOK3S_IRQPRIO_MAX) {
  360. if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
  361. clear_irqprio(vcpu, priority)) {
  362. clear_bit(priority, &vcpu->arch.pending_exceptions);
  363. break;
  364. }
  365. priority = find_next_bit(pending,
  366. BITS_PER_BYTE * sizeof(*pending),
  367. priority + 1);
  368. }
  369. /* Tell the guest about our interrupt status */
  370. kvmppc_update_int_pending(vcpu, *pending, old_pending);
  371. return 0;
  372. }
  373. EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
  374. kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
  375. bool *writable, struct page **page)
  376. {
  377. ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
  378. gfn_t gfn = gpa >> PAGE_SHIFT;
  379. if (!(kvmppc_get_msr(vcpu) & MSR_SF))
  380. mp_pa = (uint32_t)mp_pa;
  381. /* Magic page override */
  382. gpa &= ~0xFFFULL;
  383. if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
  384. ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
  385. kvm_pfn_t pfn;
  386. pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
  387. *page = pfn_to_page(pfn);
  388. get_page(*page);
  389. if (writable)
  390. *writable = true;
  391. return pfn;
  392. }
  393. return kvm_faultin_pfn(vcpu, gfn, writing, writable, page);
  394. }
  395. EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
  396. int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
  397. enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
  398. {
  399. bool data = (xlid == XLATE_DATA);
  400. bool iswrite = (xlrw == XLATE_WRITE);
  401. int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
  402. int r;
  403. if (relocated) {
  404. r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
  405. } else {
  406. pte->eaddr = eaddr;
  407. pte->raddr = eaddr & KVM_PAM;
  408. pte->vpage = VSID_REAL | eaddr >> 12;
  409. pte->may_read = true;
  410. pte->may_write = true;
  411. pte->may_execute = true;
  412. r = 0;
  413. if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
  414. !data) {
  415. if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
  416. ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
  417. pte->raddr &= ~SPLIT_HACK_MASK;
  418. }
  419. }
  420. return r;
  421. }
  422. /*
  423. * Returns prefixed instructions with the prefix in the high 32 bits
  424. * of *inst and suffix in the low 32 bits. This is the same convention
  425. * as used in HEIR, vcpu->arch.last_inst and vcpu->arch.emul_inst.
  426. * Like vcpu->arch.last_inst but unlike vcpu->arch.emul_inst, each
  427. * half of the value needs byte-swapping if the guest endianness is
  428. * different from the host endianness.
  429. */
  430. int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
  431. enum instruction_fetch_type type, unsigned long *inst)
  432. {
  433. ulong pc = kvmppc_get_pc(vcpu);
  434. int r;
  435. u32 iw;
  436. if (type == INST_SC)
  437. pc -= 4;
  438. r = kvmppc_ld(vcpu, &pc, sizeof(u32), &iw, false);
  439. if (r != EMULATE_DONE)
  440. return EMULATE_AGAIN;
  441. /*
  442. * If [H]SRR1 indicates that the instruction that caused the
  443. * current interrupt is a prefixed instruction, get the suffix.
  444. */
  445. if (kvmppc_get_msr(vcpu) & SRR1_PREFIXED) {
  446. u32 suffix;
  447. pc += 4;
  448. r = kvmppc_ld(vcpu, &pc, sizeof(u32), &suffix, false);
  449. if (r != EMULATE_DONE)
  450. return EMULATE_AGAIN;
  451. *inst = ((u64)iw << 32) | suffix;
  452. } else {
  453. *inst = iw;
  454. }
  455. return r;
  456. }
  457. EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
  458. int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
  459. {
  460. return 0;
  461. }
  462. void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
  463. {
  464. }
  465. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  466. struct kvm_sregs *sregs)
  467. {
  468. int ret;
  469. vcpu_load(vcpu);
  470. ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
  471. vcpu_put(vcpu);
  472. return ret;
  473. }
  474. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  475. struct kvm_sregs *sregs)
  476. {
  477. int ret;
  478. vcpu_load(vcpu);
  479. ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
  480. vcpu_put(vcpu);
  481. return ret;
  482. }
  483. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  484. {
  485. int i;
  486. regs->pc = kvmppc_get_pc(vcpu);
  487. regs->cr = kvmppc_get_cr(vcpu);
  488. regs->ctr = kvmppc_get_ctr(vcpu);
  489. regs->lr = kvmppc_get_lr(vcpu);
  490. regs->xer = kvmppc_get_xer(vcpu);
  491. regs->msr = kvmppc_get_msr(vcpu);
  492. regs->srr0 = kvmppc_get_srr0(vcpu);
  493. regs->srr1 = kvmppc_get_srr1(vcpu);
  494. regs->pid = kvmppc_get_pid(vcpu);
  495. regs->sprg0 = kvmppc_get_sprg0(vcpu);
  496. regs->sprg1 = kvmppc_get_sprg1(vcpu);
  497. regs->sprg2 = kvmppc_get_sprg2(vcpu);
  498. regs->sprg3 = kvmppc_get_sprg3(vcpu);
  499. regs->sprg4 = kvmppc_get_sprg4(vcpu);
  500. regs->sprg5 = kvmppc_get_sprg5(vcpu);
  501. regs->sprg6 = kvmppc_get_sprg6(vcpu);
  502. regs->sprg7 = kvmppc_get_sprg7(vcpu);
  503. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  504. regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
  505. return 0;
  506. }
  507. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  508. {
  509. int i;
  510. kvmppc_set_pc(vcpu, regs->pc);
  511. kvmppc_set_cr(vcpu, regs->cr);
  512. kvmppc_set_ctr(vcpu, regs->ctr);
  513. kvmppc_set_lr(vcpu, regs->lr);
  514. kvmppc_set_xer(vcpu, regs->xer);
  515. kvmppc_set_msr(vcpu, regs->msr);
  516. kvmppc_set_srr0(vcpu, regs->srr0);
  517. kvmppc_set_srr1(vcpu, regs->srr1);
  518. kvmppc_set_sprg0(vcpu, regs->sprg0);
  519. kvmppc_set_sprg1(vcpu, regs->sprg1);
  520. kvmppc_set_sprg2(vcpu, regs->sprg2);
  521. kvmppc_set_sprg3(vcpu, regs->sprg3);
  522. kvmppc_set_sprg4(vcpu, regs->sprg4);
  523. kvmppc_set_sprg5(vcpu, regs->sprg5);
  524. kvmppc_set_sprg6(vcpu, regs->sprg6);
  525. kvmppc_set_sprg7(vcpu, regs->sprg7);
  526. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  527. kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
  528. return 0;
  529. }
  530. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  531. {
  532. return -EOPNOTSUPP;
  533. }
  534. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  535. {
  536. return -EOPNOTSUPP;
  537. }
  538. int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
  539. union kvmppc_one_reg *val)
  540. {
  541. int r = 0;
  542. long int i;
  543. r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
  544. if (r == -EINVAL) {
  545. r = 0;
  546. switch (id) {
  547. case KVM_REG_PPC_DAR:
  548. *val = get_reg_val(id, kvmppc_get_dar(vcpu));
  549. break;
  550. case KVM_REG_PPC_DSISR:
  551. *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
  552. break;
  553. case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
  554. i = id - KVM_REG_PPC_FPR0;
  555. *val = get_reg_val(id, kvmppc_get_fpr(vcpu, i));
  556. break;
  557. case KVM_REG_PPC_FPSCR:
  558. *val = get_reg_val(id, kvmppc_get_fpscr(vcpu));
  559. break;
  560. #ifdef CONFIG_VSX
  561. case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
  562. if (cpu_has_feature(CPU_FTR_VSX)) {
  563. i = id - KVM_REG_PPC_VSR0;
  564. val->vsxval[0] = kvmppc_get_vsx_fpr(vcpu, i, 0);
  565. val->vsxval[1] = kvmppc_get_vsx_fpr(vcpu, i, 1);
  566. } else {
  567. r = -ENXIO;
  568. }
  569. break;
  570. #endif /* CONFIG_VSX */
  571. case KVM_REG_PPC_DEBUG_INST:
  572. *val = get_reg_val(id, INS_TW);
  573. break;
  574. #ifdef CONFIG_KVM_XICS
  575. case KVM_REG_PPC_ICP_STATE:
  576. if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
  577. r = -ENXIO;
  578. break;
  579. }
  580. if (xics_on_xive())
  581. *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
  582. else
  583. *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
  584. break;
  585. #endif /* CONFIG_KVM_XICS */
  586. #ifdef CONFIG_KVM_XIVE
  587. case KVM_REG_PPC_VP_STATE:
  588. if (!vcpu->arch.xive_vcpu) {
  589. r = -ENXIO;
  590. break;
  591. }
  592. if (xive_enabled())
  593. r = kvmppc_xive_native_get_vp(vcpu, val);
  594. else
  595. r = -ENXIO;
  596. break;
  597. #endif /* CONFIG_KVM_XIVE */
  598. case KVM_REG_PPC_FSCR:
  599. *val = get_reg_val(id, vcpu->arch.fscr);
  600. break;
  601. case KVM_REG_PPC_TAR:
  602. *val = get_reg_val(id, kvmppc_get_tar(vcpu));
  603. break;
  604. case KVM_REG_PPC_EBBHR:
  605. *val = get_reg_val(id, kvmppc_get_ebbhr(vcpu));
  606. break;
  607. case KVM_REG_PPC_EBBRR:
  608. *val = get_reg_val(id, kvmppc_get_ebbrr(vcpu));
  609. break;
  610. case KVM_REG_PPC_BESCR:
  611. *val = get_reg_val(id, kvmppc_get_bescr(vcpu));
  612. break;
  613. case KVM_REG_PPC_IC:
  614. *val = get_reg_val(id, kvmppc_get_ic(vcpu));
  615. break;
  616. default:
  617. r = -EINVAL;
  618. break;
  619. }
  620. }
  621. return r;
  622. }
  623. int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
  624. union kvmppc_one_reg *val)
  625. {
  626. int r = 0;
  627. long int i;
  628. r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
  629. if (r == -EINVAL) {
  630. r = 0;
  631. switch (id) {
  632. case KVM_REG_PPC_DAR:
  633. kvmppc_set_dar(vcpu, set_reg_val(id, *val));
  634. break;
  635. case KVM_REG_PPC_DSISR:
  636. kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
  637. break;
  638. case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
  639. i = id - KVM_REG_PPC_FPR0;
  640. kvmppc_set_fpr(vcpu, i, set_reg_val(id, *val));
  641. break;
  642. case KVM_REG_PPC_FPSCR:
  643. vcpu->arch.fp.fpscr = set_reg_val(id, *val);
  644. break;
  645. #ifdef CONFIG_VSX
  646. case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
  647. if (cpu_has_feature(CPU_FTR_VSX)) {
  648. i = id - KVM_REG_PPC_VSR0;
  649. kvmppc_set_vsx_fpr(vcpu, i, 0, val->vsxval[0]);
  650. kvmppc_set_vsx_fpr(vcpu, i, 1, val->vsxval[1]);
  651. } else {
  652. r = -ENXIO;
  653. }
  654. break;
  655. #endif /* CONFIG_VSX */
  656. #ifdef CONFIG_KVM_XICS
  657. case KVM_REG_PPC_ICP_STATE:
  658. if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
  659. r = -ENXIO;
  660. break;
  661. }
  662. if (xics_on_xive())
  663. r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
  664. else
  665. r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
  666. break;
  667. #endif /* CONFIG_KVM_XICS */
  668. #ifdef CONFIG_KVM_XIVE
  669. case KVM_REG_PPC_VP_STATE:
  670. if (!vcpu->arch.xive_vcpu) {
  671. r = -ENXIO;
  672. break;
  673. }
  674. if (xive_enabled())
  675. r = kvmppc_xive_native_set_vp(vcpu, val);
  676. else
  677. r = -ENXIO;
  678. break;
  679. #endif /* CONFIG_KVM_XIVE */
  680. case KVM_REG_PPC_FSCR:
  681. kvmppc_set_fpscr(vcpu, set_reg_val(id, *val));
  682. break;
  683. case KVM_REG_PPC_TAR:
  684. kvmppc_set_tar(vcpu, set_reg_val(id, *val));
  685. break;
  686. case KVM_REG_PPC_EBBHR:
  687. kvmppc_set_ebbhr(vcpu, set_reg_val(id, *val));
  688. break;
  689. case KVM_REG_PPC_EBBRR:
  690. kvmppc_set_ebbrr(vcpu, set_reg_val(id, *val));
  691. break;
  692. case KVM_REG_PPC_BESCR:
  693. kvmppc_set_bescr(vcpu, set_reg_val(id, *val));
  694. break;
  695. case KVM_REG_PPC_IC:
  696. kvmppc_set_ic(vcpu, set_reg_val(id, *val));
  697. break;
  698. default:
  699. r = -EINVAL;
  700. break;
  701. }
  702. }
  703. return r;
  704. }
  705. void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  706. {
  707. vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
  708. }
  709. void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
  710. {
  711. vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
  712. }
  713. void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
  714. {
  715. vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
  716. }
  717. EXPORT_SYMBOL_GPL(kvmppc_set_msr);
  718. int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
  719. {
  720. return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
  721. }
  722. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  723. struct kvm_translation *tr)
  724. {
  725. return 0;
  726. }
  727. int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
  728. struct kvm_guest_debug *dbg)
  729. {
  730. vcpu_load(vcpu);
  731. vcpu->guest_debug = dbg->control;
  732. vcpu_put(vcpu);
  733. return 0;
  734. }
  735. void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
  736. {
  737. kvmppc_core_queue_dec(vcpu);
  738. kvm_vcpu_kick(vcpu);
  739. }
  740. int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
  741. {
  742. return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
  743. }
  744. void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
  745. {
  746. vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
  747. }
  748. int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
  749. {
  750. return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
  751. }
  752. void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
  753. {
  754. }
  755. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
  756. {
  757. return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
  758. }
  759. void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
  760. {
  761. kvm->arch.kvm_ops->free_memslot(slot);
  762. }
  763. void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
  764. {
  765. kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
  766. }
  767. int kvmppc_core_prepare_memory_region(struct kvm *kvm,
  768. const struct kvm_memory_slot *old,
  769. struct kvm_memory_slot *new,
  770. enum kvm_mr_change change)
  771. {
  772. return kvm->arch.kvm_ops->prepare_memory_region(kvm, old, new, change);
  773. }
  774. void kvmppc_core_commit_memory_region(struct kvm *kvm,
  775. struct kvm_memory_slot *old,
  776. const struct kvm_memory_slot *new,
  777. enum kvm_mr_change change)
  778. {
  779. kvm->arch.kvm_ops->commit_memory_region(kvm, old, new, change);
  780. }
  781. bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
  782. {
  783. return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range);
  784. }
  785. bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
  786. {
  787. return kvm->arch.kvm_ops->age_gfn(kvm, range);
  788. }
  789. bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
  790. {
  791. return kvm->arch.kvm_ops->test_age_gfn(kvm, range);
  792. }
  793. int kvmppc_core_init_vm(struct kvm *kvm)
  794. {
  795. #ifdef CONFIG_PPC64
  796. INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
  797. INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
  798. mutex_init(&kvm->arch.rtas_token_lock);
  799. #endif
  800. return kvm->arch.kvm_ops->init_vm(kvm);
  801. }
  802. void kvmppc_core_destroy_vm(struct kvm *kvm)
  803. {
  804. kvm->arch.kvm_ops->destroy_vm(kvm);
  805. #ifdef CONFIG_PPC64
  806. kvmppc_rtas_tokens_free(kvm);
  807. WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
  808. #endif
  809. #ifdef CONFIG_KVM_XICS
  810. /*
  811. * Free the XIVE and XICS devices which are not directly freed by the
  812. * device 'release' method
  813. */
  814. kfree(kvm->arch.xive_devices.native);
  815. kvm->arch.xive_devices.native = NULL;
  816. kfree(kvm->arch.xive_devices.xics_on_xive);
  817. kvm->arch.xive_devices.xics_on_xive = NULL;
  818. kfree(kvm->arch.xics_device);
  819. kvm->arch.xics_device = NULL;
  820. #endif /* CONFIG_KVM_XICS */
  821. }
  822. int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
  823. {
  824. unsigned long size = kvmppc_get_gpr(vcpu, 4);
  825. unsigned long addr = kvmppc_get_gpr(vcpu, 5);
  826. u64 buf;
  827. int srcu_idx;
  828. int ret;
  829. if (!is_power_of_2(size) || (size > sizeof(buf)))
  830. return H_TOO_HARD;
  831. srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
  832. ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
  833. srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
  834. if (ret != 0)
  835. return H_TOO_HARD;
  836. switch (size) {
  837. case 1:
  838. kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
  839. break;
  840. case 2:
  841. kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
  842. break;
  843. case 4:
  844. kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
  845. break;
  846. case 8:
  847. kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
  848. break;
  849. default:
  850. BUG();
  851. }
  852. return H_SUCCESS;
  853. }
  854. EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
  855. int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
  856. {
  857. unsigned long size = kvmppc_get_gpr(vcpu, 4);
  858. unsigned long addr = kvmppc_get_gpr(vcpu, 5);
  859. unsigned long val = kvmppc_get_gpr(vcpu, 6);
  860. u64 buf;
  861. int srcu_idx;
  862. int ret;
  863. switch (size) {
  864. case 1:
  865. *(u8 *)&buf = val;
  866. break;
  867. case 2:
  868. *(__be16 *)&buf = cpu_to_be16(val);
  869. break;
  870. case 4:
  871. *(__be32 *)&buf = cpu_to_be32(val);
  872. break;
  873. case 8:
  874. *(__be64 *)&buf = cpu_to_be64(val);
  875. break;
  876. default:
  877. return H_TOO_HARD;
  878. }
  879. srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
  880. ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
  881. srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
  882. if (ret != 0)
  883. return H_TOO_HARD;
  884. return H_SUCCESS;
  885. }
  886. EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
  887. int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
  888. {
  889. return kvm->arch.kvm_ops->hcall_implemented(hcall);
  890. }
  891. #ifdef CONFIG_KVM_XICS
  892. int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
  893. bool line_status)
  894. {
  895. if (xics_on_xive())
  896. return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
  897. line_status);
  898. else
  899. return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
  900. line_status);
  901. }
  902. int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
  903. struct kvm *kvm, int irq_source_id,
  904. int level, bool line_status)
  905. {
  906. return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
  907. level, line_status);
  908. }
  909. static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
  910. struct kvm *kvm, int irq_source_id, int level,
  911. bool line_status)
  912. {
  913. return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
  914. }
  915. int kvm_irq_map_gsi(struct kvm *kvm,
  916. struct kvm_kernel_irq_routing_entry *entries, int gsi)
  917. {
  918. entries->gsi = gsi;
  919. entries->type = KVM_IRQ_ROUTING_IRQCHIP;
  920. entries->set = kvmppc_book3s_set_irq;
  921. entries->irqchip.irqchip = 0;
  922. entries->irqchip.pin = gsi;
  923. return 1;
  924. }
  925. int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
  926. {
  927. return pin;
  928. }
  929. #endif /* CONFIG_KVM_XICS */
  930. static int kvmppc_book3s_init(void)
  931. {
  932. int r;
  933. r = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE);
  934. if (r)
  935. return r;
  936. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  937. r = kvmppc_book3s_init_pr();
  938. #endif
  939. #ifdef CONFIG_KVM_XICS
  940. #ifdef CONFIG_KVM_XIVE
  941. if (xics_on_xive()) {
  942. kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
  943. if (kvmppc_xive_native_supported())
  944. kvm_register_device_ops(&kvm_xive_native_ops,
  945. KVM_DEV_TYPE_XIVE);
  946. } else
  947. #endif
  948. kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
  949. #endif
  950. return r;
  951. }
  952. static void kvmppc_book3s_exit(void)
  953. {
  954. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  955. kvmppc_book3s_exit_pr();
  956. #endif
  957. kvm_exit();
  958. }
  959. module_init(kvmppc_book3s_init);
  960. module_exit(kvmppc_book3s_exit);
  961. /* On 32bit this is our one and only kernel module */
  962. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  963. MODULE_ALIAS_MISCDEV(KVM_MINOR);
  964. MODULE_ALIAS("devname:kvm");
  965. #endif