Kconfig.cpu 14 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. comment "Processor Type"
  3. choice
  4. prompt "CPU/machine family support"
  5. default M68KCLASSIC if MMU
  6. default COLDFIRE if !MMU
  7. help
  8. The Freescale (was Motorola) M68K family of processors implements
  9. the full 68000 processor instruction set.
  10. The Freescale ColdFire family of processors is a modern derivative
  11. of the 68000 processor family. They are mainly targeted at embedded
  12. applications, and are all System-On-Chip (SOC) devices, as opposed
  13. to stand alone CPUs. They implement a subset of the original 68000
  14. processor instruction set.
  15. If you anticipate running this kernel on a computer with a classic
  16. MC68xxx processor, select M68KCLASSIC.
  17. If you anticipate running this kernel on a computer with a ColdFire
  18. processor, select COLDFIRE.
  19. config M68KCLASSIC
  20. bool "Classic M68K CPU/machine family support"
  21. select HAVE_ARCH_PFN_VALID
  22. select M68020 if MMU && !(M68030 || M68040 || M68060)
  23. config COLDFIRE
  24. bool "Coldfire CPU family support"
  25. select CPU_HAS_NO_BITFIELDS
  26. select CPU_HAS_NO_CAS
  27. select CPU_HAS_NO_MULDIV64
  28. select GENERIC_CSUM
  29. select GPIOLIB
  30. select HAVE_LEGACY_CLK
  31. select HAVE_PAGE_SIZE_8KB if !MMU
  32. config SUN3
  33. bool "Sun3 machine support"
  34. depends on MMU
  35. select HAVE_ARCH_PFN_VALID
  36. select LEGACY_TIMER_TICK
  37. select NO_DMA
  38. select M68020
  39. help
  40. This option enables support for the Sun 3 series of workstations
  41. (3/50, 3/60, 3/1xx, 3/2xx systems). These use a classic 68020 CPU
  42. but the custom memory management unit makes them incompatible with
  43. all other classic m68k machines, including Sun 3x.
  44. endchoice
  45. config M68000
  46. def_bool M68KCLASSIC && !MMU
  47. select CPU_HAS_NO_BITFIELDS
  48. select CPU_HAS_NO_CAS
  49. select CPU_HAS_NO_MULDIV64
  50. select CPU_HAS_NO_UNALIGNED
  51. select GENERIC_CSUM
  52. select CPU_NO_EFFICIENT_FFS
  53. select HAVE_ARCH_HASH
  54. select HAVE_PAGE_SIZE_4KB
  55. select LEGACY_TIMER_TICK
  56. help
  57. The Freescale (was Motorola) 68000 CPU is the first generation of
  58. the well known M68K family of processors. The CPU core as well as
  59. being available as a stand alone CPU was also used in many
  60. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  61. a paging MMU.
  62. config M68020
  63. bool "68020 support" if M68KCLASSIC
  64. depends on MMU
  65. select FPU
  66. select CPU_HAS_ADDRESS_SPACES
  67. help
  68. If you anticipate running this kernel on a computer with a MC68020
  69. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  70. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  71. Sun 3, which provides its own version.
  72. if M68KCLASSIC && MMU
  73. config M68030
  74. bool "68030 support"
  75. select FPU
  76. select CPU_HAS_ADDRESS_SPACES
  77. help
  78. If you anticipate running this kernel on a computer with a MC68030
  79. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  80. work, as it does not include an MMU (Memory Management Unit).
  81. config M68040
  82. bool "68040 support"
  83. select FPU
  84. select CPU_HAS_ADDRESS_SPACES
  85. help
  86. If you anticipate running this kernel on a computer with a MC68LC040
  87. or MC68040 processor, say Y. Otherwise, say N. Note that an
  88. MC68EC040 will not work, as it does not include an MMU (Memory
  89. Management Unit).
  90. config M68060
  91. bool "68060 support"
  92. select FPU
  93. select CPU_HAS_ADDRESS_SPACES
  94. help
  95. If you anticipate running this kernel on a computer with a MC68060
  96. processor, say Y. Otherwise, say N.
  97. endif # M68KCLASSIC
  98. config M68328
  99. bool
  100. depends on !MMU
  101. select M68000
  102. help
  103. Motorola 68328 processor support.
  104. config M68EZ328
  105. bool
  106. depends on !MMU
  107. select M68000
  108. help
  109. Motorola 68EX328 processor support.
  110. config M68VZ328
  111. bool
  112. depends on !MMU
  113. select M68000
  114. help
  115. Motorola 68VZ328 processor support.
  116. if COLDFIRE
  117. choice
  118. prompt "ColdFire SoC type"
  119. default M520x
  120. help
  121. Select the type of ColdFire System-on-Chip (SoC) that you want
  122. to build for.
  123. config M5206
  124. bool "MCF5206"
  125. depends on !MMU
  126. select COLDFIRE_SW_A7
  127. select COLDFIRE_TIMERS
  128. select HAVE_MBAR
  129. select CPU_NO_EFFICIENT_FFS
  130. help
  131. Motorola ColdFire 5206 processor support.
  132. config M5206e
  133. bool "MCF5206e"
  134. depends on !MMU
  135. select COLDFIRE_SW_A7
  136. select COLDFIRE_TIMERS
  137. select HAVE_MBAR
  138. select CPU_NO_EFFICIENT_FFS
  139. help
  140. Motorola ColdFire 5206e processor support.
  141. config M520x
  142. bool "MCF520x"
  143. depends on !MMU
  144. select COLDFIRE_PIT_TIMER
  145. select HAVE_CACHE_SPLIT
  146. help
  147. Freescale Coldfire 5207/5208 processor support.
  148. config M523x
  149. bool "MCF523x"
  150. depends on !MMU
  151. select COLDFIRE_PIT_TIMER
  152. select HAVE_CACHE_SPLIT
  153. select HAVE_IPSBAR
  154. help
  155. Freescale Coldfire 5230/1/2/4/5 processor support
  156. config M5249
  157. bool "MCF5249"
  158. depends on !MMU
  159. select COLDFIRE_SW_A7
  160. select COLDFIRE_TIMERS
  161. select HAVE_MBAR
  162. select CPU_NO_EFFICIENT_FFS
  163. help
  164. Motorola ColdFire 5249 processor support.
  165. config M525x
  166. bool "MCF525x"
  167. depends on !MMU
  168. select COLDFIRE_SW_A7
  169. select COLDFIRE_TIMERS
  170. select HAVE_MBAR
  171. select CPU_NO_EFFICIENT_FFS
  172. help
  173. Freescale (Motorola) Coldfire 5251/5253 processor support.
  174. config M5271
  175. bool "MCF5271"
  176. depends on !MMU
  177. select COLDFIRE_PIT_TIMER
  178. select M527x
  179. select HAVE_CACHE_SPLIT
  180. select HAVE_IPSBAR
  181. help
  182. Freescale (Motorola) ColdFire 5270/5271 processor support.
  183. config M5272
  184. bool "MCF5272"
  185. depends on !MMU
  186. select COLDFIRE_SW_A7
  187. select COLDFIRE_TIMERS
  188. select HAVE_MBAR
  189. select CPU_NO_EFFICIENT_FFS
  190. help
  191. Motorola ColdFire 5272 processor support.
  192. config M5275
  193. bool "MCF5275"
  194. depends on !MMU
  195. select COLDFIRE_PIT_TIMER
  196. select M527x
  197. select HAVE_CACHE_SPLIT
  198. select HAVE_IPSBAR
  199. help
  200. Freescale (Motorola) ColdFire 5274/5275 processor support.
  201. config M528x
  202. bool "MCF528x"
  203. depends on !MMU
  204. select COLDFIRE_PIT_TIMER
  205. select HAVE_CACHE_SPLIT
  206. select HAVE_IPSBAR
  207. help
  208. Motorola ColdFire 5280/5282 processor support.
  209. config M5307
  210. bool "MCF5307"
  211. depends on !MMU
  212. select COLDFIRE_TIMERS
  213. select COLDFIRE_SW_A7
  214. select HAVE_CACHE_CB
  215. select HAVE_MBAR
  216. select CPU_NO_EFFICIENT_FFS
  217. help
  218. Motorola ColdFire 5307 processor support.
  219. config M532x
  220. bool "MCF532x"
  221. depends on !MMU
  222. select COLDFIRE_TIMERS
  223. select M53xx
  224. select HAVE_CACHE_CB
  225. help
  226. Freescale (Motorola) ColdFire 532x processor support.
  227. config M537x
  228. bool "MCF537x"
  229. depends on !MMU
  230. select COLDFIRE_TIMERS
  231. select M53xx
  232. select HAVE_CACHE_CB
  233. help
  234. Freescale ColdFire 537x processor support.
  235. config M5407
  236. bool "MCF5407"
  237. depends on !MMU
  238. select COLDFIRE_SW_A7
  239. select COLDFIRE_TIMERS
  240. select HAVE_CACHE_CB
  241. select HAVE_MBAR
  242. select CPU_NO_EFFICIENT_FFS
  243. help
  244. Motorola ColdFire 5407 processor support.
  245. config M547x
  246. bool "MCF547x"
  247. select M54xx
  248. select COLDFIRE_SLTIMERS
  249. select MMU_COLDFIRE if MMU
  250. select FPU if MMU
  251. select HAVE_CACHE_CB
  252. select HAVE_MBAR
  253. select CPU_NO_EFFICIENT_FFS
  254. help
  255. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  256. config M548x
  257. bool "MCF548x"
  258. select COLDFIRE_SLTIMERS
  259. select MMU_COLDFIRE if MMU
  260. select FPU if MMU
  261. select M54xx
  262. select HAVE_CACHE_CB
  263. select HAVE_MBAR
  264. select CPU_NO_EFFICIENT_FFS
  265. help
  266. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  267. config M5441x
  268. bool "MCF5441x"
  269. select COLDFIRE_PIT_TIMER
  270. select MMU_COLDFIRE if MMU
  271. select HAVE_CACHE_CB
  272. help
  273. Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
  274. endchoice
  275. config M527x
  276. bool
  277. config M53xx
  278. bool
  279. config M54xx
  280. select HAVE_PCI
  281. bool
  282. config COLDFIRE_PIT_TIMER
  283. bool
  284. config COLDFIRE_TIMERS
  285. bool
  286. select LEGACY_TIMER_TICK
  287. config COLDFIRE_SLTIMERS
  288. bool
  289. select LEGACY_TIMER_TICK
  290. endif # COLDFIRE
  291. comment "Processor Specific Options"
  292. config M68KFPU_EMU
  293. bool "Math emulation support"
  294. depends on (M68KCLASSIC || SUN3) && FPU
  295. help
  296. At some point in the future, this will cause floating-point math
  297. instructions to be emulated by the kernel on machines that lack a
  298. floating-point math coprocessor. Thrill-seekers and chronically
  299. sleep-deprived psychotic hacker types can say Y now, everyone else
  300. should probably wait a while.
  301. config M68KFPU_EMU_EXTRAPREC
  302. bool "Math emulation extra precision"
  303. depends on M68KFPU_EMU
  304. help
  305. The fpu uses normally a few bit more during calculations for
  306. correct rounding, the emulator can (often) do the same but this
  307. extra calculation can cost quite some time, so you can disable
  308. it here. The emulator will then "only" calculate with a 64 bit
  309. mantissa and round slightly incorrect, what is more than enough
  310. for normal usage.
  311. config M68KFPU_EMU_ONLY
  312. bool "Math emulation only kernel"
  313. depends on M68KFPU_EMU
  314. help
  315. This option prevents any floating-point instructions from being
  316. compiled into the kernel, thereby the kernel doesn't save any
  317. floating point context anymore during task switches, so this
  318. kernel will only be usable on machines without a floating-point
  319. math coprocessor. This makes the kernel a bit faster as no tests
  320. needs to be executed whether a floating-point instruction in the
  321. kernel should be executed or not.
  322. config ADVANCED
  323. bool "Advanced configuration options"
  324. depends on MMU
  325. help
  326. This gives you access to some advanced options for the CPU. The
  327. defaults should be fine for most users, but these options may make
  328. it possible for you to improve performance somewhat if you know what
  329. you are doing.
  330. Note that the answer to this question won't directly affect the
  331. kernel: saying N will just cause the configurator to skip all
  332. the questions about these options.
  333. Most users should say N to this question.
  334. config RMW_INSNS
  335. bool "Use read-modify-write instructions"
  336. depends on ADVANCED && !CPU_HAS_NO_CAS
  337. help
  338. This allows to use certain instructions that work with indivisible
  339. read-modify-write bus cycles. While this is faster than the
  340. workaround of disabling interrupts, it can conflict with DMA
  341. ( = direct memory access) on many Amiga systems, and it is also said
  342. to destabilize other machines. It is very likely that this will
  343. cause serious problems on any Amiga or Atari Medusa if set. The only
  344. configuration where it should work are 68030-based Ataris, where it
  345. apparently improves performance. But you've been warned! Unless you
  346. really know what you are doing, say N. Try Y only if you're quite
  347. adventurous.
  348. config SINGLE_MEMORY_CHUNK
  349. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  350. depends on MMU
  351. default y if SUN3 || MMU_COLDFIRE
  352. help
  353. Ignore all but the first contiguous chunk of physical memory for VM
  354. purposes. This will save a few bytes kernel size and may speed up
  355. some operations.
  356. When this option os set to N, you may want to lower "Maximum zone
  357. order" to save memory that could be wasted for unused memory map.
  358. Say N if not sure.
  359. config ARCH_FORCE_MAX_ORDER
  360. int "Order of maximal physically contiguous allocations" if ADVANCED
  361. depends on !SINGLE_MEMORY_CHUNK
  362. default "10"
  363. help
  364. The kernel page allocator limits the size of maximal physically
  365. contiguous allocations. The limit is called MAX_PAGE_ORDER and it
  366. defines the maximal power of two of number of pages that can be
  367. allocated as a single contiguous block. This option allows
  368. overriding the default setting when ability to allocate very
  369. large blocks of physically contiguous memory is required.
  370. For systems that have holes in their physical address space this
  371. value also defines the minimal size of the hole that allows
  372. freeing unused memory map.
  373. Don't change if unsure.
  374. config 060_WRITETHROUGH
  375. bool "Use write-through caching for 68060 supervisor accesses"
  376. depends on ADVANCED && M68060
  377. help
  378. The 68060 generally uses copyback caching of recently accessed data.
  379. Copyback caching means that memory writes will be held in an on-chip
  380. cache and only written back to memory some time later. Saying Y
  381. here will force supervisor (kernel) accesses to use writethrough
  382. caching. Writethrough caching means that data is written to memory
  383. straight away, so that cache and memory data always agree.
  384. Writethrough caching is less efficient, but is needed for some
  385. drivers on 68060 based systems where the 68060 bus snooping signal
  386. is hardwired on. The 53c710 SCSI driver is known to suffer from
  387. this problem.
  388. config M68K_L2_CACHE
  389. bool
  390. depends on MAC
  391. default y
  392. config CPU_HAS_NO_BITFIELDS
  393. bool
  394. config CPU_HAS_NO_CAS
  395. bool
  396. config CPU_HAS_NO_MULDIV64
  397. bool
  398. config CPU_HAS_NO_UNALIGNED
  399. bool
  400. config CPU_HAS_ADDRESS_SPACES
  401. bool
  402. select ALTERNATE_USER_ADDRESS_SPACE
  403. config FPU
  404. bool
  405. config COLDFIRE_SW_A7
  406. bool
  407. config HAVE_CACHE_SPLIT
  408. bool
  409. config HAVE_CACHE_CB
  410. bool
  411. config HAVE_MBAR
  412. bool
  413. config HAVE_IPSBAR
  414. bool
  415. config CLOCK_FREQ
  416. int "Set the core clock frequency"
  417. default "25000000" if M5206
  418. default "54000000" if M5206e
  419. default "166666666" if M520x
  420. default "140000000" if M5249
  421. default "150000000" if M527x || M523x
  422. default "90000000" if M5307
  423. default "50000000" if M5407
  424. default "266000000" if M54xx
  425. default "66666666"
  426. depends on COLDFIRE
  427. help
  428. Define the CPU clock frequency in use. This is the core clock
  429. frequency, it may or may not be the same as the external clock
  430. crystal fitted to your board. Some processors have an internal
  431. PLL and can have their frequency programmed at run time, others
  432. use internal dividers. In general the kernel won't setup a PLL
  433. if it is fitted (there are some exceptions). This value will be
  434. specific to the exact CPU that you are using.
  435. config OLDMASK
  436. bool "Old mask 5307 (1H55J) silicon"
  437. depends on M5307
  438. help
  439. Build support for the older revision ColdFire 5307 silicon.
  440. Specifically this is the 1H55J mask revision.
  441. if HAVE_CACHE_SPLIT
  442. choice
  443. prompt "Split Cache Configuration"
  444. default CACHE_I
  445. config CACHE_I
  446. bool "Instruction"
  447. help
  448. Use all of the ColdFire CPU cache memory as an instruction cache.
  449. config CACHE_D
  450. bool "Data"
  451. help
  452. Use all of the ColdFire CPU cache memory as a data cache.
  453. config CACHE_BOTH
  454. bool "Both"
  455. help
  456. Split the ColdFire CPU cache, and use half as an instruction cache
  457. and half as a data cache.
  458. endchoice
  459. endif # HAVE_CACHE_SPLIT
  460. if HAVE_CACHE_CB
  461. choice
  462. prompt "Data cache mode"
  463. default CACHE_WRITETHRU
  464. config CACHE_WRITETHRU
  465. bool "Write-through"
  466. help
  467. The ColdFire CPU cache is set into Write-through mode.
  468. config CACHE_COPYBACK
  469. bool "Copy-back"
  470. help
  471. The ColdFire CPU cache is set into Copy-back mode.
  472. endchoice
  473. endif # HAVE_CACHE_CB
  474. # Coldfire cores that do not have a data cache configured can do coherent DMA.
  475. config COLDFIRE_COHERENT_DMA
  476. bool
  477. default y
  478. depends on COLDFIRE
  479. depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH
  480. config M68K_NONCOHERENT_DMA
  481. bool
  482. default y
  483. depends on HAS_DMA && !COLDFIRE_COHERENT_DMA