percpu.h 5.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  4. */
  5. #ifndef __ASM_PERCPU_H
  6. #define __ASM_PERCPU_H
  7. #include <asm/cmpxchg.h>
  8. #include <asm/loongarch.h>
  9. /*
  10. * The "address" (in fact, offset from $r21) of a per-CPU variable is close to
  11. * the loading address of main kernel image, but far from where the modules are
  12. * loaded. Tell the compiler this fact when using explicit relocs.
  13. */
  14. #if defined(MODULE) && defined(CONFIG_AS_HAS_EXPLICIT_RELOCS) && defined(CONFIG_64BIT)
  15. # if __has_attribute(model)
  16. # define PER_CPU_ATTRIBUTES __attribute__((model("extreme")))
  17. # else
  18. # error compiler support for the model attribute is necessary when a recent assembler is used
  19. # endif
  20. #endif
  21. /* Use r21 for fast access */
  22. register unsigned long __my_cpu_offset __asm__("$r21");
  23. static inline void set_my_cpu_offset(unsigned long off)
  24. {
  25. __my_cpu_offset = off;
  26. csr_write(off, PERCPU_BASE_KS);
  27. }
  28. #define __my_cpu_offset \
  29. ({ \
  30. __asm__ __volatile__("":"+r"(__my_cpu_offset)); \
  31. __my_cpu_offset; \
  32. })
  33. #ifdef CONFIG_CPU_HAS_AMO
  34. #define PERCPU_OP(op, asm_op, c_op) \
  35. static __always_inline unsigned long __percpu_##op(void *ptr, \
  36. unsigned long val, int size) \
  37. { \
  38. unsigned long ret; \
  39. \
  40. switch (size) { \
  41. case 4: \
  42. __asm__ __volatile__( \
  43. "am"#asm_op".w" " %[ret], %[val], %[ptr] \n" \
  44. : [ret] "=&r" (ret), [ptr] "+ZB"(*(u32 *)ptr) \
  45. : [val] "r" (val)); \
  46. break; \
  47. case 8: \
  48. __asm__ __volatile__( \
  49. "am"#asm_op".d" " %[ret], %[val], %[ptr] \n" \
  50. : [ret] "=&r" (ret), [ptr] "+ZB"(*(u64 *)ptr) \
  51. : [val] "r" (val)); \
  52. break; \
  53. default: \
  54. ret = 0; \
  55. BUILD_BUG(); \
  56. } \
  57. \
  58. return ret c_op val; \
  59. }
  60. PERCPU_OP(add, add, +)
  61. PERCPU_OP(and, and, &)
  62. PERCPU_OP(or, or, |)
  63. #undef PERCPU_OP
  64. #endif
  65. #ifdef CONFIG_64BIT
  66. #define __pcpu_op_1(op) op ".b "
  67. #define __pcpu_op_2(op) op ".h "
  68. #define __pcpu_op_4(op) op ".w "
  69. #define __pcpu_op_8(op) op ".d "
  70. #define _percpu_read(size, _pcp) \
  71. ({ \
  72. typeof(_pcp) __pcp_ret; \
  73. \
  74. __asm__ __volatile__( \
  75. __pcpu_op_##size("ldx") "%[ret], $r21, %[ptr] \n" \
  76. : [ret] "=&r"(__pcp_ret) \
  77. : [ptr] "r"(&(_pcp)) \
  78. : "memory"); \
  79. \
  80. __pcp_ret; \
  81. })
  82. #define _percpu_write(size, _pcp, _val) \
  83. do { \
  84. __asm__ __volatile__( \
  85. __pcpu_op_##size("stx") "%[val], $r21, %[ptr] \n" \
  86. : \
  87. : [val] "r"(_val), [ptr] "r"(&(_pcp)) \
  88. : "memory"); \
  89. } while (0)
  90. #endif
  91. #define __percpu_xchg __arch_xchg
  92. /* this_cpu_cmpxchg */
  93. #define _protect_cmpxchg_local(pcp, o, n) \
  94. ({ \
  95. typeof(*raw_cpu_ptr(&(pcp))) __ret; \
  96. preempt_disable_notrace(); \
  97. __ret = cmpxchg_local(raw_cpu_ptr(&(pcp)), o, n); \
  98. preempt_enable_notrace(); \
  99. __ret; \
  100. })
  101. #define _pcp_protect(operation, pcp, val) \
  102. ({ \
  103. typeof(pcp) __retval; \
  104. preempt_disable_notrace(); \
  105. __retval = (typeof(pcp))operation(raw_cpu_ptr(&(pcp)), \
  106. (val), sizeof(pcp)); \
  107. preempt_enable_notrace(); \
  108. __retval; \
  109. })
  110. #ifdef CONFIG_CPU_HAS_AMO
  111. #define _percpu_add(pcp, val) \
  112. _pcp_protect(__percpu_add, pcp, val)
  113. #define _percpu_add_return(pcp, val) _percpu_add(pcp, val)
  114. #define _percpu_and(pcp, val) \
  115. _pcp_protect(__percpu_and, pcp, val)
  116. #define _percpu_or(pcp, val) \
  117. _pcp_protect(__percpu_or, pcp, val)
  118. #define this_cpu_add_4(pcp, val) _percpu_add(pcp, val)
  119. #define this_cpu_add_8(pcp, val) _percpu_add(pcp, val)
  120. #define this_cpu_add_return_4(pcp, val) _percpu_add_return(pcp, val)
  121. #define this_cpu_add_return_8(pcp, val) _percpu_add_return(pcp, val)
  122. #define this_cpu_and_4(pcp, val) _percpu_and(pcp, val)
  123. #define this_cpu_and_8(pcp, val) _percpu_and(pcp, val)
  124. #define this_cpu_or_4(pcp, val) _percpu_or(pcp, val)
  125. #define this_cpu_or_8(pcp, val) _percpu_or(pcp, val)
  126. #endif
  127. #ifdef CONFIG_64BIT
  128. #define this_cpu_read_1(pcp) _percpu_read(1, pcp)
  129. #define this_cpu_read_2(pcp) _percpu_read(2, pcp)
  130. #define this_cpu_read_4(pcp) _percpu_read(4, pcp)
  131. #define this_cpu_read_8(pcp) _percpu_read(8, pcp)
  132. #define this_cpu_write_1(pcp, val) _percpu_write(1, pcp, val)
  133. #define this_cpu_write_2(pcp, val) _percpu_write(2, pcp, val)
  134. #define this_cpu_write_4(pcp, val) _percpu_write(4, pcp, val)
  135. #define this_cpu_write_8(pcp, val) _percpu_write(8, pcp, val)
  136. #endif
  137. #define _percpu_xchg(pcp, val) ((typeof(pcp)) \
  138. _pcp_protect(__percpu_xchg, pcp, (unsigned long)(val)))
  139. #define this_cpu_xchg_1(pcp, val) _percpu_xchg(pcp, val)
  140. #define this_cpu_xchg_2(pcp, val) _percpu_xchg(pcp, val)
  141. #define this_cpu_xchg_4(pcp, val) _percpu_xchg(pcp, val)
  142. #define this_cpu_xchg_8(pcp, val) _percpu_xchg(pcp, val)
  143. #define this_cpu_cmpxchg_1(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
  144. #define this_cpu_cmpxchg_2(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
  145. #define this_cpu_cmpxchg_4(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
  146. #define this_cpu_cmpxchg_8(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
  147. #include <asm-generic/percpu.h>
  148. #endif /* __ASM_PERCPU_H */