uaccess.h 14 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Based on arch/arm/include/asm/uaccess.h
  4. *
  5. * Copyright (C) 2012 ARM Ltd.
  6. */
  7. #ifndef __ASM_UACCESS_H
  8. #define __ASM_UACCESS_H
  9. #include <asm/alternative.h>
  10. #include <asm/kernel-pgtable.h>
  11. #include <asm/sysreg.h>
  12. /*
  13. * User space memory access functions
  14. */
  15. #include <linux/bitops.h>
  16. #include <linux/kasan-checks.h>
  17. #include <linux/string.h>
  18. #include <asm/asm-extable.h>
  19. #include <asm/cpufeature.h>
  20. #include <asm/mmu.h>
  21. #include <asm/mte.h>
  22. #include <asm/ptrace.h>
  23. #include <asm/memory.h>
  24. #include <asm/extable.h>
  25. static inline int __access_ok(const void __user *ptr, unsigned long size);
  26. /*
  27. * Test whether a block of memory is a valid user space address.
  28. * Returns 1 if the range is valid, 0 otherwise.
  29. *
  30. * This is equivalent to the following test:
  31. * (u65)addr + (u65)size <= (u65)TASK_SIZE_MAX
  32. */
  33. static inline int access_ok(const void __user *addr, unsigned long size)
  34. {
  35. /*
  36. * Asynchronous I/O running in a kernel thread does not have the
  37. * TIF_TAGGED_ADDR flag of the process owning the mm, so always untag
  38. * the user address before checking.
  39. */
  40. if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI) &&
  41. (current->flags & PF_KTHREAD || test_thread_flag(TIF_TAGGED_ADDR)))
  42. addr = untagged_addr(addr);
  43. return likely(__access_ok(addr, size));
  44. }
  45. #define access_ok access_ok
  46. #include <asm-generic/access_ok.h>
  47. /*
  48. * User access enabling/disabling.
  49. */
  50. #ifdef CONFIG_ARM64_SW_TTBR0_PAN
  51. static inline void __uaccess_ttbr0_disable(void)
  52. {
  53. unsigned long flags, ttbr;
  54. local_irq_save(flags);
  55. ttbr = read_sysreg(ttbr1_el1);
  56. ttbr &= ~TTBR_ASID_MASK;
  57. /* reserved_pg_dir placed before swapper_pg_dir */
  58. write_sysreg(ttbr - RESERVED_SWAPPER_OFFSET, ttbr0_el1);
  59. /* Set reserved ASID */
  60. write_sysreg(ttbr, ttbr1_el1);
  61. isb();
  62. local_irq_restore(flags);
  63. }
  64. static inline void __uaccess_ttbr0_enable(void)
  65. {
  66. unsigned long flags, ttbr0, ttbr1;
  67. /*
  68. * Disable interrupts to avoid preemption between reading the 'ttbr0'
  69. * variable and the MSR. A context switch could trigger an ASID
  70. * roll-over and an update of 'ttbr0'.
  71. */
  72. local_irq_save(flags);
  73. ttbr0 = READ_ONCE(current_thread_info()->ttbr0);
  74. /* Restore active ASID */
  75. ttbr1 = read_sysreg(ttbr1_el1);
  76. ttbr1 &= ~TTBR_ASID_MASK; /* safety measure */
  77. ttbr1 |= ttbr0 & TTBR_ASID_MASK;
  78. write_sysreg(ttbr1, ttbr1_el1);
  79. /* Restore user page table */
  80. write_sysreg(ttbr0, ttbr0_el1);
  81. isb();
  82. local_irq_restore(flags);
  83. }
  84. static inline bool uaccess_ttbr0_disable(void)
  85. {
  86. if (!system_uses_ttbr0_pan())
  87. return false;
  88. __uaccess_ttbr0_disable();
  89. return true;
  90. }
  91. static inline bool uaccess_ttbr0_enable(void)
  92. {
  93. if (!system_uses_ttbr0_pan())
  94. return false;
  95. __uaccess_ttbr0_enable();
  96. return true;
  97. }
  98. #else
  99. static inline bool uaccess_ttbr0_disable(void)
  100. {
  101. return false;
  102. }
  103. static inline bool uaccess_ttbr0_enable(void)
  104. {
  105. return false;
  106. }
  107. #endif
  108. static inline void __uaccess_disable_hw_pan(void)
  109. {
  110. asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN));
  111. }
  112. static inline void __uaccess_enable_hw_pan(void)
  113. {
  114. asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN));
  115. }
  116. static inline void uaccess_disable_privileged(void)
  117. {
  118. mte_disable_tco();
  119. if (uaccess_ttbr0_disable())
  120. return;
  121. __uaccess_enable_hw_pan();
  122. }
  123. static inline void uaccess_enable_privileged(void)
  124. {
  125. mte_enable_tco();
  126. if (uaccess_ttbr0_enable())
  127. return;
  128. __uaccess_disable_hw_pan();
  129. }
  130. /*
  131. * Sanitize a uaccess pointer such that it cannot reach any kernel address.
  132. *
  133. * Clearing bit 55 ensures the pointer cannot address any portion of the TTBR1
  134. * address range (i.e. any kernel address), and either the pointer falls within
  135. * the TTBR0 address range or must cause a fault.
  136. */
  137. #define uaccess_mask_ptr(ptr) (__typeof__(ptr))__uaccess_mask_ptr(ptr)
  138. static inline void __user *__uaccess_mask_ptr(const void __user *ptr)
  139. {
  140. void __user *safe_ptr;
  141. asm volatile(
  142. " bic %0, %1, %2\n"
  143. : "=r" (safe_ptr)
  144. : "r" (ptr),
  145. "i" (BIT(55))
  146. );
  147. return safe_ptr;
  148. }
  149. /*
  150. * The "__xxx" versions of the user access functions do not verify the address
  151. * space - it must have been done previously with a separate "access_ok()"
  152. * call.
  153. *
  154. * The "__xxx_error" versions set the third argument to -EFAULT if an error
  155. * occurs, and leave it unchanged on success.
  156. */
  157. #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
  158. #define __get_mem_asm(load, reg, x, addr, label, type) \
  159. asm_goto_output( \
  160. "1: " load " " reg "0, [%1]\n" \
  161. _ASM_EXTABLE_##type##ACCESS(1b, %l2) \
  162. : "=r" (x) \
  163. : "r" (addr) : : label)
  164. #else
  165. #define __get_mem_asm(load, reg, x, addr, label, type) do { \
  166. int __gma_err = 0; \
  167. asm volatile( \
  168. "1: " load " " reg "1, [%2]\n" \
  169. "2:\n" \
  170. _ASM_EXTABLE_##type##ACCESS_ERR_ZERO(1b, 2b, %w0, %w1) \
  171. : "+r" (__gma_err), "=r" (x) \
  172. : "r" (addr)); \
  173. if (__gma_err) goto label; } while (0)
  174. #endif
  175. #define __raw_get_mem(ldr, x, ptr, label, type) \
  176. do { \
  177. unsigned long __gu_val; \
  178. switch (sizeof(*(ptr))) { \
  179. case 1: \
  180. __get_mem_asm(ldr "b", "%w", __gu_val, (ptr), label, type); \
  181. break; \
  182. case 2: \
  183. __get_mem_asm(ldr "h", "%w", __gu_val, (ptr), label, type); \
  184. break; \
  185. case 4: \
  186. __get_mem_asm(ldr, "%w", __gu_val, (ptr), label, type); \
  187. break; \
  188. case 8: \
  189. __get_mem_asm(ldr, "%x", __gu_val, (ptr), label, type); \
  190. break; \
  191. default: \
  192. BUILD_BUG(); \
  193. } \
  194. (x) = (__force __typeof__(*(ptr)))__gu_val; \
  195. } while (0)
  196. /*
  197. * We must not call into the scheduler between uaccess_ttbr0_enable() and
  198. * uaccess_ttbr0_disable(). As `x` and `ptr` could contain blocking functions,
  199. * we must evaluate these outside of the critical section.
  200. */
  201. #define __raw_get_user(x, ptr, label) \
  202. do { \
  203. __typeof__(*(ptr)) __user *__rgu_ptr = (ptr); \
  204. __typeof__(x) __rgu_val; \
  205. __chk_user_ptr(ptr); \
  206. do { \
  207. __label__ __rgu_failed; \
  208. uaccess_ttbr0_enable(); \
  209. __raw_get_mem("ldtr", __rgu_val, __rgu_ptr, __rgu_failed, U); \
  210. uaccess_ttbr0_disable(); \
  211. (x) = __rgu_val; \
  212. break; \
  213. __rgu_failed: \
  214. uaccess_ttbr0_disable(); \
  215. goto label; \
  216. } while (0); \
  217. } while (0)
  218. #define __get_user_error(x, ptr, err) \
  219. do { \
  220. __label__ __gu_failed; \
  221. __typeof__(*(ptr)) __user *__p = (ptr); \
  222. might_fault(); \
  223. if (access_ok(__p, sizeof(*__p))) { \
  224. __p = uaccess_mask_ptr(__p); \
  225. __raw_get_user((x), __p, __gu_failed); \
  226. } else { \
  227. __gu_failed: \
  228. (x) = (__force __typeof__(x))0; (err) = -EFAULT; \
  229. } \
  230. } while (0)
  231. #define __get_user(x, ptr) \
  232. ({ \
  233. int __gu_err = 0; \
  234. __get_user_error((x), (ptr), __gu_err); \
  235. __gu_err; \
  236. })
  237. #define get_user __get_user
  238. /*
  239. * We must not call into the scheduler between __mte_enable_tco_async() and
  240. * __mte_disable_tco_async(). As `dst` and `src` may contain blocking
  241. * functions, we must evaluate these outside of the critical section.
  242. */
  243. #define __get_kernel_nofault(dst, src, type, err_label) \
  244. do { \
  245. __typeof__(dst) __gkn_dst = (dst); \
  246. __typeof__(src) __gkn_src = (src); \
  247. do { \
  248. __label__ __gkn_label; \
  249. \
  250. __mte_enable_tco_async(); \
  251. __raw_get_mem("ldr", *((type *)(__gkn_dst)), \
  252. (__force type *)(__gkn_src), __gkn_label, K); \
  253. __mte_disable_tco_async(); \
  254. break; \
  255. __gkn_label: \
  256. __mte_disable_tco_async(); \
  257. goto err_label; \
  258. } while (0); \
  259. } while (0)
  260. #define __put_mem_asm(store, reg, x, addr, label, type) \
  261. asm goto( \
  262. "1: " store " " reg "0, [%1]\n" \
  263. "2:\n" \
  264. _ASM_EXTABLE_##type##ACCESS(1b, %l2) \
  265. : : "rZ" (x), "r" (addr) : : label)
  266. #define __raw_put_mem(str, x, ptr, label, type) \
  267. do { \
  268. __typeof__(*(ptr)) __pu_val = (x); \
  269. switch (sizeof(*(ptr))) { \
  270. case 1: \
  271. __put_mem_asm(str "b", "%w", __pu_val, (ptr), label, type); \
  272. break; \
  273. case 2: \
  274. __put_mem_asm(str "h", "%w", __pu_val, (ptr), label, type); \
  275. break; \
  276. case 4: \
  277. __put_mem_asm(str, "%w", __pu_val, (ptr), label, type); \
  278. break; \
  279. case 8: \
  280. __put_mem_asm(str, "%x", __pu_val, (ptr), label, type); \
  281. break; \
  282. default: \
  283. BUILD_BUG(); \
  284. } \
  285. } while (0)
  286. /*
  287. * We must not call into the scheduler between uaccess_ttbr0_enable() and
  288. * uaccess_ttbr0_disable(). As `x` and `ptr` could contain blocking functions,
  289. * we must evaluate these outside of the critical section.
  290. */
  291. #define __raw_put_user(x, ptr, label) \
  292. do { \
  293. __label__ __rpu_failed; \
  294. __typeof__(*(ptr)) __user *__rpu_ptr = (ptr); \
  295. __typeof__(*(ptr)) __rpu_val = (x); \
  296. __chk_user_ptr(__rpu_ptr); \
  297. \
  298. do { \
  299. uaccess_ttbr0_enable(); \
  300. __raw_put_mem("sttr", __rpu_val, __rpu_ptr, __rpu_failed, U); \
  301. uaccess_ttbr0_disable(); \
  302. break; \
  303. __rpu_failed: \
  304. uaccess_ttbr0_disable(); \
  305. goto label; \
  306. } while (0); \
  307. } while (0)
  308. #define __put_user_error(x, ptr, err) \
  309. do { \
  310. __label__ __pu_failed; \
  311. __typeof__(*(ptr)) __user *__p = (ptr); \
  312. might_fault(); \
  313. if (access_ok(__p, sizeof(*__p))) { \
  314. __p = uaccess_mask_ptr(__p); \
  315. __raw_put_user((x), __p, __pu_failed); \
  316. } else { \
  317. __pu_failed: \
  318. (err) = -EFAULT; \
  319. } \
  320. } while (0)
  321. #define __put_user(x, ptr) \
  322. ({ \
  323. int __pu_err = 0; \
  324. __put_user_error((x), (ptr), __pu_err); \
  325. __pu_err; \
  326. })
  327. #define put_user __put_user
  328. /*
  329. * We must not call into the scheduler between __mte_enable_tco_async() and
  330. * __mte_disable_tco_async(). As `dst` and `src` may contain blocking
  331. * functions, we must evaluate these outside of the critical section.
  332. */
  333. #define __put_kernel_nofault(dst, src, type, err_label) \
  334. do { \
  335. __typeof__(dst) __pkn_dst = (dst); \
  336. __typeof__(src) __pkn_src = (src); \
  337. \
  338. do { \
  339. __label__ __pkn_err; \
  340. __mte_enable_tco_async(); \
  341. __raw_put_mem("str", *((type *)(__pkn_src)), \
  342. (__force type *)(__pkn_dst), __pkn_err, K); \
  343. __mte_disable_tco_async(); \
  344. break; \
  345. __pkn_err: \
  346. __mte_disable_tco_async(); \
  347. goto err_label; \
  348. } while (0); \
  349. } while(0)
  350. extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
  351. #define raw_copy_from_user(to, from, n) \
  352. ({ \
  353. unsigned long __acfu_ret; \
  354. uaccess_ttbr0_enable(); \
  355. __acfu_ret = __arch_copy_from_user((to), \
  356. __uaccess_mask_ptr(from), (n)); \
  357. uaccess_ttbr0_disable(); \
  358. __acfu_ret; \
  359. })
  360. extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
  361. #define raw_copy_to_user(to, from, n) \
  362. ({ \
  363. unsigned long __actu_ret; \
  364. uaccess_ttbr0_enable(); \
  365. __actu_ret = __arch_copy_to_user(__uaccess_mask_ptr(to), \
  366. (from), (n)); \
  367. uaccess_ttbr0_disable(); \
  368. __actu_ret; \
  369. })
  370. static __must_check __always_inline bool user_access_begin(const void __user *ptr, size_t len)
  371. {
  372. if (unlikely(!access_ok(ptr,len)))
  373. return 0;
  374. uaccess_ttbr0_enable();
  375. return 1;
  376. }
  377. #define user_access_begin(a,b) user_access_begin(a,b)
  378. #define user_access_end() uaccess_ttbr0_disable()
  379. #define arch_unsafe_put_user(x, ptr, label) \
  380. __raw_put_mem("sttr", x, uaccess_mask_ptr(ptr), label, U)
  381. #define arch_unsafe_get_user(x, ptr, label) \
  382. __raw_get_mem("ldtr", x, uaccess_mask_ptr(ptr), label, U)
  383. /*
  384. * KCSAN uses these to save and restore ttbr state.
  385. * We do not support KCSAN with ARM64_SW_TTBR0_PAN, so
  386. * they are no-ops.
  387. */
  388. static inline unsigned long user_access_save(void) { return 0; }
  389. static inline void user_access_restore(unsigned long enabled) { }
  390. /*
  391. * We want the unsafe accessors to always be inlined and use
  392. * the error labels - thus the macro games.
  393. */
  394. #define unsafe_copy_loop(dst, src, len, type, label) \
  395. while (len >= sizeof(type)) { \
  396. unsafe_put_user(*(type *)(src),(type __user *)(dst),label); \
  397. dst += sizeof(type); \
  398. src += sizeof(type); \
  399. len -= sizeof(type); \
  400. }
  401. #define unsafe_copy_to_user(_dst,_src,_len,label) \
  402. do { \
  403. char __user *__ucu_dst = (_dst); \
  404. const char *__ucu_src = (_src); \
  405. size_t __ucu_len = (_len); \
  406. unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
  407. unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
  408. unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
  409. unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
  410. } while (0)
  411. #define INLINE_COPY_TO_USER
  412. #define INLINE_COPY_FROM_USER
  413. extern unsigned long __must_check __arch_clear_user(void __user *to, unsigned long n);
  414. static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n)
  415. {
  416. if (access_ok(to, n)) {
  417. uaccess_ttbr0_enable();
  418. n = __arch_clear_user(__uaccess_mask_ptr(to), n);
  419. uaccess_ttbr0_disable();
  420. }
  421. return n;
  422. }
  423. #define clear_user __clear_user
  424. extern long strncpy_from_user(char *dest, const char __user *src, long count);
  425. extern __must_check long strnlen_user(const char __user *str, long n);
  426. #ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
  427. extern unsigned long __must_check __copy_user_flushcache(void *to, const void __user *from, unsigned long n);
  428. static inline int __copy_from_user_flushcache(void *dst, const void __user *src, unsigned size)
  429. {
  430. kasan_check_write(dst, size);
  431. return __copy_user_flushcache(dst, __uaccess_mask_ptr(src), size);
  432. }
  433. #endif
  434. #ifdef CONFIG_ARCH_HAS_SUBPAGE_FAULTS
  435. /*
  436. * Return 0 on success, the number of bytes not probed otherwise.
  437. */
  438. static inline size_t probe_subpage_writeable(const char __user *uaddr,
  439. size_t size)
  440. {
  441. if (!system_supports_mte())
  442. return 0;
  443. return mte_probe_user_range(uaddr, size);
  444. }
  445. #endif /* CONFIG_ARCH_HAS_SUBPAGE_FAULTS */
  446. #endif /* __ASM_UACCESS_H */