elba-asic-common.dtsi 1023 B

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. /*
  3. * Copyright 2020-2022 Advanced Micro Devices, Inc.
  4. */
  5. &ahb_clk {
  6. clock-frequency = <400000000>;
  7. };
  8. &emmc_clk {
  9. clock-frequency = <200000000>;
  10. };
  11. &flash_clk {
  12. clock-frequency = <400000000>;
  13. };
  14. &ref_clk {
  15. clock-frequency = <156250000>;
  16. };
  17. &qspi {
  18. status = "okay";
  19. flash0: flash@0 {
  20. compatible = "jedec,spi-nor";
  21. reg = <0>;
  22. spi-max-frequency = <40000000>;
  23. spi-rx-bus-width = <2>;
  24. m25p,fast-read;
  25. cdns,read-delay = <0>;
  26. cdns,tshsl-ns = <0>;
  27. cdns,tsd2d-ns = <0>;
  28. cdns,tchsh-ns = <0>;
  29. cdns,tslch-ns = <0>;
  30. };
  31. };
  32. &gpio0 {
  33. status = "okay";
  34. };
  35. &emmc {
  36. bus-width = <8>;
  37. cap-mmc-hw-reset;
  38. status = "okay";
  39. };
  40. &wdt0 {
  41. status = "okay";
  42. };
  43. &i2c0 {
  44. clock-frequency = <100000>;
  45. status = "okay";
  46. rtc@51 {
  47. compatible = "nxp,pcf85263";
  48. reg = <0x51>;
  49. };
  50. };
  51. &spi0 {
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. num-cs = <4>;
  55. cs-gpios = <0>, <0>, <&porta 1 GPIO_ACTIVE_LOW>,
  56. <&porta 7 GPIO_ACTIVE_LOW>;
  57. status = "okay";
  58. };