amd-sbi.rst 3.0 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. =======================
  3. AMD SIDE BAND interface
  4. =======================
  5. Some AMD Zen based processors supports system management
  6. functionality via side-band interface (SBI) called
  7. Advanced Platform Management Link (APML). APML is an I2C/I3C
  8. based 2-wire processor target interface. APML is used to
  9. communicate with the Remote Management Interface
  10. (SB Remote Management Interface (SB-RMI)
  11. and SB Temperature Sensor Interface (SB-TSI)).
  12. More details on the interface can be found in chapter
  13. "5 Advanced Platform Management Link (APML)" of the family/model PPR [1]_.
  14. .. [1] https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
  15. SBRMI device
  16. ============
  17. apml_sbrmi driver under the drivers/misc/amd-sbi creates miscdevice
  18. /dev/sbrmi-* to let user space programs run APML mailbox, CPUID,
  19. MCAMSR and register xfer commands.
  20. Register sets is common across APML protocols. IOCTL is providing synchronization
  21. among protocols as transactions may create race condition.
  22. .. code-block:: bash
  23. $ ls -al /dev/sbrmi-3c
  24. crw------- 1 root root 10, 53 Jul 10 11:13 /dev/sbrmi-3c
  25. apml_sbrmi driver registers hwmon sensors for monitoring power_cap_max,
  26. current power consumption and managing power_cap.
  27. Characteristics of the dev node:
  28. * Differnet xfer protocols are defined:
  29. * Mailbox
  30. * CPUID
  31. * MCA_MSR
  32. * Register xfer
  33. Access restrictions:
  34. * Only root user is allowed to open the file.
  35. * APML Mailbox messages and Register xfer access are read-write,
  36. * CPUID and MCA_MSR access is read-only.
  37. Driver IOCTLs
  38. =============
  39. .. c:macro:: SBRMI_IOCTL_MBOX_CMD
  40. .. kernel-doc:: include/uapi/misc/amd-apml.h
  41. :doc: SBRMI_IOCTL_MBOX_CMD
  42. .. c:macro:: SBRMI_IOCTL_CPUID_CMD
  43. .. kernel-doc:: include/uapi/misc/amd-apml.h
  44. :doc: SBRMI_IOCTL_CPUID_CMD
  45. .. c:macro:: SBRMI_IOCTL_MCAMSR_CMD
  46. .. kernel-doc:: include/uapi/misc/amd-apml.h
  47. :doc: SBRMI_IOCTL_MCAMSR_CMD
  48. .. c:macro:: SBRMI_IOCTL_REG_XFER_CMD
  49. .. kernel-doc:: include/uapi/misc/amd-apml.h
  50. :doc: SBRMI_IOCTL_REG_XFER_CMD
  51. User-space usage
  52. ================
  53. To access side band interface from a C program.
  54. First, user need to include the headers::
  55. #include <uapi/misc/amd-apml.h>
  56. Which defines the supported IOCTL and data structure to be passed
  57. from the user space.
  58. Next thing, open the device file, as follows::
  59. int file;
  60. file = open("/dev/sbrmi-*", O_RDWR);
  61. if (file < 0) {
  62. /* ERROR HANDLING */
  63. exit(1);
  64. }
  65. The following IOCTLs are defined:
  66. ``#define SB_BASE_IOCTL_NR 0xF9``
  67. ``#define SBRMI_IOCTL_MBOX_CMD _IOWR(SB_BASE_IOCTL_NR, 0, struct apml_mbox_msg)``
  68. ``#define SBRMI_IOCTL_CPUID_CMD _IOWR(SB_BASE_IOCTL_NR, 1, struct apml_cpuid_msg)``
  69. ``#define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg)``
  70. ``#define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_reg_xfer_msg)``
  71. User space C-APIs are made available by esmi_oob_library, hosted at
  72. [2]_ which is provided by the E-SMS project [3]_.
  73. .. [2] https://github.com/amd/esmi_oob_library
  74. .. [3] https://www.amd.com/en/developer/e-sms.html