ltc4282.rst 5.2 KB

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  1. .. SPDX-License-Identifier: GPL-2.0-only
  2. Kernel drivers ltc4282
  3. ==========================================
  4. Supported chips:
  5. * Analog Devices LTC4282
  6. Prefix: 'ltc4282'
  7. Addresses scanned: - I2C 0x40 - 0x5A (7-bit)
  8. Addresses scanned: - I2C 0x80 - 0xB4 with a step of 2 (8-bit)
  9. Datasheet:
  10. https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
  11. Author: Nuno Sá <nuno.sa@analog.com>
  12. Description
  13. ___________
  14. The LTC4282 hot swap controller allows a board to be safely inserted and removed
  15. from a live backplane. Using one or more external N-channel pass transistors,
  16. board supply voltage and inrush current are ramped up at an adjustable rate. An
  17. I2C interface and onboard ADC allows for monitoring of board current, voltage,
  18. power, energy and fault status. The device features analog foldback current
  19. limiting and supply monitoring for applications from 2.9V to 33V. Dual 12V gate
  20. drive allows high power applications to either share safe operating area across
  21. parallel MOSFETs or support a 2-stage start-up that first charges the load
  22. capacitance followed by enabling a low on-resistance path to the load. The
  23. LTC4282 is well suited to high power applications because the precise monitoring
  24. capability and accurate current limiting reduce the extremes in which both loads
  25. and power supplies must safely operate. Non-volatile configuration allows for
  26. flexibility in the autonomous generation of alerts and response to faults.
  27. Sysfs entries
  28. _____________
  29. The following attributes are supported. Limits are read-write and all the other
  30. attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling
  31. one disables the other and disabling one enables the other.
  32. ======================= ==========================================
  33. in0_input Output voltage (mV).
  34. in0_min Undervoltage threshold
  35. in0_max Overvoltage threshold
  36. in0_lowest Lowest measured voltage
  37. in0_highest Highest measured voltage
  38. in0_reset_history Write 1 to reset in0 history.
  39. Also clears fet bad and short fault logs.
  40. in0_min_alarm Undervoltage alarm
  41. in0_max_alarm Overvoltage alarm
  42. in0_enable Enable/Disable VSOURCE monitoring
  43. in0_fault Failure in the MOSFETs. Either bad or shorted FET.
  44. in0_label Channel label (VSOURCE)
  45. in1_input Input voltage (mV).
  46. in1_min Undervoltage threshold
  47. in1_max Overvoltage threshold
  48. in1_lowest Lowest measured voltage
  49. in1_highest Highest measured voltage
  50. in1_reset_history Write 1 to reset in1 history.
  51. Also clears over/undervoltage fault logs.
  52. in1_min_alarm Undervoltage alarm
  53. in1_max_alarm Overvoltage alarm
  54. in1_lcrit_alarm Critical Undervoltage alarm
  55. in1_crit_alarm Critical Overvoltage alarm
  56. in1_enable Enable/Disable VDD monitoring
  57. in1_label Channel label (VDD)
  58. in2_input GPIO voltage (mV)
  59. in2_min Undervoltage threshold
  60. in2_max Overvoltage threshold
  61. in2_lowest Lowest measured voltage
  62. in2_highest Highest measured voltage
  63. in2_reset_history Write 1 to reset in2 history
  64. in2_min_alarm Undervoltage alarm
  65. in2_max_alarm Overvoltage alarm
  66. in2_label Channel label (VGPIO)
  67. curr1_input Sense current (mA)
  68. curr1_min Undercurrent threshold
  69. curr1_max Overcurrent threshold
  70. curr1_lowest Lowest measured current
  71. curr1_highest Highest measured current
  72. curr1_reset_history Write 1 to reset curr1 history.
  73. Also clears overcurrent fault logs.
  74. curr1_min_alarm Undercurrent alarm
  75. curr1_max_alarm Overcurrent alarm
  76. curr1_crit_alarm Critical Overcurrent alarm
  77. curr1_label Channel label (ISENSE)
  78. power1_input Power (in uW)
  79. power1_min Low power threshold
  80. power1_max High power threshold
  81. power1_input_lowest Historical minimum power use
  82. power1_input_highest Historical maximum power use
  83. power1_reset_history Write 1 to reset power1 history.
  84. Also clears power bad fault logs.
  85. power1_min_alarm Low power alarm
  86. power1_max_alarm High power alarm
  87. power1_label Channel label (Power)
  88. energy1_input Measured energy over time (in microJoule)
  89. energy1_enable Enable/Disable Energy accumulation
  90. ======================= ==========================================
  91. DebugFs entries
  92. _______________
  93. The chip also has a fault log register where failures can be logged. Hence,
  94. as these are logging events, we give access to them in debugfs. Note that
  95. even if some failure is detected in these logs, it does necessarily mean
  96. that the failure is still present. As mentioned in the proper Sysfs entries,
  97. these logs can be cleared by writing in the proper reset_history attribute.
  98. .. warning:: The debugfs interface is subject to change without notice
  99. and is only available when the kernel is compiled with
  100. ``CONFIG_DEBUG_FS`` defined.
  101. ``/sys/kernel/debug/ltc4282-hwmon[X]/``
  102. contains the following attributes:
  103. ======================= ==========================================
  104. power1_bad_fault_log Set to 1 by a power1 bad fault occurring.
  105. in0_fet_short_fault_log Set to 1 when the ADC detects a FET-short fault.
  106. in0_fet_bad_fault_log Set to 1 when a FET-BAD fault occurs.
  107. in1_crit_fault_log Set to 1 by a VDD overvoltage fault occurring.
  108. in1_lcrit_fault_log Set to 1 by a VDD undervoltage fault occurring.
  109. curr1_crit_fault_log Set to 1 by an overcurrent fault occurring.
  110. ======================= ==========================================