renesas,ethertsn.yaml 2.9 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/net/renesas,ethertsn.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Renesas Ethernet TSN End-station
  7. maintainers:
  8. - Niklas Söderlund <niklas.soderlund@ragnatech.se>
  9. description:
  10. The RTSN device provides Ethernet network using a 10 Mbps, 100 Mbps, or 1
  11. Gbps full-duplex link via MII/GMII/RMII/RGMII. Depending on the connected PHY.
  12. allOf:
  13. - $ref: ethernet-controller.yaml#
  14. properties:
  15. compatible:
  16. items:
  17. - enum:
  18. - renesas,r8a779g0-ethertsn # R-Car V4H
  19. - const: renesas,rcar-gen4-ethertsn
  20. reg:
  21. items:
  22. - description: TSN End Station target
  23. - description: generalized Precision Time Protocol target
  24. reg-names:
  25. items:
  26. - const: tsnes
  27. - const: gptp
  28. interrupts:
  29. items:
  30. - description: TX data interrupt
  31. - description: RX data interrupt
  32. interrupt-names:
  33. items:
  34. - const: tx
  35. - const: rx
  36. clocks:
  37. maxItems: 1
  38. power-domains:
  39. maxItems: 1
  40. resets:
  41. maxItems: 1
  42. phy-mode:
  43. contains:
  44. enum:
  45. - mii
  46. - rgmii
  47. phy-handle:
  48. $ref: /schemas/types.yaml#/definitions/phandle
  49. description:
  50. Specifies a reference to a node representing a PHY device.
  51. rx-internal-delay-ps:
  52. enum: [0, 1800]
  53. default: 0
  54. tx-internal-delay-ps:
  55. enum: [0, 2000]
  56. default: 0
  57. mdio:
  58. $ref: /schemas/net/mdio.yaml#
  59. unevaluatedProperties: false
  60. required:
  61. - compatible
  62. - reg
  63. - reg-names
  64. - interrupts
  65. - interrupt-names
  66. - clocks
  67. - power-domains
  68. - resets
  69. - phy-mode
  70. - phy-handle
  71. - mdio
  72. additionalProperties: false
  73. examples:
  74. - |
  75. #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
  76. #include <dt-bindings/interrupt-controller/arm-gic.h>
  77. #include <dt-bindings/power/r8a779g0-sysc.h>
  78. #include <dt-bindings/gpio/gpio.h>
  79. tsn0: ethernet@e6460000 {
  80. compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn";
  81. reg = <0xe6460000 0x7000>,
  82. <0xe6449000 0x500>;
  83. reg-names = "tsnes", "gptp";
  84. interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
  85. <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
  86. interrupt-names = "tx", "rx";
  87. clocks = <&cpg CPG_MOD 2723>;
  88. power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
  89. resets = <&cpg 2723>;
  90. phy-mode = "rgmii";
  91. tx-internal-delay-ps = <2000>;
  92. phy-handle = <&phy3>;
  93. mdio {
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
  97. reset-post-delay-us = <4000>;
  98. phy3: ethernet-phy@0 {
  99. compatible = "ethernet-phy-ieee802.3-c45";
  100. reg = <0>;
  101. interrupt-parent = <&gpio4>;
  102. interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  103. };
  104. };
  105. };