adi,adin.yaml 2.7 KB

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  1. # SPDX-License-Identifier: GPL-2.0+
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/net/adi,adin.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Analog Devices ADIN1200/ADIN1300 PHY
  7. maintainers:
  8. - Marcelo Schmitt <marcelo.schmitt@analog.com>
  9. description: |
  10. Bindings for Analog Devices Industrial Ethernet PHYs
  11. allOf:
  12. - $ref: ethernet-phy.yaml#
  13. properties:
  14. adi,rx-internal-delay-ps:
  15. description: |
  16. RGMII RX Clock Delay used only when PHY operates in RGMII mode with
  17. internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
  18. enum: [ 1600, 1800, 2000, 2200, 2400 ]
  19. default: 2000
  20. adi,tx-internal-delay-ps:
  21. description: |
  22. RGMII TX Clock Delay used only when PHY operates in RGMII mode with
  23. internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
  24. enum: [ 1600, 1800, 2000, 2200, 2400 ]
  25. default: 2000
  26. adi,fifo-depth-bits:
  27. description: |
  28. When operating in RMII mode, this option configures the FIFO depth.
  29. enum: [ 4, 8, 12, 16, 20, 24 ]
  30. default: 8
  31. adi,phy-output-clock:
  32. description: |
  33. Select clock output on GP_CLK pin. Two clocks are available:
  34. A 25MHz reference and a free-running 125MHz.
  35. The phy can alternatively automatically switch between the reference and
  36. the 125MHz clocks based on its internal state.
  37. $ref: /schemas/types.yaml#/definitions/string
  38. enum:
  39. - 25mhz-reference
  40. - 125mhz-free-running
  41. - adaptive-free-running
  42. adi,phy-output-reference-clock:
  43. description: Enable 25MHz reference clock output on CLK25_REF pin.
  44. type: boolean
  45. adi,low-cmode-impedance:
  46. description: |
  47. Configure PHY for the lowest common-mode impedance on the receive pair
  48. for 100BASE-TX. This is suited for capacitive coupled applications and
  49. other applications where there may be a path for high common-mode noise
  50. to reach the PHY.
  51. If not present, by default the PHY is configured for normal termination
  52. (zero-power termination) mode.
  53. Note: There is a trade-off of 12 mW increased power consumption with
  54. the lowest common-mode impedance setting, but in all cases the
  55. differential impedance is 100 ohms.
  56. type: boolean
  57. unevaluatedProperties: false
  58. examples:
  59. - |
  60. ethernet {
  61. #address-cells = <1>;
  62. #size-cells = <0>;
  63. phy-mode = "rgmii-id";
  64. ethernet-phy@0 {
  65. reg = <0>;
  66. adi,rx-internal-delay-ps = <1800>;
  67. adi,tx-internal-delay-ps = <2200>;
  68. };
  69. };
  70. - |
  71. ethernet {
  72. #address-cells = <1>;
  73. #size-cells = <0>;
  74. phy-mode = "rmii";
  75. ethernet-phy@1 {
  76. reg = <1>;
  77. adi,fifo-depth-bits = <16>;
  78. };
  79. };