raw-nand-chip.yaml 3.7 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Raw NAND Chip Common Properties
  7. maintainers:
  8. - Miquel Raynal <miquel.raynal@bootlin.com>
  9. allOf:
  10. - $ref: nand-chip.yaml#
  11. description: |
  12. The ECC strength and ECC step size properties define the user
  13. desires in terms of correction capability of a controller. Together,
  14. they request the ECC engine to correct {strength} bit errors per
  15. {size} bytes for a particular raw NAND chip.
  16. The interpretation of these parameters is implementation-defined, so
  17. not all implementations must support all possible
  18. combinations. However, implementations are encouraged to further
  19. specify the value(s) they support.
  20. properties:
  21. $nodename:
  22. pattern: "^nand@[a-f0-9]$"
  23. reg:
  24. description:
  25. Contains the chip-select IDs.
  26. nand-ecc-placement:
  27. description:
  28. Location of the ECC bytes. This location is unknown by default
  29. but can be explicitly set to "oob", if all ECC bytes are
  30. known to be stored in the OOB area, or "interleaved" if ECC
  31. bytes will be interleaved with regular data in the main area.
  32. $ref: /schemas/types.yaml#/definitions/string
  33. enum: [ oob, interleaved ]
  34. deprecated: true
  35. nand-ecc-mode:
  36. description:
  37. Legacy ECC configuration mixing the ECC engine choice and
  38. configuration.
  39. $ref: /schemas/types.yaml#/definitions/string
  40. enum: [none, soft, soft_bch, hw, hw_syndrome, on-die]
  41. deprecated: true
  42. nand-bus-width:
  43. description:
  44. Bus width to the NAND chip
  45. $ref: /schemas/types.yaml#/definitions/uint32
  46. enum: [8, 16]
  47. default: 8
  48. nand-on-flash-bbt:
  49. description:
  50. With this property, the OS will search the device for a Bad
  51. Block Table (BBT). If not found, it will create one, reserve
  52. a few blocks at the end of the device to store it and update
  53. it as the device ages. Otherwise, the out-of-band area of a
  54. few pages of all the blocks will be scanned at boot time to
  55. find Bad Block Markers (BBM). These markers will help to
  56. build a volatile BBT in RAM.
  57. $ref: /schemas/types.yaml#/definitions/flag
  58. nand-ecc-maximize:
  59. description:
  60. Whether or not the ECC strength should be maximized. The
  61. maximum ECC strength is both controller and chip
  62. dependent. The ECC engine has to select the ECC config
  63. providing the best strength and taking the OOB area size
  64. constraint into account. This is particularly useful when
  65. only the in-band area is used by the upper layers, and you
  66. want to make your NAND as reliable as possible.
  67. $ref: /schemas/types.yaml#/definitions/flag
  68. nand-is-boot-medium:
  69. description:
  70. Whether or not the NAND chip is a boot medium. Drivers might
  71. use this information to select ECC algorithms supported by
  72. the boot ROM or similar restrictions.
  73. $ref: /schemas/types.yaml#/definitions/flag
  74. nand-rb:
  75. description:
  76. Contains the native Ready/Busy IDs.
  77. $ref: /schemas/types.yaml#/definitions/uint32-array
  78. rb-gpios:
  79. description:
  80. Contains one or more GPIO descriptor (the numper of descriptor
  81. depends on the number of R/B pins exposed by the flash) for the
  82. Ready/Busy pins. Active state refers to the NAND ready state and
  83. should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted.
  84. wp-gpios:
  85. description:
  86. Contains one GPIO descriptor for the Write Protect pin.
  87. Active state refers to the NAND Write Protect state and should be
  88. set to GPIOD_ACTIVE_LOW unless the signal is inverted.
  89. maxItems: 1
  90. required:
  91. - reg
  92. # This is a generic file other binding inherit from and extend
  93. additionalProperties: true