mtd-physmap.yaml 5.9 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
  7. maintainers:
  8. - Rob Herring <robh@kernel.org>
  9. description: |
  10. Flash chips (Memory Technology Devices) are often used for solid state
  11. file systems on embedded devices.
  12. allOf:
  13. - $ref: mtd.yaml#
  14. - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
  15. properties:
  16. compatible:
  17. oneOf:
  18. - items:
  19. - enum:
  20. - amd,s29gl01gp
  21. - amd,s29gl032a
  22. - amd,s29gl256n
  23. - amd,s29gl512n
  24. - arm,versatile-flash
  25. - arm,vexpress-flash
  26. - cortina,gemini-flash
  27. - cypress,hyperflash
  28. - ge,imp3a-firmware-mirror
  29. - ge,imp3a-paged-flash
  30. - gef,ppc9a-firmware-mirror
  31. - gef,ppc9a-paged-flash
  32. - gef,sbc310-firmware-mirror
  33. - gef,sbc310-paged-flash
  34. - gef,sbc610-firmware-mirror
  35. - gef,sbc610-paged-flash
  36. - intel,28f128j3
  37. - intel,dt28f160
  38. - intel,ixp4xx-flash
  39. - intel,JS28F128
  40. - intel,JS28F640
  41. - intel,PC28F640P30T85
  42. - numonyx,js28f00a
  43. - numonyx,js28f128
  44. - sst,sst39vf320
  45. - xlnx,xps-mch-emc-2.00.a
  46. - enum:
  47. - cfi-flash
  48. - jedec-flash
  49. - items:
  50. - enum:
  51. - cypress,cy7c1019dv33-10zsxi
  52. - arm,vexpress-psram
  53. - const: mtd-ram
  54. - enum:
  55. - cfi-flash
  56. - jedec-flash
  57. - mtd-ram
  58. - mtd-rom
  59. reg:
  60. description: |
  61. It's possible to (optionally) define multiple "reg" tuples so that
  62. non-identical chips can be described in one node.
  63. minItems: 1
  64. maxItems: 8
  65. clocks:
  66. description: |
  67. Chips may need clocks to be enabled for themselves or for transparent
  68. bridges.
  69. power-domains:
  70. description: |
  71. Chips may need power domains to be enabled for themselves or for
  72. transparent bridges.
  73. bank-width:
  74. description: Width (in bytes) of the bank. Equal to the device width times
  75. the number of interleaved chips.
  76. $ref: /schemas/types.yaml#/definitions/uint32
  77. enum: [ 1, 2, 4 ]
  78. device-width:
  79. description:
  80. Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
  81. $ref: /schemas/types.yaml#/definitions/uint32
  82. enum: [ 1, 2 ]
  83. no-unaligned-direct-access:
  84. type: boolean
  85. description: |
  86. Disables the default direct mapping of the flash.
  87. On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems
  88. with JFFS2 usage, as the local bus (LPB) doesn't support unaligned
  89. accesses as implemented in the JFFS2 code via memcpy(). By defining
  90. "no-unaligned-direct-access", the flash will not be exposed directly to
  91. the MTD users (e.g. JFFS2) any more.
  92. linux,mtd-name:
  93. description:
  94. Allows specifying the mtd name for retro capability with physmap-flash
  95. drivers as boot loader pass the mtd partition via the old device name
  96. physmap-flash.
  97. $ref: /schemas/types.yaml#/definitions/string
  98. use-advanced-sector-protection:
  99. type: boolean
  100. description: |
  101. Enables support for the advanced sector protection (Spansion: PPB -
  102. Persistent Protection Bits) locking.
  103. erase-size:
  104. description: The chip's physical erase block size in bytes.
  105. $ref: /schemas/types.yaml#/definitions/uint32
  106. addr-gpios:
  107. description:
  108. List of GPIO descriptors that will be used to address the MSBs address
  109. lines. The order goes from LSB to MSB.
  110. minItems: 1
  111. maxItems: 8
  112. '#address-cells':
  113. const: 1
  114. '#size-cells':
  115. const: 1
  116. ranges: true
  117. big-endian: true
  118. little-endian: true
  119. required:
  120. - compatible
  121. - reg
  122. if:
  123. properties:
  124. compatible:
  125. contains:
  126. const: cortina,gemini-flash
  127. then:
  128. properties:
  129. syscon:
  130. $ref: /schemas/types.yaml#/definitions/phandle
  131. description:
  132. Phandle to the syscon controller
  133. required:
  134. - syscon
  135. unevaluatedProperties: false
  136. examples:
  137. - |
  138. flash@ff000000 {
  139. compatible = "cfi-flash";
  140. reg = <0xff000000 0x01000000>;
  141. bank-width = <4>;
  142. device-width = <1>;
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. ranges = <0 0xff000000 0x01000000>;
  146. fs@0 {
  147. label = "fs";
  148. reg = <0 0xf80000>;
  149. };
  150. firmware@f80000 {
  151. label = "firmware";
  152. reg = <0xf80000 0x80000>;
  153. read-only;
  154. };
  155. };
  156. - |
  157. /* An example with multiple "reg" tuples */
  158. flash@0 {
  159. compatible = "intel,PC28F640P30T85", "cfi-flash";
  160. reg = <0x00000000 0x02000000>,
  161. <0x02000000 0x02000000>;
  162. bank-width = <2>;
  163. #address-cells = <1>;
  164. #size-cells = <1>;
  165. ranges = <0 0 0x04000000>;
  166. partition@0 {
  167. label = "test-part1";
  168. reg = <0 0x04000000>;
  169. };
  170. };
  171. - |
  172. /* An example using SRAM */
  173. bus {
  174. #address-cells = <2>;
  175. #size-cells = <1>;
  176. sram@2,0 {
  177. compatible = "mtd-ram";
  178. reg = <2 0 0x00200000>;
  179. bank-width = <2>;
  180. };
  181. };
  182. - |
  183. /* An example using addr-gpios */
  184. #include <dt-bindings/gpio/gpio.h>
  185. flash@20000000 {
  186. compatible = "cfi-flash";
  187. reg = <0x20000000 0x02000000>;
  188. bank-width = <2>;
  189. addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  190. #address-cells = <1>;
  191. #size-cells = <1>;
  192. ranges = <0 0x00000000 0x02000000>,
  193. <1 0x02000000 0x02000000>;
  194. partition@0 {
  195. label = "test-part1";
  196. reg = <0 0x04000000>;
  197. };
  198. };
  199. ...