mscc.txt 1.2 KB

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  1. * Microsemi MIPS CPUs
  2. Boards with a SoC of the Microsemi MIPS family shall have the following
  3. properties:
  4. Required properties:
  5. - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
  6. * Other peripherals:
  7. o CPU chip regs:
  8. The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
  9. functionalities: chip ID, general purpose register for software use, reset
  10. controller, hardware status and configuration, efuses.
  11. Required properties:
  12. - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
  13. - reg : Should contain registers location and length
  14. Example:
  15. syscon@71070000 {
  16. compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
  17. reg = <0x71070000 0x1c>;
  18. };
  19. o HSIO regs:
  20. The SoC has a few registers (HSIO) handling miscellaneous functionalities:
  21. configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
  22. status, SerDes muxing and a thermal sensor.
  23. Required properties:
  24. - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
  25. - reg : Should contain registers location and length
  26. Example:
  27. syscon@10d0000 {
  28. compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
  29. reg = <0x10d0000 0x10000>;
  30. };