sprd,ums512-glbreg.yaml 1.5 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. # Copyright 2022 Unisoc Inc.
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: Unisoc System Global Register
  8. maintainers:
  9. - Orson Zhai <orsonzhai@gmail.com>
  10. - Baolin Wang <baolin.wang7@gmail.com>
  11. - Chunyan Zhang <zhang.lyra@gmail.com>
  12. description:
  13. Unisoc system global registers provide register map
  14. for clocks and some multimedia modules of the SoC.
  15. properties:
  16. compatible:
  17. items:
  18. - enum:
  19. - sprd,ums512-glbregs
  20. - sprd,ums9620-glbregs
  21. - const: syscon
  22. - const: simple-mfd
  23. "#address-cells":
  24. const: 1
  25. "#size-cells":
  26. const: 1
  27. ranges:
  28. maxItems: 1
  29. reg:
  30. maxItems: 1
  31. patternProperties:
  32. "^clock-controller@[0-9a-f]+$":
  33. type: object
  34. $ref: /schemas/clock/sprd,ums512-clk.yaml#
  35. description:
  36. Clock controller for the SoC clocks.
  37. required:
  38. - compatible
  39. - reg
  40. additionalProperties: false
  41. examples:
  42. - |
  43. ap_apb_regs: syscon@71000000 {
  44. compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";
  45. reg = <0x71000000 0x3000>;
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. ranges = <0 0x71000000 0x3000>;
  49. clock-controller@0 {
  50. compatible = "sprd,ums512-apahb-gate";
  51. reg = <0x0 0x2000>;
  52. #clock-cells = <1>;
  53. };
  54. };
  55. - |
  56. ap_intc5_regs: syscon@32360000 {
  57. compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";
  58. reg = <0x32360000 0x1000>;
  59. };