adf4371.yaml 1.7 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers
  7. maintainers:
  8. - Marcelo Schmitt <marcelo.schmitt@analog.com>
  9. - Nuno Sá <nuno.sa@analog.com>
  10. description: |
  11. Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers
  12. https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf
  13. https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf
  14. properties:
  15. compatible:
  16. enum:
  17. - adi,adf4371
  18. - adi,adf4372
  19. reg:
  20. maxItems: 1
  21. clocks:
  22. description:
  23. Definition of the external clock (see clock/clock-bindings.txt)
  24. maxItems: 1
  25. clock-names:
  26. description:
  27. Must be "clkin" if the input reference is single ended or "clkin-diff"
  28. if the input reference is differential.
  29. enum: [clkin, clkin-diff]
  30. adi,mute-till-lock-en:
  31. type: boolean
  32. description:
  33. If this property is present, then the supply current to RF8P and RF8N
  34. output stage will shut down until the ADF4371/ADF4372 achieves lock as
  35. measured by the digital lock detect circuitry.
  36. required:
  37. - compatible
  38. - reg
  39. - clocks
  40. - clock-names
  41. allOf:
  42. - $ref: /schemas/spi/spi-peripheral-props.yaml#
  43. unevaluatedProperties: false
  44. examples:
  45. - |
  46. spi {
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. frequency@0 {
  50. compatible = "adi,adf4371";
  51. reg = <0>;
  52. spi-max-frequency = <1000000>;
  53. clocks = <&adf4371_clkin>;
  54. clock-names = "clkin";
  55. };
  56. };
  57. ...