aspeed,i2c.yaml 1.4 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
  7. maintainers:
  8. - Rayn Chen <rayn_chen@aspeedtech.com>
  9. allOf:
  10. - $ref: /schemas/i2c/i2c-controller.yaml#
  11. properties:
  12. compatible:
  13. enum:
  14. - aspeed,ast2400-i2c-bus
  15. - aspeed,ast2500-i2c-bus
  16. - aspeed,ast2600-i2c-bus
  17. reg:
  18. minItems: 1
  19. items:
  20. - description: address offset and range of bus
  21. - description: address offset and range of bus buffer
  22. interrupts:
  23. maxItems: 1
  24. clocks:
  25. maxItems: 1
  26. description:
  27. root clock of bus, should reference the APB
  28. clock in the second cell
  29. resets:
  30. maxItems: 1
  31. bus-frequency:
  32. minimum: 500
  33. maximum: 4000000
  34. default: 100000
  35. description: frequency of the bus clock in Hz defaults to 100 kHz when not
  36. specified
  37. required:
  38. - reg
  39. - compatible
  40. - clocks
  41. - resets
  42. unevaluatedProperties: false
  43. examples:
  44. - |
  45. #include <dt-bindings/clock/aspeed-clock.h>
  46. i2c@40 {
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. compatible = "aspeed,ast2500-i2c-bus";
  50. reg = <0x40 0x40>;
  51. clocks = <&syscon ASPEED_CLK_APB>;
  52. resets = <&syscon ASPEED_RESET_I2C>;
  53. bus-frequency = <100000>;
  54. interrupts = <0>;
  55. interrupt-parent = <&i2c_ic>;
  56. };