fsl,dsp.yaml 5.9 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: NXP i.MX8 DSP core
  7. maintainers:
  8. - Daniel Baluta <daniel.baluta@nxp.com>
  9. - Shengjiu Wang <shengjiu.wang@nxp.com>
  10. description: |
  11. Some boards from i.MX8 family contain a DSP core used for
  12. advanced pre- and post- audio processing.
  13. properties:
  14. compatible:
  15. enum:
  16. - fsl,imx8qxp-dsp
  17. - fsl,imx8qm-dsp
  18. - fsl,imx8mp-dsp
  19. - fsl,imx8ulp-dsp
  20. - fsl,imx8qxp-hifi4
  21. - fsl,imx8qm-hifi4
  22. - fsl,imx8mp-hifi4
  23. - fsl,imx8ulp-hifi4
  24. reg:
  25. maxItems: 1
  26. clocks:
  27. items:
  28. - description: ipg clock
  29. - description: ocram clock
  30. - description: core clock
  31. - description: debug interface clock
  32. - description: message unit clock
  33. minItems: 3
  34. clock-names:
  35. items:
  36. - const: ipg
  37. - const: ocram
  38. - const: core
  39. - const: debug
  40. - const: mu
  41. minItems: 3
  42. power-domains:
  43. description:
  44. List of phandle and PM domain specifier as documented in
  45. Documentation/devicetree/bindings/power/power_domain.txt
  46. minItems: 1
  47. maxItems: 4
  48. mboxes:
  49. description:
  50. List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
  51. or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB
  52. (see mailbox/fsl,mu.txt)
  53. minItems: 3
  54. maxItems: 4
  55. mbox-names:
  56. minItems: 3
  57. maxItems: 4
  58. memory-region:
  59. description:
  60. phandle to a node describing reserved memory (System RAM memory)
  61. used by DSP (see bindings/reserved-memory/reserved-memory.txt)
  62. minItems: 1
  63. maxItems: 4
  64. firmware-name:
  65. description: |
  66. Default name of the firmware to load to the remote processor.
  67. fsl,dsp-ctrl:
  68. $ref: /schemas/types.yaml#/definitions/phandle
  69. description:
  70. Phandle to syscon block which provide access for processor enablement
  71. resets:
  72. minItems: 1
  73. reset-names:
  74. minItems: 1
  75. items:
  76. - const: runstall
  77. - const: softreset
  78. access-controllers:
  79. maxItems: 1
  80. required:
  81. - compatible
  82. - reg
  83. - clocks
  84. - clock-names
  85. - power-domains
  86. - mboxes
  87. - mbox-names
  88. - memory-region
  89. allOf:
  90. - if:
  91. properties:
  92. compatible:
  93. contains:
  94. enum:
  95. - fsl,imx8qxp-dsp
  96. - fsl,imx8qxp-hifi4
  97. then:
  98. properties:
  99. power-domains:
  100. minItems: 2
  101. maxItems: 2
  102. - if:
  103. properties:
  104. compatible:
  105. contains:
  106. enum:
  107. - fsl,imx8qm-dsp
  108. - fsl,imx8qm-hifi4
  109. then:
  110. properties:
  111. power-domains:
  112. minItems: 4
  113. - if:
  114. properties:
  115. compatible:
  116. contains:
  117. enum:
  118. - fsl,imx8mp-dsp
  119. - fsl,imx8mp-hifi4
  120. - fsl,imx8ulp-dsp
  121. - fsl,imx8ulp-hifi4
  122. then:
  123. properties:
  124. power-domains:
  125. maxItems: 1
  126. - if:
  127. properties:
  128. compatible:
  129. contains:
  130. enum:
  131. - fsl,imx8qxp-hifi4
  132. - fsl,imx8qm-hifi4
  133. - fsl,imx8mp-hifi4
  134. - fsl,imx8ulp-hifi4
  135. then:
  136. properties:
  137. memory-region:
  138. minItems: 4
  139. mboxes:
  140. maxItems: 3
  141. mbox-names:
  142. items:
  143. - const: tx
  144. - const: rx
  145. - const: rxdb
  146. else:
  147. properties:
  148. memory-region:
  149. maxItems: 1
  150. mboxes:
  151. minItems: 4
  152. mbox-names:
  153. items:
  154. - const: txdb0
  155. - const: txdb1
  156. - const: rxdb0
  157. - const: rxdb1
  158. - if:
  159. properties:
  160. compatible:
  161. contains:
  162. enum:
  163. - fsl,imx8mp-dsp
  164. - fsl,imx8mp-hifi4
  165. then:
  166. required:
  167. - resets
  168. - reset-names
  169. additionalProperties: false
  170. examples:
  171. - |
  172. #include <dt-bindings/firmware/imx/rsrc.h>
  173. #include <dt-bindings/clock/imx8-clock.h>
  174. dsp@596e8000 {
  175. compatible = "fsl,imx8qxp-dsp";
  176. reg = <0x596e8000 0x88000>;
  177. clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
  178. <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
  179. <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
  180. clock-names = "ipg", "ocram", "core";
  181. power-domains = <&pd IMX_SC_R_MU_13B>,
  182. <&pd IMX_SC_R_MU_2A>;
  183. mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
  184. mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
  185. memory-region = <&dsp_reserved>;
  186. };
  187. - |
  188. #include <dt-bindings/clock/imx8mp-clock.h>
  189. #include <dt-bindings/reset/imx8mp-reset-audiomix.h>
  190. dsp_reserved: dsp@92400000 {
  191. reg = <0x92400000 0x1000000>;
  192. no-map;
  193. };
  194. dsp_vdev0vring0: vdev0vring0@942f0000 {
  195. reg = <0x942f0000 0x8000>;
  196. no-map;
  197. };
  198. dsp_vdev0vring1: vdev0vring1@942f8000 {
  199. reg = <0x942f8000 0x8000>;
  200. no-map;
  201. };
  202. dsp_vdev0buffer: vdev0buffer@94300000 {
  203. compatible = "shared-dma-pool";
  204. reg = <0x94300000 0x100000>;
  205. no-map;
  206. };
  207. dsp: dsp@3b6e8000 {
  208. compatible = "fsl,imx8mp-hifi4";
  209. reg = <0x3b6e8000 0x88000>;
  210. clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
  211. <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>,
  212. <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
  213. <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>;
  214. clock-names = "ipg", "ocram", "core", "debug";
  215. firmware-name = "imx/dsp/hifi4.bin";
  216. power-domains = <&audiomix_pd>;
  217. mbox-names = "tx", "rx", "rxdb";
  218. mboxes = <&mu2 0 0>,
  219. <&mu2 1 0>,
  220. <&mu2 3 0>;
  221. memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
  222. <&dsp_vdev0vring1>, <&dsp_reserved>;
  223. resets = <&audio_blk_ctrl IMX8MP_AUDIOMIX_DSP_RUNSTALL>;
  224. reset-names = "runstall";
  225. };