nvidia,tegra20-csi.yaml 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138
  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-csi.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: NVIDIA Tegra20 CSI controller
  7. maintainers:
  8. - Svyatoslav Ryhel <clamor95@gmail.com>
  9. properties:
  10. compatible:
  11. enum:
  12. - nvidia,tegra20-csi
  13. - nvidia,tegra30-csi
  14. reg:
  15. maxItems: 1
  16. clocks:
  17. minItems: 1
  18. items:
  19. - description: module clock
  20. - description: PAD A clock
  21. - description: PAD B clock
  22. clock-names:
  23. items:
  24. - const: csi
  25. - const: csia-pad
  26. - const: csib-pad
  27. avdd-dsi-csi-supply:
  28. description: DSI/CSI power supply. Must supply 1.2 V.
  29. power-domains:
  30. maxItems: 1
  31. "#nvidia,mipi-calibrate-cells":
  32. description:
  33. The number of cells in a MIPI calibration specifier. Should be 1.
  34. The single cell specifies an id of the pad that need to be
  35. calibrated for a given device. Valid pad ids for receiver would be
  36. 0 for CSI-A; 1 for CSI-B; 2 for DSI-A and 3 for DSI-B.
  37. $ref: /schemas/types.yaml#/definitions/uint32
  38. const: 1
  39. "#address-cells":
  40. const: 1
  41. "#size-cells":
  42. const: 0
  43. patternProperties:
  44. "^channel@[0-1]$":
  45. type: object
  46. description: channel 0 represents CSI-A and 1 represents CSI-B
  47. additionalProperties: false
  48. properties:
  49. reg:
  50. maximum: 1
  51. nvidia,mipi-calibrate:
  52. description: Should contain a phandle and a specifier specifying
  53. which pad is used by this CSI channel and needs to be calibrated.
  54. $ref: /schemas/types.yaml#/definitions/phandle-array
  55. "#address-cells":
  56. const: 1
  57. "#size-cells":
  58. const: 0
  59. port@0:
  60. $ref: /schemas/graph.yaml#/$defs/port-base
  61. unevaluatedProperties: false
  62. description: port receiving the video stream from the sensor
  63. properties:
  64. endpoint:
  65. $ref: /schemas/media/video-interfaces.yaml#
  66. unevaluatedProperties: false
  67. required:
  68. - data-lanes
  69. port@1:
  70. $ref: /schemas/graph.yaml#/properties/port
  71. description: port sending the video stream to the VI
  72. required:
  73. - reg
  74. - "#address-cells"
  75. - "#size-cells"
  76. - port@0
  77. - port@1
  78. allOf:
  79. - if:
  80. properties:
  81. compatible:
  82. contains:
  83. enum:
  84. - nvidia,tegra20-csi
  85. then:
  86. properties:
  87. clocks:
  88. maxItems: 1
  89. clock-names: false
  90. - if:
  91. properties:
  92. compatible:
  93. contains:
  94. enum:
  95. - nvidia,tegra30-csi
  96. then:
  97. properties:
  98. clocks:
  99. minItems: 3
  100. clock-names:
  101. minItems: 3
  102. additionalProperties: false
  103. required:
  104. - compatible
  105. - reg
  106. - clocks
  107. - power-domains
  108. - "#address-cells"
  109. - "#size-cells"
  110. # see nvidia,tegra20-vi.yaml for an example