hdmi.yaml 5.3 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/msm/hdmi.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm Adreno/Snapdragon HDMI output
  7. maintainers:
  8. - Rob Clark <robdclark@gmail.com>
  9. properties:
  10. compatible:
  11. enum:
  12. - qcom,hdmi-tx-8084
  13. - qcom,hdmi-tx-8660
  14. - qcom,hdmi-tx-8960
  15. - qcom,hdmi-tx-8974
  16. - qcom,hdmi-tx-8994
  17. - qcom,hdmi-tx-8996
  18. - qcom,hdmi-tx-8998
  19. clocks:
  20. minItems: 1
  21. maxItems: 8
  22. clock-names:
  23. minItems: 1
  24. maxItems: 8
  25. reg:
  26. minItems: 1
  27. maxItems: 3
  28. reg-names:
  29. minItems: 1
  30. items:
  31. - const: core_physical
  32. - const: qfprom_physical
  33. - const: hdcp_physical
  34. interrupts:
  35. maxItems: 1
  36. phys:
  37. maxItems: 1
  38. phy-names:
  39. enum:
  40. - hdmi_phy
  41. - hdmi-phy
  42. deprecated: true
  43. core-vdda-supply:
  44. description: phandle to VDDA supply regulator
  45. hdmi-mux-supply:
  46. description: phandle to mux regulator
  47. deprecated: true
  48. core-vcc-supply:
  49. description: phandle to VCC supply regulator
  50. hpd-gpios:
  51. maxItems: 1
  52. description: hpd pin
  53. '#sound-dai-cells':
  54. const: 1
  55. ports:
  56. type: object
  57. $ref: /schemas/graph.yaml#/properties/ports
  58. properties:
  59. port@0:
  60. $ref: /schemas/graph.yaml#/properties/port
  61. description: |
  62. Input endpoints of the controller.
  63. port@1:
  64. $ref: /schemas/graph.yaml#/properties/port
  65. description: |
  66. Output endpoints of the controller.
  67. required:
  68. - port@0
  69. required:
  70. - compatible
  71. - clocks
  72. - clock-names
  73. - reg
  74. - reg-names
  75. - interrupts
  76. - phys
  77. allOf:
  78. - if:
  79. properties:
  80. compatible:
  81. contains:
  82. enum:
  83. - qcom,hdmi-tx-8960
  84. - qcom,hdmi-tx-8660
  85. then:
  86. properties:
  87. clocks:
  88. minItems: 3
  89. maxItems: 3
  90. clock-names:
  91. items:
  92. - const: core
  93. - const: master_iface
  94. - const: slave_iface
  95. core-vcc-supplies: false
  96. - if:
  97. properties:
  98. compatible:
  99. contains:
  100. enum:
  101. - qcom,hdmi-tx-8974
  102. - qcom,hdmi-tx-8084
  103. - qcom,hdmi-tx-8994
  104. - qcom,hdmi-tx-8996
  105. then:
  106. properties:
  107. clocks:
  108. minItems: 5
  109. maxItems: 5
  110. clock-names:
  111. items:
  112. - const: mdp_core
  113. - const: iface
  114. - const: core
  115. - const: alt_iface
  116. - const: extp
  117. hdmi-mux-supplies: false
  118. - if:
  119. properties:
  120. compatible:
  121. contains:
  122. enum:
  123. - qcom,hdmi-tx-8998
  124. then:
  125. properties:
  126. clocks:
  127. minItems: 8
  128. maxItems: 8
  129. clock-names:
  130. items:
  131. - const: mdp_core
  132. - const: iface
  133. - const: core
  134. - const: alt_iface
  135. - const: extp
  136. - const: bus
  137. - const: mnoc
  138. - const: iface_mmss
  139. additionalProperties: false
  140. examples:
  141. - |
  142. #include <dt-bindings/gpio/gpio.h>
  143. #include <dt-bindings/interrupt-controller/irq.h>
  144. #include <dt-bindings/interrupt-controller/arm-gic.h>
  145. hdmi: hdmi@4a00000 {
  146. compatible = "qcom,hdmi-tx-8960";
  147. reg-names = "core_physical";
  148. reg = <0x04a00000 0x2f0>;
  149. interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
  150. clock-names = "core",
  151. "master_iface",
  152. "slave_iface";
  153. clocks = <&clk 61>,
  154. <&clk 72>,
  155. <&clk 98>;
  156. hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
  157. core-vdda-supply = <&pm8921_hdmi_mvs>;
  158. hdmi-mux-supply = <&ext_3p3v>;
  159. pinctrl-names = "default", "sleep";
  160. pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
  161. pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
  162. phys = <&hdmi_phy>;
  163. };
  164. - |
  165. #include <dt-bindings/clock/qcom,gcc-msm8996.h>
  166. #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
  167. #include <dt-bindings/gpio/gpio.h>
  168. #include <dt-bindings/interrupt-controller/irq.h>
  169. #include <dt-bindings/interrupt-controller/arm-gic.h>
  170. hdmi@9a0000 {
  171. compatible = "qcom,hdmi-tx-8996";
  172. reg = <0x009a0000 0x50c>,
  173. <0x00070000 0x6158>,
  174. <0x009e0000 0xfff>;
  175. reg-names = "core_physical",
  176. "qfprom_physical",
  177. "hdcp_physical";
  178. interrupt-parent = <&mdss>;
  179. interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
  180. clocks = <&mmcc MDSS_MDP_CLK>,
  181. <&mmcc MDSS_AHB_CLK>,
  182. <&mmcc MDSS_HDMI_CLK>,
  183. <&mmcc MDSS_HDMI_AHB_CLK>,
  184. <&mmcc MDSS_EXTPCLK_CLK>;
  185. clock-names = "mdp_core",
  186. "iface",
  187. "core",
  188. "alt_iface",
  189. "extp";
  190. phys = <&hdmi_phy>;
  191. #sound-dai-cells = <1>;
  192. pinctrl-names = "default", "sleep";
  193. pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;
  194. pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>;
  195. core-vdda-supply = <&vreg_l12a_1p8>;
  196. core-vcc-supply = <&vreg_s4a_1p8>;
  197. ports {
  198. #address-cells = <1>;
  199. #size-cells = <0>;
  200. port@0 {
  201. reg = <0>;
  202. endpoint {
  203. remote-endpoint = <&mdp5_intf3_out>;
  204. };
  205. };
  206. };
  207. };
  208. ...