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- # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
- %YAML 1.2
- ---
- $id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml#
- $schema: http://devicetree.org/meta-schemas/core.yaml#
- title: ITE IT6263 LVDS to HDMI converter
- maintainers:
- - Liu Ying <victor.liu@nxp.com>
- description: |
- The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
- to HDMI converter. Combined with LVDS receiver and HDMI 1.4a transmitter,
- the IT6263 supports LVDS input and HDMI 1.4 output by conversion function.
- The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
- and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
- 1.2 and backward compatible with DVI 1.0 specification.
- The IT6263 also encodes and transmits up to 8 channels of I2S digital audio,
- with sampling rate up to 192KHz and sample size up to 24 bits. In addition,
- an S/PDIF input port takes in compressed audio of up to 192KHz frame rate.
- The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is
- provided by the IT6263 in two interfaces: the four I2S input ports or the
- S/PDIF input port. With both interfaces the highest possible HBR frame rate
- is supported at up to 768KHz.
- allOf:
- - $ref: /schemas/display/lvds-dual-ports.yaml#
- - $ref: /schemas/sound/dai-common.yaml#
- properties:
- compatible:
- const: ite,it6263
- reg:
- maxItems: 1
- clocks:
- maxItems: 1
- description: audio master clock
- clock-names:
- const: mclk
- data-mapping:
- enum:
- - jeida-18
- - jeida-24
- - jeida-30
- - vesa-24
- - vesa-30
- reset-gpios:
- maxItems: 1
- ivdd-supply:
- description: 1.8V digital logic power
- ovdd-supply:
- description: 3.3V I/O pin power
- txavcc18-supply:
- description: 1.8V HDMI analog frontend power
- txavcc33-supply:
- description: 3.3V HDMI analog frontend power
- pvcc1-supply:
- description: 1.8V HDMI frontend core PLL power
- pvcc2-supply:
- description: 1.8V HDMI frontend filter PLL power
- avcc-supply:
- description: 3.3V LVDS frontend power
- anvdd-supply:
- description: 1.8V LVDS frontend analog power
- apvdd-supply:
- description: 1.8V LVDS frontend PLL power
- "#sound-dai-cells":
- const: 0
- ite,i2s-audio-fifo-sources:
- $ref: /schemas/types.yaml#/definitions/uint32-array
- minItems: 1
- maxItems: 4
- items:
- enum: [0, 1, 2, 3]
- description:
- Each array element indicates the pin number of an I2S serial data input
- line which is connected to an audio FIFO, from audio FIFO0 to FIFO3.
- ite,rl-channel-swap-audio-sources:
- $ref: /schemas/types.yaml#/definitions/uint32-array
- minItems: 1
- maxItems: 4
- uniqueItems: true
- items:
- enum: [0, 1, 2, 3]
- description:
- Each array element indicates an audio source whose right channel and left
- channel are swapped by this converter. For I2S, the element is the pin
- number of an I2S serial data input line. For S/PDIF, the element is always
- 0.
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- properties:
- port@0: true
- port@1:
- oneOf:
- - required: [dual-lvds-odd-pixels]
- - required: [dual-lvds-even-pixels]
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: video port for the HDMI output
- port@3:
- $ref: /schemas/graph.yaml#/properties/port
- description: sound input port
- required:
- - port@0
- - port@2
- required:
- - compatible
- - reg
- - data-mapping
- - ivdd-supply
- - ovdd-supply
- - txavcc18-supply
- - txavcc33-supply
- - pvcc1-supply
- - pvcc2-supply
- - avcc-supply
- - anvdd-supply
- - apvdd-supply
- unevaluatedProperties: false
- examples:
- - |
- /* single-link LVDS input */
- #include <dt-bindings/gpio/gpio.h>
- i2c {
- #address-cells = <1>;
- #size-cells = <0>;
- hdmi@4c {
- compatible = "ite,it6263";
- reg = <0x4c>;
- data-mapping = "jeida-24";
- reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- ivdd-supply = <®_buck5>;
- ovdd-supply = <®_vext_3v3>;
- txavcc18-supply = <®_buck5>;
- txavcc33-supply = <®_vext_3v3>;
- pvcc1-supply = <®_buck5>;
- pvcc2-supply = <®_buck5>;
- avcc-supply = <®_vext_3v3>;
- anvdd-supply = <®_buck5>;
- apvdd-supply = <®_buck5>;
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- it6263_lvds_link1: endpoint {
- remote-endpoint = <&ldb_lvds_ch0>;
- };
- };
- port@2 {
- reg = <2>;
- it6263_out: endpoint {
- remote-endpoint = <&hdmi_in>;
- };
- };
- };
- };
- };
- - |
- /* dual-link LVDS input */
- #include <dt-bindings/gpio/gpio.h>
- i2c {
- #address-cells = <1>;
- #size-cells = <0>;
- hdmi@4c {
- compatible = "ite,it6263";
- reg = <0x4c>;
- data-mapping = "jeida-24";
- reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- ivdd-supply = <®_buck5>;
- ovdd-supply = <®_vext_3v3>;
- txavcc18-supply = <®_buck5>;
- txavcc33-supply = <®_vext_3v3>;
- pvcc1-supply = <®_buck5>;
- pvcc2-supply = <®_buck5>;
- avcc-supply = <®_vext_3v3>;
- anvdd-supply = <®_buck5>;
- apvdd-supply = <®_buck5>;
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- dual-lvds-odd-pixels;
- it6263_lvds_link1_dual: endpoint {
- remote-endpoint = <&ldb_lvds_ch0>;
- };
- };
- port@1 {
- reg = <1>;
- dual-lvds-even-pixels;
- it6263_lvds_link2_dual: endpoint {
- remote-endpoint = <&ldb_lvds_ch1>;
- };
- };
- port@2 {
- reg = <2>;
- it6263_out_dual: endpoint {
- remote-endpoint = <&hdmi_in>;
- };
- };
- };
- };
- };
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