ite,it6263.yaml 6.4 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: ITE IT6263 LVDS to HDMI converter
  7. maintainers:
  8. - Liu Ying <victor.liu@nxp.com>
  9. description: |
  10. The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
  11. to HDMI converter. Combined with LVDS receiver and HDMI 1.4a transmitter,
  12. the IT6263 supports LVDS input and HDMI 1.4 output by conversion function.
  13. The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
  14. and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
  15. 1.2 and backward compatible with DVI 1.0 specification.
  16. The IT6263 also encodes and transmits up to 8 channels of I2S digital audio,
  17. with sampling rate up to 192KHz and sample size up to 24 bits. In addition,
  18. an S/PDIF input port takes in compressed audio of up to 192KHz frame rate.
  19. The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is
  20. provided by the IT6263 in two interfaces: the four I2S input ports or the
  21. S/PDIF input port. With both interfaces the highest possible HBR frame rate
  22. is supported at up to 768KHz.
  23. allOf:
  24. - $ref: /schemas/display/lvds-dual-ports.yaml#
  25. - $ref: /schemas/sound/dai-common.yaml#
  26. properties:
  27. compatible:
  28. const: ite,it6263
  29. reg:
  30. maxItems: 1
  31. clocks:
  32. maxItems: 1
  33. description: audio master clock
  34. clock-names:
  35. const: mclk
  36. data-mapping:
  37. enum:
  38. - jeida-18
  39. - jeida-24
  40. - jeida-30
  41. - vesa-24
  42. - vesa-30
  43. reset-gpios:
  44. maxItems: 1
  45. ivdd-supply:
  46. description: 1.8V digital logic power
  47. ovdd-supply:
  48. description: 3.3V I/O pin power
  49. txavcc18-supply:
  50. description: 1.8V HDMI analog frontend power
  51. txavcc33-supply:
  52. description: 3.3V HDMI analog frontend power
  53. pvcc1-supply:
  54. description: 1.8V HDMI frontend core PLL power
  55. pvcc2-supply:
  56. description: 1.8V HDMI frontend filter PLL power
  57. avcc-supply:
  58. description: 3.3V LVDS frontend power
  59. anvdd-supply:
  60. description: 1.8V LVDS frontend analog power
  61. apvdd-supply:
  62. description: 1.8V LVDS frontend PLL power
  63. "#sound-dai-cells":
  64. const: 0
  65. ite,i2s-audio-fifo-sources:
  66. $ref: /schemas/types.yaml#/definitions/uint32-array
  67. minItems: 1
  68. maxItems: 4
  69. items:
  70. enum: [0, 1, 2, 3]
  71. description:
  72. Each array element indicates the pin number of an I2S serial data input
  73. line which is connected to an audio FIFO, from audio FIFO0 to FIFO3.
  74. ite,rl-channel-swap-audio-sources:
  75. $ref: /schemas/types.yaml#/definitions/uint32-array
  76. minItems: 1
  77. maxItems: 4
  78. uniqueItems: true
  79. items:
  80. enum: [0, 1, 2, 3]
  81. description:
  82. Each array element indicates an audio source whose right channel and left
  83. channel are swapped by this converter. For I2S, the element is the pin
  84. number of an I2S serial data input line. For S/PDIF, the element is always
  85. 0.
  86. ports:
  87. $ref: /schemas/graph.yaml#/properties/ports
  88. properties:
  89. port@0: true
  90. port@1:
  91. oneOf:
  92. - required: [dual-lvds-odd-pixels]
  93. - required: [dual-lvds-even-pixels]
  94. port@2:
  95. $ref: /schemas/graph.yaml#/properties/port
  96. description: video port for the HDMI output
  97. port@3:
  98. $ref: /schemas/graph.yaml#/properties/port
  99. description: sound input port
  100. required:
  101. - port@0
  102. - port@2
  103. required:
  104. - compatible
  105. - reg
  106. - data-mapping
  107. - ivdd-supply
  108. - ovdd-supply
  109. - txavcc18-supply
  110. - txavcc33-supply
  111. - pvcc1-supply
  112. - pvcc2-supply
  113. - avcc-supply
  114. - anvdd-supply
  115. - apvdd-supply
  116. unevaluatedProperties: false
  117. examples:
  118. - |
  119. /* single-link LVDS input */
  120. #include <dt-bindings/gpio/gpio.h>
  121. i2c {
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. hdmi@4c {
  125. compatible = "ite,it6263";
  126. reg = <0x4c>;
  127. data-mapping = "jeida-24";
  128. reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
  129. ivdd-supply = <&reg_buck5>;
  130. ovdd-supply = <&reg_vext_3v3>;
  131. txavcc18-supply = <&reg_buck5>;
  132. txavcc33-supply = <&reg_vext_3v3>;
  133. pvcc1-supply = <&reg_buck5>;
  134. pvcc2-supply = <&reg_buck5>;
  135. avcc-supply = <&reg_vext_3v3>;
  136. anvdd-supply = <&reg_buck5>;
  137. apvdd-supply = <&reg_buck5>;
  138. ports {
  139. #address-cells = <1>;
  140. #size-cells = <0>;
  141. port@0 {
  142. reg = <0>;
  143. it6263_lvds_link1: endpoint {
  144. remote-endpoint = <&ldb_lvds_ch0>;
  145. };
  146. };
  147. port@2 {
  148. reg = <2>;
  149. it6263_out: endpoint {
  150. remote-endpoint = <&hdmi_in>;
  151. };
  152. };
  153. };
  154. };
  155. };
  156. - |
  157. /* dual-link LVDS input */
  158. #include <dt-bindings/gpio/gpio.h>
  159. i2c {
  160. #address-cells = <1>;
  161. #size-cells = <0>;
  162. hdmi@4c {
  163. compatible = "ite,it6263";
  164. reg = <0x4c>;
  165. data-mapping = "jeida-24";
  166. reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
  167. ivdd-supply = <&reg_buck5>;
  168. ovdd-supply = <&reg_vext_3v3>;
  169. txavcc18-supply = <&reg_buck5>;
  170. txavcc33-supply = <&reg_vext_3v3>;
  171. pvcc1-supply = <&reg_buck5>;
  172. pvcc2-supply = <&reg_buck5>;
  173. avcc-supply = <&reg_vext_3v3>;
  174. anvdd-supply = <&reg_buck5>;
  175. apvdd-supply = <&reg_buck5>;
  176. ports {
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. port@0 {
  180. reg = <0>;
  181. dual-lvds-odd-pixels;
  182. it6263_lvds_link1_dual: endpoint {
  183. remote-endpoint = <&ldb_lvds_ch0>;
  184. };
  185. };
  186. port@1 {
  187. reg = <1>;
  188. dual-lvds-even-pixels;
  189. it6263_lvds_link2_dual: endpoint {
  190. remote-endpoint = <&ldb_lvds_ch1>;
  191. };
  192. };
  193. port@2 {
  194. reg = <2>;
  195. it6263_out_dual: endpoint {
  196. remote-endpoint = <&hdmi_in>;
  197. };
  198. };
  199. };
  200. };
  201. };