arm,malidp.yaml 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119
  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/arm,malidp.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Arm Mali Display Processor (Mali-DP)
  7. maintainers:
  8. - Liviu Dudau <Liviu.Dudau@arm.com>
  9. - Andre Przywara <andre.przywara@arm.com>
  10. description:
  11. The following bindings apply to a family of Display Processors sold as
  12. licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
  13. DP650 processors that offer multiple composition layers, support for
  14. rotation and scaling output.
  15. properties:
  16. compatible:
  17. enum:
  18. - arm,mali-dp500
  19. - arm,mali-dp550
  20. - arm,mali-dp650
  21. reg:
  22. maxItems: 1
  23. interrupts:
  24. items:
  25. - description:
  26. The interrupt used by the Display Engine (DE). Can be shared with
  27. the interrupt for the Scaling Engine (SE), but it will have to be
  28. listed individually.
  29. - description:
  30. The interrupt used by the Scaling Engine (SE). Can be shared with
  31. the interrupt for the Display Engine (DE), but it will have to be
  32. listed individually.
  33. interrupt-names:
  34. items:
  35. - const: DE
  36. - const: SE
  37. clock-names:
  38. items:
  39. - const: pxlclk
  40. - const: mclk
  41. - const: aclk
  42. - const: pclk
  43. clocks:
  44. items:
  45. - description: the pixel clock feeding the output PLL of the processor
  46. - description: the main processor clock
  47. - description: the AXI interface clock
  48. - description: the APB interface clock
  49. memory-region:
  50. maxItems: 1
  51. description:
  52. Phandle to a node describing memory to be used for the framebuffer.
  53. If not present, the framebuffer may be located anywhere in memory.
  54. arm,malidp-output-port-lines:
  55. $ref: /schemas/types.yaml#/definitions/uint8-array
  56. description:
  57. Number of output lines/bits for each colour channel.
  58. items:
  59. - description: number of output lines for the red channel (R)
  60. - description: number of output lines for the green channel (G)
  61. - description: number of output lines for the blue channel (B)
  62. arm,malidp-arqos-value:
  63. $ref: /schemas/types.yaml#/definitions/uint32
  64. description:
  65. Quality-of-Service value for the display engine FIFOs, to write
  66. into the RQOS register of the DP500.
  67. See the ARM Mali-DP500 TRM for details on the encoding.
  68. If omitted, the RQOS register will not be changed.
  69. port:
  70. $ref: /schemas/graph.yaml#/properties/port
  71. unevaluatedProperties: false
  72. description:
  73. Output endpoint of the controller, connecting the LCD panel signals.
  74. additionalProperties: false
  75. required:
  76. - compatible
  77. - reg
  78. - interrupts
  79. - interrupt-names
  80. - clocks
  81. - clock-names
  82. - port
  83. - arm,malidp-output-port-lines
  84. examples:
  85. - |
  86. dp0: malidp@6f200000 {
  87. compatible = "arm,mali-dp650";
  88. reg = <0x6f200000 0x20000>;
  89. memory-region = <&display_reserved>;
  90. interrupts = <168>, <168>;
  91. interrupt-names = "DE", "SE";
  92. clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
  93. clock-names = "pxlclk", "mclk", "aclk", "pclk";
  94. arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
  95. arm,malidp-arqos-value = <0xd000d000>;
  96. port {
  97. dp0_output: endpoint {
  98. remote-endpoint = <&tda998x_2_input>;
  99. };
  100. };
  101. };
  102. ...