drm-test-tegra.h 2.4 KB

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  1. /*
  2. * Copyright © 2014 NVIDIA Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #ifndef TEGRA_DRM_TEST_TEGRA_H
  23. #define TEGRA_DRM_TEST_TEGRA_H
  24. #include "drm-test.h"
  25. #include "tegra.h"
  26. #define HOST1X_OPCODE_SETCL(offset, classid, mask) \
  27. ((0x0 << 28) | (((offset) & 0xfff) << 16) | (((classid) & 0x3ff) << 6) | ((mask) & 0x3f))
  28. #define HOST1X_OPCODE_INCR(offset, count) \
  29. ((0x1 << 28) | (((offset) & 0xfff) << 16) | ((count) & 0xffff))
  30. #define HOST1X_OPCODE_NONINCR(offset, count) \
  31. ((0x2 << 28) | (((offset) & 0xfff) << 16) | ((count) & 0xffff))
  32. #define HOST1X_OPCODE_MASK(offset, mask) \
  33. ((0x3 << 28) | (((offset) & 0xfff) << 16) | ((mask) & 0xffff))
  34. #define HOST1X_OPCODE_IMM(offset, data) \
  35. ((0x4 << 28) | (((offset) & 0xfff) << 16) | ((data) & 0xffff))
  36. #define HOST1X_OPCODE_EXTEND(subop, value) \
  37. ((0xe << 28) | (((subop) & 0xf) << 24) | ((value) & 0xffffff))
  38. #define HOST1X_CLASS_GR2D 0x51
  39. struct drm_tegra_gr2d {
  40. struct drm_tegra *drm;
  41. struct drm_tegra_channel *channel;
  42. };
  43. int drm_tegra_gr2d_open(struct drm_tegra *drm, struct drm_tegra_gr2d **gr2dp);
  44. int drm_tegra_gr2d_close(struct drm_tegra_gr2d *gr2d);
  45. int drm_tegra_gr2d_fill(struct drm_tegra_gr2d *gr2d, struct drm_framebuffer *fb,
  46. unsigned int x, unsigned int y, unsigned int width,
  47. unsigned int height, uint32_t color);
  48. #endif