radeon_cs_gem.c 17 KB

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  1. /*
  2. * Copyright © 2008 Jérôme Glisse
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16. * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17. * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * The above copyright notice and this permission notice (including the
  23. * next paragraph) shall be included in all copies or substantial portions
  24. * of the Software.
  25. */
  26. /*
  27. * Authors:
  28. * Aapo Tahkola <aet@rasterburn.org>
  29. * Nicolai Haehnle <prefect_@gmx.net>
  30. * Jérôme Glisse <glisse@freedesktop.org>
  31. */
  32. #include <assert.h>
  33. #include <errno.h>
  34. #include <stdlib.h>
  35. #include <string.h>
  36. #include <pthread.h>
  37. #include <sys/ioctl.h>
  38. #include "radeon_cs.h"
  39. #include "radeon_cs_int.h"
  40. #include "radeon_bo_int.h"
  41. #include "radeon_cs_gem.h"
  42. #include "radeon_bo_gem.h"
  43. #include "drm.h"
  44. #include "libdrm_macros.h"
  45. #include "xf86drm.h"
  46. #include "xf86atomic.h"
  47. #include "radeon_drm.h"
  48. /* Add LIBDRM_RADEON_BOF_FILES to libdrm_radeon_la_SOURCES when building with BOF_DUMP */
  49. #define CS_BOF_DUMP 0
  50. #if CS_BOF_DUMP
  51. #include "bof.h"
  52. #endif
  53. struct radeon_cs_manager_gem {
  54. struct radeon_cs_manager base;
  55. uint32_t device_id;
  56. unsigned nbof;
  57. };
  58. #pragma pack(1)
  59. struct cs_reloc_gem {
  60. uint32_t handle;
  61. uint32_t read_domain;
  62. uint32_t write_domain;
  63. uint32_t flags;
  64. };
  65. #pragma pack()
  66. #define RELOC_SIZE (sizeof(struct cs_reloc_gem) / sizeof(uint32_t))
  67. struct cs_gem {
  68. struct radeon_cs_int base;
  69. struct drm_radeon_cs cs;
  70. struct drm_radeon_cs_chunk chunks[2];
  71. unsigned nrelocs;
  72. uint32_t *relocs;
  73. struct radeon_bo_int **relocs_bo;
  74. };
  75. static pthread_mutex_t id_mutex = PTHREAD_MUTEX_INITIALIZER;
  76. static uint32_t cs_id_source = 0;
  77. /**
  78. * result is undefined if called with ~0
  79. */
  80. static uint32_t get_first_zero(const uint32_t n)
  81. {
  82. /* __builtin_ctz returns number of trailing zeros. */
  83. return 1 << __builtin_ctz(~n);
  84. }
  85. /**
  86. * Returns a free id for cs.
  87. * If there is no free id we return zero
  88. **/
  89. static uint32_t generate_id(void)
  90. {
  91. uint32_t r = 0;
  92. pthread_mutex_lock( &id_mutex );
  93. /* check for free ids */
  94. if (cs_id_source != ~r) {
  95. /* find first zero bit */
  96. r = get_first_zero(cs_id_source);
  97. /* set id as reserved */
  98. cs_id_source |= r;
  99. }
  100. pthread_mutex_unlock( &id_mutex );
  101. return r;
  102. }
  103. /**
  104. * Free the id for later reuse
  105. **/
  106. static void free_id(uint32_t id)
  107. {
  108. pthread_mutex_lock( &id_mutex );
  109. cs_id_source &= ~id;
  110. pthread_mutex_unlock( &id_mutex );
  111. }
  112. static struct radeon_cs_int *cs_gem_create(struct radeon_cs_manager *csm,
  113. uint32_t ndw)
  114. {
  115. struct cs_gem *csg;
  116. /* max cmd buffer size is 64Kb */
  117. if (ndw > (64 * 1024 / 4)) {
  118. return NULL;
  119. }
  120. csg = (struct cs_gem*)calloc(1, sizeof(struct cs_gem));
  121. if (csg == NULL) {
  122. return NULL;
  123. }
  124. csg->base.csm = csm;
  125. csg->base.ndw = 64 * 1024 / 4;
  126. csg->base.packets = (uint32_t*)calloc(1, 64 * 1024);
  127. if (csg->base.packets == NULL) {
  128. free(csg);
  129. return NULL;
  130. }
  131. csg->base.relocs_total_size = 0;
  132. csg->base.crelocs = 0;
  133. csg->base.id = generate_id();
  134. csg->nrelocs = 4096 / (4 * 4) ;
  135. csg->relocs_bo = (struct radeon_bo_int**)calloc(1,
  136. csg->nrelocs*sizeof(void*));
  137. if (csg->relocs_bo == NULL) {
  138. free(csg->base.packets);
  139. free(csg);
  140. return NULL;
  141. }
  142. csg->base.relocs = csg->relocs = (uint32_t*)calloc(1, 4096);
  143. if (csg->relocs == NULL) {
  144. free(csg->relocs_bo);
  145. free(csg->base.packets);
  146. free(csg);
  147. return NULL;
  148. }
  149. csg->chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
  150. csg->chunks[0].length_dw = 0;
  151. csg->chunks[0].chunk_data = (uint64_t)(uintptr_t)csg->base.packets;
  152. csg->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
  153. csg->chunks[1].length_dw = 0;
  154. csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
  155. return (struct radeon_cs_int*)csg;
  156. }
  157. static int cs_gem_write_reloc(struct radeon_cs_int *cs,
  158. struct radeon_bo *bo,
  159. uint32_t read_domain,
  160. uint32_t write_domain,
  161. uint32_t flags)
  162. {
  163. struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
  164. struct cs_gem *csg = (struct cs_gem*)cs;
  165. struct cs_reloc_gem *reloc;
  166. uint32_t idx;
  167. unsigned i;
  168. assert(boi->space_accounted);
  169. /* check domains */
  170. if ((read_domain && write_domain) || (!read_domain && !write_domain)) {
  171. /* in one CS a bo can only be in read or write domain but not
  172. * in read & write domain at the same time
  173. */
  174. return -EINVAL;
  175. }
  176. if (read_domain == RADEON_GEM_DOMAIN_CPU) {
  177. return -EINVAL;
  178. }
  179. if (write_domain == RADEON_GEM_DOMAIN_CPU) {
  180. return -EINVAL;
  181. }
  182. /* use bit field hash function to determine
  183. if this bo is for sure not in this cs.*/
  184. if ((atomic_read((atomic_t *)radeon_gem_get_reloc_in_cs(bo)) & cs->id)) {
  185. /* check if bo is already referenced.
  186. * Scanning from end to begin reduces cycles with mesa because
  187. * it often relocates same shared dma bo again. */
  188. for(i = cs->crelocs; i != 0;) {
  189. --i;
  190. idx = i * RELOC_SIZE;
  191. reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
  192. if (reloc->handle == bo->handle) {
  193. /* Check domains must be in read or write. As we check already
  194. * checked that in argument one of the read or write domain was
  195. * set we only need to check that if previous reloc as the read
  196. * domain set then the read_domain should also be set for this
  197. * new relocation.
  198. */
  199. /* the DDX expects to read and write from same pixmap */
  200. if (write_domain && (reloc->read_domain & write_domain)) {
  201. reloc->read_domain = 0;
  202. reloc->write_domain = write_domain;
  203. } else if (read_domain & reloc->write_domain) {
  204. reloc->read_domain = 0;
  205. } else {
  206. if (write_domain != reloc->write_domain)
  207. return -EINVAL;
  208. if (read_domain != reloc->read_domain)
  209. return -EINVAL;
  210. }
  211. reloc->read_domain |= read_domain;
  212. reloc->write_domain |= write_domain;
  213. /* update flags */
  214. reloc->flags |= (flags & reloc->flags);
  215. /* write relocation packet */
  216. radeon_cs_write_dword((struct radeon_cs *)cs, 0xc0001000);
  217. radeon_cs_write_dword((struct radeon_cs *)cs, idx);
  218. return 0;
  219. }
  220. }
  221. }
  222. /* new relocation */
  223. if (csg->base.crelocs >= csg->nrelocs) {
  224. /* allocate more memory (TODO: should use a slab allocator maybe) */
  225. uint32_t *tmp, size;
  226. size = ((csg->nrelocs + 1) * sizeof(struct radeon_bo*));
  227. tmp = (uint32_t*)realloc(csg->relocs_bo, size);
  228. if (tmp == NULL) {
  229. return -ENOMEM;
  230. }
  231. csg->relocs_bo = (struct radeon_bo_int **)tmp;
  232. size = ((csg->nrelocs + 1) * RELOC_SIZE * 4);
  233. tmp = (uint32_t*)realloc(csg->relocs, size);
  234. if (tmp == NULL) {
  235. return -ENOMEM;
  236. }
  237. cs->relocs = csg->relocs = tmp;
  238. csg->nrelocs += 1;
  239. csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
  240. }
  241. csg->relocs_bo[csg->base.crelocs] = boi;
  242. idx = (csg->base.crelocs++) * RELOC_SIZE;
  243. reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
  244. reloc->handle = bo->handle;
  245. reloc->read_domain = read_domain;
  246. reloc->write_domain = write_domain;
  247. reloc->flags = flags;
  248. csg->chunks[1].length_dw += RELOC_SIZE;
  249. radeon_bo_ref(bo);
  250. /* bo might be referenced from another context so have to use atomic operations */
  251. atomic_add((atomic_t *)radeon_gem_get_reloc_in_cs(bo), cs->id);
  252. cs->relocs_total_size += boi->size;
  253. radeon_cs_write_dword((struct radeon_cs *)cs, 0xc0001000);
  254. radeon_cs_write_dword((struct radeon_cs *)cs, idx);
  255. return 0;
  256. }
  257. static int cs_gem_begin(struct radeon_cs_int *cs,
  258. uint32_t ndw,
  259. const char *file,
  260. const char *func,
  261. int line)
  262. {
  263. if (cs->section_ndw) {
  264. fprintf(stderr, "CS already in a section(%s,%s,%d)\n",
  265. cs->section_file, cs->section_func, cs->section_line);
  266. fprintf(stderr, "CS can't start section(%s,%s,%d)\n",
  267. file, func, line);
  268. return -EPIPE;
  269. }
  270. cs->section_ndw = ndw;
  271. cs->section_cdw = 0;
  272. cs->section_file = file;
  273. cs->section_func = func;
  274. cs->section_line = line;
  275. if (cs->cdw + ndw > cs->ndw) {
  276. uint32_t tmp, *ptr;
  277. /* round up the required size to a multiple of 1024 */
  278. tmp = (cs->cdw + ndw + 0x3FF) & (~0x3FF);
  279. ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
  280. if (ptr == NULL) {
  281. return -ENOMEM;
  282. }
  283. cs->packets = ptr;
  284. cs->ndw = tmp;
  285. }
  286. return 0;
  287. }
  288. static int cs_gem_end(struct radeon_cs_int *cs,
  289. const char *file,
  290. const char *func,
  291. int line)
  292. {
  293. if (!cs->section_ndw) {
  294. fprintf(stderr, "CS no section to end at (%s,%s,%d)\n",
  295. file, func, line);
  296. return -EPIPE;
  297. }
  298. if (cs->section_ndw != cs->section_cdw) {
  299. fprintf(stderr, "CS section size mismatch start at (%s,%s,%d) %d vs %d\n",
  300. cs->section_file, cs->section_func, cs->section_line, cs->section_ndw, cs->section_cdw);
  301. fprintf(stderr, "CS section end at (%s,%s,%d)\n",
  302. file, func, line);
  303. /* We must reset the section even when there is error. */
  304. cs->section_ndw = 0;
  305. return -EPIPE;
  306. }
  307. cs->section_ndw = 0;
  308. return 0;
  309. }
  310. #if CS_BOF_DUMP
  311. static void cs_gem_dump_bof(struct radeon_cs_int *cs)
  312. {
  313. struct cs_gem *csg = (struct cs_gem*)cs;
  314. struct radeon_cs_manager_gem *csm;
  315. bof_t *bcs, *blob, *array, *bo, *size, *handle, *device_id, *root;
  316. char tmp[256];
  317. unsigned i;
  318. csm = (struct radeon_cs_manager_gem *)cs->csm;
  319. root = device_id = bcs = blob = array = bo = size = handle = NULL;
  320. root = bof_object();
  321. if (root == NULL)
  322. goto out_err;
  323. device_id = bof_int32(csm->device_id);
  324. if (device_id == NULL)
  325. return;
  326. if (bof_object_set(root, "device_id", device_id))
  327. goto out_err;
  328. bof_decref(device_id);
  329. device_id = NULL;
  330. /* dump relocs */
  331. blob = bof_blob(csg->nrelocs * 16, csg->relocs);
  332. if (blob == NULL)
  333. goto out_err;
  334. if (bof_object_set(root, "reloc", blob))
  335. goto out_err;
  336. bof_decref(blob);
  337. blob = NULL;
  338. /* dump cs */
  339. blob = bof_blob(cs->cdw * 4, cs->packets);
  340. if (blob == NULL)
  341. goto out_err;
  342. if (bof_object_set(root, "pm4", blob))
  343. goto out_err;
  344. bof_decref(blob);
  345. blob = NULL;
  346. /* dump bo */
  347. array = bof_array();
  348. if (array == NULL)
  349. goto out_err;
  350. for (i = 0; i < csg->base.crelocs; i++) {
  351. bo = bof_object();
  352. if (bo == NULL)
  353. goto out_err;
  354. size = bof_int32(csg->relocs_bo[i]->size);
  355. if (size == NULL)
  356. goto out_err;
  357. if (bof_object_set(bo, "size", size))
  358. goto out_err;
  359. bof_decref(size);
  360. size = NULL;
  361. handle = bof_int32(csg->relocs_bo[i]->handle);
  362. if (handle == NULL)
  363. goto out_err;
  364. if (bof_object_set(bo, "handle", handle))
  365. goto out_err;
  366. bof_decref(handle);
  367. handle = NULL;
  368. radeon_bo_map((struct radeon_bo*)csg->relocs_bo[i], 0);
  369. blob = bof_blob(csg->relocs_bo[i]->size, csg->relocs_bo[i]->ptr);
  370. radeon_bo_unmap((struct radeon_bo*)csg->relocs_bo[i]);
  371. if (blob == NULL)
  372. goto out_err;
  373. if (bof_object_set(bo, "data", blob))
  374. goto out_err;
  375. bof_decref(blob);
  376. blob = NULL;
  377. if (bof_array_append(array, bo))
  378. goto out_err;
  379. bof_decref(bo);
  380. bo = NULL;
  381. }
  382. if (bof_object_set(root, "bo", array))
  383. goto out_err;
  384. sprintf(tmp, "d-0x%04X-%08d.bof", csm->device_id, csm->nbof++);
  385. bof_dump_file(root, tmp);
  386. out_err:
  387. bof_decref(blob);
  388. bof_decref(array);
  389. bof_decref(bo);
  390. bof_decref(size);
  391. bof_decref(handle);
  392. bof_decref(device_id);
  393. bof_decref(root);
  394. }
  395. #endif
  396. static int cs_gem_emit(struct radeon_cs_int *cs)
  397. {
  398. struct cs_gem *csg = (struct cs_gem*)cs;
  399. uint64_t chunk_array[2];
  400. unsigned i;
  401. int r;
  402. while (cs->cdw & 7)
  403. radeon_cs_write_dword((struct radeon_cs *)cs, 0x80000000);
  404. #if CS_BOF_DUMP
  405. cs_gem_dump_bof(cs);
  406. #endif
  407. csg->chunks[0].length_dw = cs->cdw;
  408. chunk_array[0] = (uint64_t)(uintptr_t)&csg->chunks[0];
  409. chunk_array[1] = (uint64_t)(uintptr_t)&csg->chunks[1];
  410. csg->cs.num_chunks = 2;
  411. csg->cs.chunks = (uint64_t)(uintptr_t)chunk_array;
  412. r = drmCommandWriteRead(cs->csm->fd, DRM_RADEON_CS,
  413. &csg->cs, sizeof(struct drm_radeon_cs));
  414. for (i = 0; i < csg->base.crelocs; i++) {
  415. csg->relocs_bo[i]->space_accounted = 0;
  416. /* bo might be referenced from another context so have to use atomic operations */
  417. atomic_dec((atomic_t *)radeon_gem_get_reloc_in_cs((struct radeon_bo*)csg->relocs_bo[i]), cs->id);
  418. radeon_bo_unref((struct radeon_bo *)csg->relocs_bo[i]);
  419. csg->relocs_bo[i] = NULL;
  420. }
  421. cs->csm->read_used = 0;
  422. cs->csm->vram_write_used = 0;
  423. cs->csm->gart_write_used = 0;
  424. return r;
  425. }
  426. static int cs_gem_destroy(struct radeon_cs_int *cs)
  427. {
  428. struct cs_gem *csg = (struct cs_gem*)cs;
  429. free_id(cs->id);
  430. free(csg->relocs_bo);
  431. free(cs->relocs);
  432. free(cs->packets);
  433. free(cs);
  434. return 0;
  435. }
  436. static int cs_gem_erase(struct radeon_cs_int *cs)
  437. {
  438. struct cs_gem *csg = (struct cs_gem*)cs;
  439. unsigned i;
  440. if (csg->relocs_bo) {
  441. for (i = 0; i < csg->base.crelocs; i++) {
  442. if (csg->relocs_bo[i]) {
  443. /* bo might be referenced from another context so have to use atomic operations */
  444. atomic_dec((atomic_t *)radeon_gem_get_reloc_in_cs((struct radeon_bo*)csg->relocs_bo[i]), cs->id);
  445. radeon_bo_unref((struct radeon_bo *)csg->relocs_bo[i]);
  446. csg->relocs_bo[i] = NULL;
  447. }
  448. }
  449. }
  450. cs->relocs_total_size = 0;
  451. cs->cdw = 0;
  452. cs->section_ndw = 0;
  453. cs->crelocs = 0;
  454. csg->chunks[0].length_dw = 0;
  455. csg->chunks[1].length_dw = 0;
  456. return 0;
  457. }
  458. static int cs_gem_need_flush(struct radeon_cs_int *cs)
  459. {
  460. return 0; //(cs->relocs_total_size > (32*1024*1024));
  461. }
  462. static void cs_gem_print(struct radeon_cs_int *cs, FILE *file)
  463. {
  464. struct radeon_cs_manager_gem *csm;
  465. unsigned int i;
  466. csm = (struct radeon_cs_manager_gem *)cs->csm;
  467. fprintf(file, "VENDORID:DEVICEID 0x%04X:0x%04X\n", 0x1002, csm->device_id);
  468. for (i = 0; i < cs->cdw; i++) {
  469. fprintf(file, "0x%08X\n", cs->packets[i]);
  470. }
  471. }
  472. static const struct radeon_cs_funcs radeon_cs_gem_funcs = {
  473. .cs_create = cs_gem_create,
  474. .cs_write_reloc = cs_gem_write_reloc,
  475. .cs_begin = cs_gem_begin,
  476. .cs_end = cs_gem_end,
  477. .cs_emit = cs_gem_emit,
  478. .cs_destroy = cs_gem_destroy,
  479. .cs_erase = cs_gem_erase,
  480. .cs_need_flush = cs_gem_need_flush,
  481. .cs_print = cs_gem_print,
  482. };
  483. static int radeon_get_device_id(int fd, uint32_t *device_id)
  484. {
  485. struct drm_radeon_info info = {};
  486. int r;
  487. *device_id = 0;
  488. info.request = RADEON_INFO_DEVICE_ID;
  489. info.value = (uintptr_t)device_id;
  490. r = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info,
  491. sizeof(struct drm_radeon_info));
  492. return r;
  493. }
  494. drm_public struct radeon_cs_manager *radeon_cs_manager_gem_ctor(int fd)
  495. {
  496. struct radeon_cs_manager_gem *csm;
  497. csm = calloc(1, sizeof(struct radeon_cs_manager_gem));
  498. if (csm == NULL) {
  499. return NULL;
  500. }
  501. csm->base.funcs = &radeon_cs_gem_funcs;
  502. csm->base.fd = fd;
  503. radeon_get_device_id(fd, &csm->device_id);
  504. return &csm->base;
  505. }
  506. drm_public void radeon_cs_manager_gem_dtor(struct radeon_cs_manager *csm)
  507. {
  508. free(csm);
  509. }