fpu_asm.S 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright 2015, Cyril Bur, IBM Corp.
  4. */
  5. #include "basic_asm.h"
  6. #include "fpu_asm.h"
  7. FUNC_START(check_fpu)
  8. mr r4,r3
  9. li r3,1 # assume a bad result
  10. lfd f0,0(r4)
  11. fcmpu cr1,f0,f14
  12. bne cr1,1f
  13. lfd f0,8(r4)
  14. fcmpu cr1,f0,f15
  15. bne cr1,1f
  16. lfd f0,16(r4)
  17. fcmpu cr1,f0,f16
  18. bne cr1,1f
  19. lfd f0,24(r4)
  20. fcmpu cr1,f0,f17
  21. bne cr1,1f
  22. lfd f0,32(r4)
  23. fcmpu cr1,f0,f18
  24. bne cr1,1f
  25. lfd f0,40(r4)
  26. fcmpu cr1,f0,f19
  27. bne cr1,1f
  28. lfd f0,48(r4)
  29. fcmpu cr1,f0,f20
  30. bne cr1,1f
  31. lfd f0,56(r4)
  32. fcmpu cr1,f0,f21
  33. bne cr1,1f
  34. lfd f0,64(r4)
  35. fcmpu cr1,f0,f22
  36. bne cr1,1f
  37. lfd f0,72(r4)
  38. fcmpu cr1,f0,f23
  39. bne cr1,1f
  40. lfd f0,80(r4)
  41. fcmpu cr1,f0,f24
  42. bne cr1,1f
  43. lfd f0,88(r4)
  44. fcmpu cr1,f0,f25
  45. bne cr1,1f
  46. lfd f0,96(r4)
  47. fcmpu cr1,f0,f26
  48. bne cr1,1f
  49. lfd f0,104(r4)
  50. fcmpu cr1,f0,f27
  51. bne cr1,1f
  52. lfd f0,112(r4)
  53. fcmpu cr1,f0,f28
  54. bne cr1,1f
  55. lfd f0,120(r4)
  56. fcmpu cr1,f0,f29
  57. bne cr1,1f
  58. lfd f0,128(r4)
  59. fcmpu cr1,f0,f30
  60. bne cr1,1f
  61. lfd f0,136(r4)
  62. fcmpu cr1,f0,f31
  63. bne cr1,1f
  64. li r3,0 # Success!!!
  65. 1: blr
  66. // int check_all_fprs(double darray[32])
  67. FUNC_START(check_all_fprs)
  68. PUSH_BASIC_STACK(8)
  69. mr r4, r3 // r4 = darray
  70. li r3, 1 // prepare for failure
  71. stfd f31, STACK_FRAME_LOCAL(0, 0)(sp) // backup f31
  72. // Check regs f0-f30, using f31 as scratch
  73. .set i, 0
  74. .rept 31
  75. lfd f31, (8 * i)(r4) // load expected value
  76. fcmpu cr0, i, f31 // compare
  77. bne cr0, 1f // bail if mismatch
  78. .set i, i + 1
  79. .endr
  80. lfd f31, STACK_FRAME_LOCAL(0, 0)(sp) // reload f31
  81. stfd f30, STACK_FRAME_LOCAL(0, 0)(sp) // backup f30
  82. lfd f30, (8 * 31)(r4) // load expected value of f31
  83. fcmpu cr0, f30, f31 // compare
  84. bne cr0, 1f // bail if mismatch
  85. lfd f30, STACK_FRAME_LOCAL(0, 0)(sp) // reload f30
  86. // Success
  87. li r3, 0
  88. 1: POP_BASIC_STACK(8)
  89. blr
  90. FUNC_END(check_all_fprs)
  91. FUNC_START(test_fpu)
  92. # r3 holds pointer to where to put the result of fork
  93. # r4 holds pointer to the pid
  94. # f14-f31 are non volatiles
  95. PUSH_BASIC_STACK(256)
  96. PUSH_FPU(256)
  97. std r3,STACK_FRAME_PARAM(0)(sp) # Address of darray
  98. std r4,STACK_FRAME_PARAM(1)(sp) # Address of pid
  99. // Load FPRs with expected values
  100. OP_REGS lfd, 8, 0, 31, r3
  101. li r0,__NR_fork
  102. sc
  103. # pass the result of the fork to the caller
  104. ld r9,STACK_FRAME_PARAM(1)(sp)
  105. std r3,0(r9)
  106. ld r3,STACK_FRAME_PARAM(0)(sp)
  107. bl check_all_fprs
  108. nop
  109. POP_FPU(256)
  110. POP_BASIC_STACK(256)
  111. blr
  112. FUNC_END(test_fpu)
  113. # int preempt_fpu(double *darray, int *threads_running, int *running)
  114. # On starting will (atomically) decrement not_ready as a signal that the FPU
  115. # has been loaded with darray. Will proceed to check the validity of the FPU
  116. # registers while running is not zero.
  117. FUNC_START(preempt_fpu)
  118. PUSH_BASIC_STACK(256)
  119. PUSH_FPU(256)
  120. std r3,STACK_FRAME_PARAM(0)(sp) # double *darray
  121. std r4,STACK_FRAME_PARAM(1)(sp) # int *threads_starting
  122. std r5,STACK_FRAME_PARAM(2)(sp) # int *running
  123. // Load FPRs with expected values
  124. OP_REGS lfd, 8, 0, 31, r3
  125. sync
  126. # Atomic DEC
  127. ld r3,STACK_FRAME_PARAM(1)(sp)
  128. 1: lwarx r4,0,r3
  129. addi r4,r4,-1
  130. stwcx. r4,0,r3
  131. bne- 1b
  132. 2: ld r3,STACK_FRAME_PARAM(0)(sp)
  133. bl check_all_fprs
  134. cmpdi r3,0
  135. bne 3f
  136. ld r4,STACK_FRAME_PARAM(2)(sp)
  137. ld r5,0(r4)
  138. cmpwi r5,0
  139. bne 2b
  140. 3: POP_FPU(256)
  141. POP_BASIC_STACK(256)
  142. blr
  143. FUNC_END(preempt_fpu)