smartreflex.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * OMAP SmartReflex Voltage Control
  4. *
  5. * Author: Thara Gopinath <thara@ti.com>
  6. *
  7. * Copyright (C) 2012 Texas Instruments, Inc.
  8. * Thara Gopinath <thara@ti.com>
  9. *
  10. * Copyright (C) 2008 Nokia Corporation
  11. * Kalle Jokiniemi
  12. *
  13. * Copyright (C) 2007 Texas Instruments, Inc.
  14. * Lesly A M <x0080970@ti.com>
  15. */
  16. #include <linux/module.h>
  17. #include <linux/mod_devicetable.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/clk.h>
  20. #include <linux/io.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/power/smartreflex.h>
  26. #define DRIVER_NAME "smartreflex"
  27. #define SMARTREFLEX_NAME_LEN 32
  28. #define NVALUE_NAME_LEN 40
  29. #define SR_DISABLE_TIMEOUT 200
  30. /* sr_list contains all the instances of smartreflex module */
  31. static LIST_HEAD(sr_list);
  32. static struct omap_sr_class_data *sr_class;
  33. static struct dentry *sr_dbg_dir;
  34. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  35. {
  36. __raw_writel(value, (sr->base + offset));
  37. }
  38. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  39. u32 value)
  40. {
  41. u32 reg_val;
  42. /*
  43. * Smartreflex error config register is special as it contains
  44. * certain status bits which if written a 1 into means a clear
  45. * of those bits. So in order to make sure no accidental write of
  46. * 1 happens to those status bits, do a clear of them in the read
  47. * value. This mean this API doesn't rewrite values in these bits
  48. * if they are currently set, but does allow the caller to write
  49. * those bits.
  50. */
  51. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  52. mask |= ERRCONFIG_STATUS_V1_MASK;
  53. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  54. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  55. reg_val = __raw_readl(sr->base + offset);
  56. reg_val &= ~mask;
  57. value &= mask;
  58. reg_val |= value;
  59. __raw_writel(reg_val, (sr->base + offset));
  60. }
  61. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  62. {
  63. return __raw_readl(sr->base + offset);
  64. }
  65. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  66. {
  67. struct omap_sr *sr_info;
  68. if (!voltdm) {
  69. pr_err("%s: Null voltage domain passed!\n", __func__);
  70. return ERR_PTR(-EINVAL);
  71. }
  72. list_for_each_entry(sr_info, &sr_list, node) {
  73. if (voltdm == sr_info->voltdm)
  74. return sr_info;
  75. }
  76. return ERR_PTR(-ENODATA);
  77. }
  78. static irqreturn_t sr_interrupt(int irq, void *data)
  79. {
  80. struct omap_sr *sr_info = data;
  81. u32 status = 0;
  82. switch (sr_info->ip_type) {
  83. case SR_TYPE_V1:
  84. /* Read the status bits */
  85. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  86. /* Clear them by writing back */
  87. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  88. break;
  89. case SR_TYPE_V2:
  90. /* Read the status bits */
  91. status = sr_read_reg(sr_info, IRQSTATUS);
  92. /* Clear them by writing back */
  93. sr_write_reg(sr_info, IRQSTATUS, status);
  94. break;
  95. default:
  96. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  97. sr_info->ip_type);
  98. return IRQ_NONE;
  99. }
  100. if (sr_class->notify)
  101. sr_class->notify(sr_info, status);
  102. return IRQ_HANDLED;
  103. }
  104. static void sr_set_clk_length(struct omap_sr *sr)
  105. {
  106. u32 fclk_speed;
  107. /* Try interconnect target module fck first if it already exists */
  108. if (IS_ERR(sr->fck))
  109. return;
  110. fclk_speed = clk_get_rate(sr->fck);
  111. switch (fclk_speed) {
  112. case 12000000:
  113. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  114. break;
  115. case 13000000:
  116. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  117. break;
  118. case 19200000:
  119. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  120. break;
  121. case 26000000:
  122. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  123. break;
  124. case 38400000:
  125. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  126. break;
  127. default:
  128. dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
  129. __func__, fclk_speed);
  130. break;
  131. }
  132. }
  133. static void sr_start_vddautocomp(struct omap_sr *sr)
  134. {
  135. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  136. dev_warn(&sr->pdev->dev,
  137. "%s: smartreflex class driver not registered\n",
  138. __func__);
  139. return;
  140. }
  141. if (!sr_class->enable(sr))
  142. sr->autocomp_active = true;
  143. }
  144. static void sr_stop_vddautocomp(struct omap_sr *sr)
  145. {
  146. if (!sr_class || !(sr_class->disable)) {
  147. dev_warn(&sr->pdev->dev,
  148. "%s: smartreflex class driver not registered\n",
  149. __func__);
  150. return;
  151. }
  152. if (sr->autocomp_active) {
  153. sr_class->disable(sr, 1);
  154. sr->autocomp_active = false;
  155. }
  156. }
  157. /*
  158. * This function handles the initializations which have to be done
  159. * only when both sr device and class driver regiter has
  160. * completed. This will be attempted to be called from both sr class
  161. * driver register and sr device intializtion API's. Only one call
  162. * will ultimately succeed.
  163. *
  164. * Currently this function registers interrupt handler for a particular SR
  165. * if smartreflex class driver is already registered and has
  166. * requested for interrupts and the SR interrupt line in present.
  167. */
  168. static int sr_late_init(struct omap_sr *sr_info)
  169. {
  170. int ret = 0;
  171. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  172. ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
  173. sr_interrupt, IRQF_NO_AUTOEN,
  174. sr_info->name, sr_info);
  175. if (ret)
  176. goto error;
  177. }
  178. return ret;
  179. error:
  180. list_del(&sr_info->node);
  181. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering interrupt handler. Smartreflex will not function as desired\n",
  182. __func__);
  183. return ret;
  184. }
  185. static void sr_v1_disable(struct omap_sr *sr)
  186. {
  187. int timeout = 0;
  188. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  189. ERRCONFIG_MCUBOUNDINTST;
  190. /* Enable MCUDisableAcknowledge interrupt */
  191. sr_modify_reg(sr, ERRCONFIG_V1,
  192. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  193. /* SRCONFIG - disable SR */
  194. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  195. /* Disable all other SR interrupts and clear the status as needed */
  196. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  197. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  198. sr_modify_reg(sr, ERRCONFIG_V1,
  199. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  200. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  201. errconf_val);
  202. /*
  203. * Wait for SR to be disabled.
  204. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  205. */
  206. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  207. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  208. timeout);
  209. if (timeout >= SR_DISABLE_TIMEOUT)
  210. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  211. __func__);
  212. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  213. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  214. ERRCONFIG_MCUDISACKINTST);
  215. }
  216. static void sr_v2_disable(struct omap_sr *sr)
  217. {
  218. int timeout = 0;
  219. /* Enable MCUDisableAcknowledge interrupt */
  220. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  221. /* SRCONFIG - disable SR */
  222. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  223. /*
  224. * Disable all other SR interrupts and clear the status
  225. * write to status register ONLY on need basis - only if status
  226. * is set.
  227. */
  228. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  229. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  230. ERRCONFIG_VPBOUNDINTST_V2);
  231. else
  232. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  233. 0x0);
  234. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  235. IRQENABLE_MCUVALIDINT |
  236. IRQENABLE_MCUBOUNDSINT));
  237. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  238. IRQSTATUS_MCVALIDINT |
  239. IRQSTATUS_MCBOUNDSINT));
  240. /*
  241. * Wait for SR to be disabled.
  242. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  243. */
  244. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  245. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  246. timeout);
  247. if (timeout >= SR_DISABLE_TIMEOUT)
  248. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  249. __func__);
  250. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  251. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  252. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  253. }
  254. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  255. struct omap_sr *sr, u32 efuse_offs)
  256. {
  257. int i;
  258. if (!sr->nvalue_table) {
  259. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  260. __func__);
  261. return NULL;
  262. }
  263. for (i = 0; i < sr->nvalue_count; i++) {
  264. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  265. return &sr->nvalue_table[i];
  266. }
  267. return NULL;
  268. }
  269. /* Public Functions */
  270. /**
  271. * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
  272. * error generator module.
  273. * @sr: SR module to be configured.
  274. *
  275. * This API is to be called from the smartreflex class driver to
  276. * configure the error generator module inside the smartreflex module.
  277. * SR settings if using the ERROR module inside Smartreflex.
  278. * SR CLASS 3 by default uses only the ERROR module where as
  279. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  280. * module. Returns 0 on success and error value in case of failure.
  281. */
  282. int sr_configure_errgen(struct omap_sr *sr)
  283. {
  284. u32 sr_config, sr_errconfig, errconfig_offs;
  285. u32 vpboundint_en, vpboundint_st;
  286. u32 senp_en = 0, senn_en = 0;
  287. u8 senp_shift, senn_shift;
  288. if (!sr) {
  289. pr_warn("%s: NULL omap_sr from %pS\n",
  290. __func__, (void *)_RET_IP_);
  291. return -EINVAL;
  292. }
  293. if (!sr->clk_length)
  294. sr_set_clk_length(sr);
  295. senp_en = sr->senp_mod;
  296. senn_en = sr->senn_mod;
  297. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  298. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  299. switch (sr->ip_type) {
  300. case SR_TYPE_V1:
  301. sr_config |= SRCONFIG_DELAYCTRL;
  302. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  303. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  304. errconfig_offs = ERRCONFIG_V1;
  305. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  306. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  307. break;
  308. case SR_TYPE_V2:
  309. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  310. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  311. errconfig_offs = ERRCONFIG_V2;
  312. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  313. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  314. break;
  315. default:
  316. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  317. __func__);
  318. return -EINVAL;
  319. }
  320. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  321. sr_write_reg(sr, SRCONFIG, sr_config);
  322. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  323. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  324. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  325. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  326. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  327. sr_errconfig);
  328. /* Enabling the interrupts if the ERROR module is used */
  329. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  330. vpboundint_en);
  331. return 0;
  332. }
  333. /**
  334. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  335. * @sr: SR module to be configured.
  336. *
  337. * This API is to be called from the smartreflex class driver to
  338. * disable the error generator module inside the smartreflex module.
  339. *
  340. * Returns 0 on success and error value in case of failure.
  341. */
  342. int sr_disable_errgen(struct omap_sr *sr)
  343. {
  344. u32 errconfig_offs;
  345. u32 vpboundint_en, vpboundint_st;
  346. if (!sr) {
  347. pr_warn("%s: NULL omap_sr from %pS\n",
  348. __func__, (void *)_RET_IP_);
  349. return -EINVAL;
  350. }
  351. switch (sr->ip_type) {
  352. case SR_TYPE_V1:
  353. errconfig_offs = ERRCONFIG_V1;
  354. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  355. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  356. break;
  357. case SR_TYPE_V2:
  358. errconfig_offs = ERRCONFIG_V2;
  359. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  360. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  361. break;
  362. default:
  363. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  364. __func__);
  365. return -EINVAL;
  366. }
  367. /* Disable the Sensor and errorgen */
  368. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  369. /*
  370. * Disable the interrupts of ERROR module
  371. * NOTE: modify is a read, modify,write - an implicit OCP barrier
  372. * which is required is present here - sequencing is critical
  373. * at this point (after errgen is disabled, vpboundint disable)
  374. */
  375. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  376. return 0;
  377. }
  378. /**
  379. * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
  380. * minmaxavg module.
  381. * @sr: SR module to be configured.
  382. *
  383. * This API is to be called from the smartreflex class driver to
  384. * configure the minmaxavg module inside the smartreflex module.
  385. * SR settings if using the ERROR module inside Smartreflex.
  386. * SR CLASS 3 by default uses only the ERROR module where as
  387. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  388. * module. Returns 0 on success and error value in case of failure.
  389. */
  390. int sr_configure_minmax(struct omap_sr *sr)
  391. {
  392. u32 sr_config, sr_avgwt;
  393. u32 senp_en = 0, senn_en = 0;
  394. u8 senp_shift, senn_shift;
  395. if (!sr) {
  396. pr_warn("%s: NULL omap_sr from %pS\n",
  397. __func__, (void *)_RET_IP_);
  398. return -EINVAL;
  399. }
  400. if (!sr->clk_length)
  401. sr_set_clk_length(sr);
  402. senp_en = sr->senp_mod;
  403. senn_en = sr->senn_mod;
  404. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  405. SRCONFIG_SENENABLE |
  406. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  407. switch (sr->ip_type) {
  408. case SR_TYPE_V1:
  409. sr_config |= SRCONFIG_DELAYCTRL;
  410. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  411. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  412. break;
  413. case SR_TYPE_V2:
  414. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  415. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  416. break;
  417. default:
  418. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  419. __func__);
  420. return -EINVAL;
  421. }
  422. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  423. sr_write_reg(sr, SRCONFIG, sr_config);
  424. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  425. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  426. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  427. /*
  428. * Enabling the interrupts if MINMAXAVG module is used.
  429. * TODO: check if all the interrupts are mandatory
  430. */
  431. switch (sr->ip_type) {
  432. case SR_TYPE_V1:
  433. sr_modify_reg(sr, ERRCONFIG_V1,
  434. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  435. ERRCONFIG_MCUBOUNDINTEN),
  436. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  437. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  438. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  439. break;
  440. case SR_TYPE_V2:
  441. sr_write_reg(sr, IRQSTATUS,
  442. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  443. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  444. sr_write_reg(sr, IRQENABLE_SET,
  445. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  446. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  447. break;
  448. default:
  449. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
  450. __func__);
  451. return -EINVAL;
  452. }
  453. return 0;
  454. }
  455. /**
  456. * sr_enable() - Enables the smartreflex module.
  457. * @sr: pointer to which the SR module to be configured belongs to.
  458. * @volt: The voltage at which the Voltage domain associated with
  459. * the smartreflex module is operating at.
  460. * This is required only to program the correct Ntarget value.
  461. *
  462. * This API is to be called from the smartreflex class driver to
  463. * enable a smartreflex module. Returns 0 on success. Returns error
  464. * value if the voltage passed is wrong or if ntarget value is wrong.
  465. */
  466. int sr_enable(struct omap_sr *sr, unsigned long volt)
  467. {
  468. struct omap_volt_data *volt_data;
  469. struct omap_sr_nvalue_table *nvalue_row;
  470. int ret;
  471. if (!sr) {
  472. pr_warn("%s: NULL omap_sr from %pS\n",
  473. __func__, (void *)_RET_IP_);
  474. return -EINVAL;
  475. }
  476. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  477. if (IS_ERR(volt_data)) {
  478. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table for nominal voltage %ld\n",
  479. __func__, volt);
  480. return PTR_ERR(volt_data);
  481. }
  482. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  483. if (!nvalue_row) {
  484. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  485. __func__, volt);
  486. return -ENODATA;
  487. }
  488. /* errminlimit is opp dependent and hence linked to voltage */
  489. sr->err_minlimit = nvalue_row->errminlimit;
  490. clk_enable(sr->fck);
  491. /* Check if SR is already enabled. If yes do nothing */
  492. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  493. goto out_enabled;
  494. /* Configure SR */
  495. ret = sr_class->configure(sr);
  496. if (ret)
  497. goto out_enabled;
  498. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  499. /* SRCONFIG - enable SR */
  500. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  501. out_enabled:
  502. sr->enabled = 1;
  503. return 0;
  504. }
  505. /**
  506. * sr_disable() - Disables the smartreflex module.
  507. * @sr: pointer to which the SR module to be configured belongs to.
  508. *
  509. * This API is to be called from the smartreflex class driver to
  510. * disable a smartreflex module.
  511. */
  512. void sr_disable(struct omap_sr *sr)
  513. {
  514. if (!sr) {
  515. pr_warn("%s: NULL omap_sr from %pS\n",
  516. __func__, (void *)_RET_IP_);
  517. return;
  518. }
  519. /* Check if SR clocks are already disabled. If yes do nothing */
  520. if (!sr->enabled)
  521. return;
  522. /*
  523. * Disable SR if only it is indeed enabled. Else just
  524. * disable the clocks.
  525. */
  526. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  527. switch (sr->ip_type) {
  528. case SR_TYPE_V1:
  529. sr_v1_disable(sr);
  530. break;
  531. case SR_TYPE_V2:
  532. sr_v2_disable(sr);
  533. break;
  534. default:
  535. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  536. sr->ip_type);
  537. }
  538. }
  539. clk_disable(sr->fck);
  540. sr->enabled = 0;
  541. }
  542. /**
  543. * sr_register_class() - API to register a smartreflex class parameters.
  544. * @class_data: The structure containing various sr class specific data.
  545. *
  546. * This API is to be called by the smartreflex class driver to register itself
  547. * with the smartreflex driver during init. Returns 0 on success else the
  548. * error value.
  549. */
  550. int sr_register_class(struct omap_sr_class_data *class_data)
  551. {
  552. struct omap_sr *sr_info;
  553. if (!class_data) {
  554. pr_warn("%s:, Smartreflex class data passed is NULL\n",
  555. __func__);
  556. return -EINVAL;
  557. }
  558. if (sr_class) {
  559. pr_warn("%s: Smartreflex class driver already registered\n",
  560. __func__);
  561. return -EBUSY;
  562. }
  563. sr_class = class_data;
  564. /*
  565. * Call into late init to do initializations that require
  566. * both sr driver and sr class driver to be initiallized.
  567. */
  568. list_for_each_entry(sr_info, &sr_list, node)
  569. sr_late_init(sr_info);
  570. return 0;
  571. }
  572. /**
  573. * omap_sr_enable() - API to enable SR clocks and to call into the
  574. * registered smartreflex class enable API.
  575. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  576. *
  577. * This API is to be called from the kernel in order to enable
  578. * a particular smartreflex module. This API will do the initial
  579. * configurations to turn on the smartreflex module and in turn call
  580. * into the registered smartreflex class enable API.
  581. */
  582. void omap_sr_enable(struct voltagedomain *voltdm)
  583. {
  584. struct omap_sr *sr = _sr_lookup(voltdm);
  585. if (IS_ERR(sr)) {
  586. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  587. return;
  588. }
  589. if (!sr->autocomp_active)
  590. return;
  591. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  592. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  593. __func__);
  594. return;
  595. }
  596. sr_class->enable(sr);
  597. }
  598. /**
  599. * omap_sr_disable() - API to disable SR without resetting the voltage
  600. * processor voltage
  601. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  602. *
  603. * This API is to be called from the kernel in order to disable
  604. * a particular smartreflex module. This API will in turn call
  605. * into the registered smartreflex class disable API. This API will tell
  606. * the smartreflex class disable not to reset the VP voltage after
  607. * disabling smartreflex.
  608. */
  609. void omap_sr_disable(struct voltagedomain *voltdm)
  610. {
  611. struct omap_sr *sr = _sr_lookup(voltdm);
  612. if (IS_ERR(sr)) {
  613. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  614. return;
  615. }
  616. if (!sr->autocomp_active)
  617. return;
  618. if (!sr_class || !(sr_class->disable)) {
  619. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  620. __func__);
  621. return;
  622. }
  623. sr_class->disable(sr, 0);
  624. }
  625. /**
  626. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  627. * voltage processor voltage
  628. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  629. *
  630. * This API is to be called from the kernel in order to disable
  631. * a particular smartreflex module. This API will in turn call
  632. * into the registered smartreflex class disable API. This API will tell
  633. * the smartreflex class disable to reset the VP voltage after
  634. * disabling smartreflex.
  635. */
  636. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  637. {
  638. struct omap_sr *sr = _sr_lookup(voltdm);
  639. if (IS_ERR(sr)) {
  640. pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
  641. return;
  642. }
  643. if (!sr->autocomp_active)
  644. return;
  645. if (!sr_class || !(sr_class->disable)) {
  646. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
  647. __func__);
  648. return;
  649. }
  650. sr_class->disable(sr, 1);
  651. }
  652. /* PM Debug FS entries to enable and disable smartreflex. */
  653. static int omap_sr_autocomp_show(void *data, u64 *val)
  654. {
  655. struct omap_sr *sr_info = data;
  656. if (!sr_info) {
  657. pr_warn("%s: omap_sr struct not found\n", __func__);
  658. return -EINVAL;
  659. }
  660. *val = sr_info->autocomp_active;
  661. return 0;
  662. }
  663. static int omap_sr_autocomp_store(void *data, u64 val)
  664. {
  665. struct omap_sr *sr_info = data;
  666. if (!sr_info) {
  667. pr_warn("%s: omap_sr struct not found\n", __func__);
  668. return -EINVAL;
  669. }
  670. /* Sanity check */
  671. if (val > 1) {
  672. pr_warn("%s: Invalid argument %lld\n", __func__, val);
  673. return -EINVAL;
  674. }
  675. /* control enable/disable only if there is a delta in value */
  676. if (sr_info->autocomp_active != val) {
  677. if (!val)
  678. sr_stop_vddautocomp(sr_info);
  679. else
  680. sr_start_vddautocomp(sr_info);
  681. }
  682. return 0;
  683. }
  684. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  685. omap_sr_autocomp_store, "%llu\n");
  686. static int omap_sr_probe(struct platform_device *pdev)
  687. {
  688. struct omap_sr *sr_info;
  689. struct omap_sr_data *pdata = pdev->dev.platform_data;
  690. struct dentry *nvalue_dir;
  691. int i, ret = 0;
  692. sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
  693. if (!sr_info)
  694. return -ENOMEM;
  695. sr_info->name = devm_kzalloc(&pdev->dev,
  696. SMARTREFLEX_NAME_LEN, GFP_KERNEL);
  697. if (!sr_info->name)
  698. return -ENOMEM;
  699. platform_set_drvdata(pdev, sr_info);
  700. if (!pdata) {
  701. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  702. return -EINVAL;
  703. }
  704. sr_info->base = devm_platform_ioremap_resource(pdev, 0);
  705. if (IS_ERR(sr_info->base))
  706. return PTR_ERR(sr_info->base);
  707. ret = platform_get_irq_optional(pdev, 0);
  708. if (ret < 0 && ret != -ENXIO)
  709. return dev_err_probe(&pdev->dev, ret, "failed to get IRQ resource\n");
  710. if (ret > 0)
  711. sr_info->irq = ret;
  712. sr_info->fck = devm_clk_get(pdev->dev.parent, "fck");
  713. if (IS_ERR(sr_info->fck))
  714. return PTR_ERR(sr_info->fck);
  715. clk_prepare(sr_info->fck);
  716. pm_runtime_enable(&pdev->dev);
  717. snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
  718. sr_info->pdev = pdev;
  719. sr_info->srid = pdev->id;
  720. sr_info->voltdm = pdata->voltdm;
  721. sr_info->nvalue_table = pdata->nvalue_table;
  722. sr_info->nvalue_count = pdata->nvalue_count;
  723. sr_info->senn_mod = pdata->senn_mod;
  724. sr_info->senp_mod = pdata->senp_mod;
  725. sr_info->err_weight = pdata->err_weight;
  726. sr_info->err_maxlimit = pdata->err_maxlimit;
  727. sr_info->accum_data = pdata->accum_data;
  728. sr_info->senn_avgweight = pdata->senn_avgweight;
  729. sr_info->senp_avgweight = pdata->senp_avgweight;
  730. sr_info->autocomp_active = false;
  731. sr_info->ip_type = pdata->ip_type;
  732. sr_set_clk_length(sr_info);
  733. list_add(&sr_info->node, &sr_list);
  734. /*
  735. * Call into late init to do initializations that require
  736. * both sr driver and sr class driver to be initiallized.
  737. */
  738. if (sr_class) {
  739. ret = sr_late_init(sr_info);
  740. if (ret) {
  741. pr_warn("%s: Error in SR late init\n", __func__);
  742. goto err_list_del;
  743. }
  744. }
  745. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  746. if (!sr_dbg_dir)
  747. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  748. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  749. debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, sr_info->dbg_dir,
  750. sr_info, &pm_sr_fops);
  751. debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  752. &sr_info->err_weight);
  753. debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  754. &sr_info->err_maxlimit);
  755. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  756. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  757. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  758. __func__, sr_info->name);
  759. ret = -ENODATA;
  760. goto err_debugfs;
  761. }
  762. for (i = 0; i < sr_info->nvalue_count; i++) {
  763. char name[NVALUE_NAME_LEN + 1];
  764. snprintf(name, sizeof(name), "volt_%lu",
  765. sr_info->nvalue_table[i].volt_nominal);
  766. debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  767. &(sr_info->nvalue_table[i].nvalue));
  768. snprintf(name, sizeof(name), "errminlimit_%lu",
  769. sr_info->nvalue_table[i].volt_nominal);
  770. debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  771. &(sr_info->nvalue_table[i].errminlimit));
  772. }
  773. return 0;
  774. err_debugfs:
  775. debugfs_remove_recursive(sr_info->dbg_dir);
  776. err_list_del:
  777. pm_runtime_disable(&pdev->dev);
  778. list_del(&sr_info->node);
  779. clk_unprepare(sr_info->fck);
  780. return ret;
  781. }
  782. static void omap_sr_remove(struct platform_device *pdev)
  783. {
  784. struct device *dev = &pdev->dev;
  785. struct omap_sr *sr_info = platform_get_drvdata(pdev);
  786. if (sr_info->autocomp_active)
  787. sr_stop_vddautocomp(sr_info);
  788. debugfs_remove_recursive(sr_info->dbg_dir);
  789. pm_runtime_disable(dev);
  790. clk_unprepare(sr_info->fck);
  791. list_del(&sr_info->node);
  792. }
  793. static void omap_sr_shutdown(struct platform_device *pdev)
  794. {
  795. struct omap_sr *sr_info = platform_get_drvdata(pdev);
  796. if (sr_info->autocomp_active)
  797. sr_stop_vddautocomp(sr_info);
  798. return;
  799. }
  800. static const struct of_device_id omap_sr_match[] = {
  801. { .compatible = "ti,omap3-smartreflex-core", },
  802. { .compatible = "ti,omap3-smartreflex-mpu-iva", },
  803. { .compatible = "ti,omap4-smartreflex-core", },
  804. { .compatible = "ti,omap4-smartreflex-mpu", },
  805. { .compatible = "ti,omap4-smartreflex-iva", },
  806. { },
  807. };
  808. MODULE_DEVICE_TABLE(of, omap_sr_match);
  809. static struct platform_driver smartreflex_driver = {
  810. .probe = omap_sr_probe,
  811. .remove = omap_sr_remove,
  812. .shutdown = omap_sr_shutdown,
  813. .driver = {
  814. .name = DRIVER_NAME,
  815. .of_match_table = omap_sr_match,
  816. },
  817. };
  818. static int __init sr_init(void)
  819. {
  820. int ret = 0;
  821. ret = platform_driver_register(&smartreflex_driver);
  822. if (ret) {
  823. pr_err("%s: platform driver register failed for SR\n",
  824. __func__);
  825. return ret;
  826. }
  827. return 0;
  828. }
  829. late_initcall(sr_init);
  830. static void __exit sr_exit(void)
  831. {
  832. platform_driver_unregister(&smartreflex_driver);
  833. }
  834. module_exit(sr_exit);
  835. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  836. MODULE_LICENSE("GPL");
  837. MODULE_ALIAS("platform:" DRIVER_NAME);
  838. MODULE_AUTHOR("Texas Instruments Inc");