pinctrl-moore.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding
  4. * pinctrl-bindings.txt for MediaTek SoC.
  5. *
  6. * Copyright (C) 2017-2018 MediaTek Inc.
  7. * Author: Sean Wang <sean.wang@mediatek.com>
  8. *
  9. */
  10. #include <dt-bindings/pinctrl/mt65xx.h>
  11. #include <linux/gpio/driver.h>
  12. #include <linux/pinctrl/consumer.h>
  13. #include "pinctrl-moore.h"
  14. #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
  15. /* Custom pinconf parameters */
  16. #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
  17. #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
  18. #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
  19. #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
  20. static const struct pinconf_generic_params mtk_custom_bindings[] = {
  21. {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
  22. {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
  23. {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
  24. {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
  25. };
  26. #ifdef CONFIG_DEBUG_FS
  27. static const struct pin_config_item mtk_conf_items[] = {
  28. PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
  29. PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
  30. PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
  31. PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
  32. };
  33. #endif
  34. static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
  35. unsigned int selector, unsigned int group)
  36. {
  37. struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
  38. const struct function_desc *func;
  39. struct group_desc *grp;
  40. int i, err;
  41. func = pinmux_generic_get_function(pctldev, selector);
  42. if (!func)
  43. return -EINVAL;
  44. grp = pinctrl_generic_get_group(pctldev, group);
  45. if (!grp)
  46. return -EINVAL;
  47. dev_dbg(pctldev->dev, "enable function %s group %s\n",
  48. func->func->name, grp->grp.name);
  49. for (i = 0; i < grp->grp.npins; i++) {
  50. const struct mtk_pin_desc *desc;
  51. int *pin_modes = grp->data;
  52. int pin = grp->grp.pins[i];
  53. desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
  54. if (!desc->name)
  55. return -ENOTSUPP;
  56. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
  57. pin_modes[i]);
  58. if (err)
  59. return err;
  60. }
  61. return 0;
  62. }
  63. static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
  64. struct pinctrl_gpio_range *range,
  65. unsigned int pin)
  66. {
  67. struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
  68. const struct mtk_pin_desc *desc;
  69. desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
  70. if (!desc->name)
  71. return -ENOTSUPP;
  72. return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
  73. hw->soc->gpio_m);
  74. }
  75. static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
  76. struct pinctrl_gpio_range *range,
  77. unsigned int pin, bool input)
  78. {
  79. struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
  80. const struct mtk_pin_desc *desc;
  81. desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
  82. if (!desc->name)
  83. return -ENOTSUPP;
  84. /* hardware would take 0 as input direction */
  85. return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
  86. }
  87. static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
  88. unsigned int pin, unsigned long *config)
  89. {
  90. struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
  91. u32 param = pinconf_to_config_param(*config);
  92. int val, val2, err, pullup, reg, ret = 1;
  93. const struct mtk_pin_desc *desc;
  94. desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
  95. if (!desc->name)
  96. return -ENOTSUPP;
  97. switch (param) {
  98. case PIN_CONFIG_BIAS_DISABLE:
  99. if (hw->soc->bias_get_combo) {
  100. err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
  101. if (err)
  102. return err;
  103. if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE)
  104. return -EINVAL;
  105. } else if (hw->soc->bias_disable_get) {
  106. err = hw->soc->bias_disable_get(hw, desc, &ret);
  107. if (err)
  108. return err;
  109. } else {
  110. return -ENOTSUPP;
  111. }
  112. break;
  113. case PIN_CONFIG_BIAS_PULL_UP:
  114. if (hw->soc->bias_get_combo) {
  115. err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
  116. if (err)
  117. return err;
  118. if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
  119. return -EINVAL;
  120. if (!pullup)
  121. return -EINVAL;
  122. } else if (hw->soc->bias_get) {
  123. err = hw->soc->bias_get(hw, desc, 1, &ret);
  124. if (err)
  125. return err;
  126. } else {
  127. return -ENOTSUPP;
  128. }
  129. break;
  130. case PIN_CONFIG_BIAS_PULL_DOWN:
  131. if (hw->soc->bias_get_combo) {
  132. err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
  133. if (err)
  134. return err;
  135. if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
  136. return -EINVAL;
  137. if (pullup)
  138. return -EINVAL;
  139. } else if (hw->soc->bias_get) {
  140. err = hw->soc->bias_get(hw, desc, 0, &ret);
  141. if (err)
  142. return err;
  143. } else {
  144. return -ENOTSUPP;
  145. }
  146. break;
  147. case PIN_CONFIG_SLEW_RATE:
  148. err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val);
  149. if (err)
  150. return err;
  151. if (!val)
  152. return -EINVAL;
  153. break;
  154. case PIN_CONFIG_INPUT_ENABLE:
  155. case PIN_CONFIG_OUTPUT_ENABLE:
  156. err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
  157. if (err)
  158. return err;
  159. /* HW takes input mode as zero; output mode as non-zero */
  160. if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
  161. (!val && param == PIN_CONFIG_OUTPUT_ENABLE))
  162. return -EINVAL;
  163. break;
  164. case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
  165. err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
  166. if (err)
  167. return err;
  168. err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2);
  169. if (err)
  170. return err;
  171. if (val || !val2)
  172. return -EINVAL;
  173. break;
  174. case PIN_CONFIG_DRIVE_STRENGTH:
  175. if (hw->soc->drive_get) {
  176. err = hw->soc->drive_get(hw, desc, &ret);
  177. if (err)
  178. return err;
  179. } else {
  180. err = -ENOTSUPP;
  181. }
  182. break;
  183. case MTK_PIN_CONFIG_TDSEL:
  184. case MTK_PIN_CONFIG_RDSEL:
  185. reg = (param == MTK_PIN_CONFIG_TDSEL) ?
  186. PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
  187. err = mtk_hw_get_value(hw, desc, reg, &val);
  188. if (err)
  189. return err;
  190. ret = val;
  191. break;
  192. case MTK_PIN_CONFIG_PU_ADV:
  193. case MTK_PIN_CONFIG_PD_ADV:
  194. if (hw->soc->adv_pull_get) {
  195. bool pullup;
  196. pullup = param == MTK_PIN_CONFIG_PU_ADV;
  197. err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
  198. if (err)
  199. return err;
  200. } else {
  201. return -ENOTSUPP;
  202. }
  203. break;
  204. default:
  205. return -ENOTSUPP;
  206. }
  207. *config = pinconf_to_config_packed(param, ret);
  208. return 0;
  209. }
  210. static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
  211. unsigned long *configs, unsigned int num_configs)
  212. {
  213. struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
  214. const struct mtk_pin_desc *desc;
  215. u32 reg, param, arg;
  216. int cfg, err = 0;
  217. desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
  218. if (!desc->name)
  219. return -ENOTSUPP;
  220. for (cfg = 0; cfg < num_configs; cfg++) {
  221. param = pinconf_to_config_param(configs[cfg]);
  222. arg = pinconf_to_config_argument(configs[cfg]);
  223. switch (param) {
  224. case PIN_CONFIG_BIAS_DISABLE:
  225. if (hw->soc->bias_set_combo) {
  226. err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
  227. if (err)
  228. return err;
  229. } else if (hw->soc->bias_disable_set) {
  230. err = hw->soc->bias_disable_set(hw, desc);
  231. if (err)
  232. return err;
  233. } else {
  234. return -ENOTSUPP;
  235. }
  236. break;
  237. case PIN_CONFIG_BIAS_PULL_UP:
  238. if (hw->soc->bias_set_combo) {
  239. err = hw->soc->bias_set_combo(hw, desc, 1, arg);
  240. if (err)
  241. return err;
  242. } else if (hw->soc->bias_set) {
  243. err = hw->soc->bias_set(hw, desc, 1);
  244. if (err)
  245. return err;
  246. } else {
  247. return -ENOTSUPP;
  248. }
  249. break;
  250. case PIN_CONFIG_BIAS_PULL_DOWN:
  251. if (hw->soc->bias_set_combo) {
  252. err = hw->soc->bias_set_combo(hw, desc, 0, arg);
  253. if (err)
  254. return err;
  255. } else if (hw->soc->bias_set) {
  256. err = hw->soc->bias_set(hw, desc, 0);
  257. if (err)
  258. return err;
  259. } else {
  260. return -ENOTSUPP;
  261. }
  262. break;
  263. case PIN_CONFIG_OUTPUT_ENABLE:
  264. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
  265. MTK_DISABLE);
  266. if (err)
  267. goto err;
  268. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
  269. MTK_OUTPUT);
  270. if (err)
  271. goto err;
  272. break;
  273. case PIN_CONFIG_INPUT_ENABLE:
  274. if (hw->soc->ies_present) {
  275. mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES,
  276. MTK_ENABLE);
  277. }
  278. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
  279. MTK_INPUT);
  280. if (err)
  281. goto err;
  282. break;
  283. case PIN_CONFIG_SLEW_RATE:
  284. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR,
  285. arg);
  286. if (err)
  287. goto err;
  288. break;
  289. case PIN_CONFIG_LEVEL:
  290. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
  291. MTK_OUTPUT);
  292. if (err)
  293. goto err;
  294. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
  295. arg);
  296. if (err)
  297. goto err;
  298. break;
  299. case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
  300. /* arg = 1: Input mode & SMT enable ;
  301. * arg = 0: Output mode & SMT disable
  302. */
  303. arg = arg ? 2 : 1;
  304. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
  305. arg & 1);
  306. if (err)
  307. goto err;
  308. err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
  309. !!(arg & 2));
  310. if (err)
  311. goto err;
  312. break;
  313. case PIN_CONFIG_DRIVE_STRENGTH:
  314. if (hw->soc->drive_set) {
  315. err = hw->soc->drive_set(hw, desc, arg);
  316. if (err)
  317. return err;
  318. } else {
  319. err = -ENOTSUPP;
  320. }
  321. break;
  322. case MTK_PIN_CONFIG_TDSEL:
  323. case MTK_PIN_CONFIG_RDSEL:
  324. reg = (param == MTK_PIN_CONFIG_TDSEL) ?
  325. PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
  326. err = mtk_hw_set_value(hw, desc, reg, arg);
  327. if (err)
  328. goto err;
  329. break;
  330. case MTK_PIN_CONFIG_PU_ADV:
  331. case MTK_PIN_CONFIG_PD_ADV:
  332. if (hw->soc->adv_pull_set) {
  333. bool pullup;
  334. pullup = param == MTK_PIN_CONFIG_PU_ADV;
  335. err = hw->soc->adv_pull_set(hw, desc, pullup,
  336. arg);
  337. if (err)
  338. return err;
  339. } else {
  340. return -ENOTSUPP;
  341. }
  342. break;
  343. default:
  344. err = -ENOTSUPP;
  345. }
  346. }
  347. err:
  348. return err;
  349. }
  350. static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev,
  351. unsigned int group, unsigned long *config)
  352. {
  353. const unsigned int *pins;
  354. unsigned int i, npins, old = 0;
  355. int ret;
  356. ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
  357. if (ret)
  358. return ret;
  359. for (i = 0; i < npins; i++) {
  360. if (mtk_pinconf_get(pctldev, pins[i], config))
  361. return -ENOTSUPP;
  362. /* configs do not match between two pins */
  363. if (i && old != *config)
  364. return -ENOTSUPP;
  365. old = *config;
  366. }
  367. return 0;
  368. }
  369. static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev,
  370. unsigned int group, unsigned long *configs,
  371. unsigned int num_configs)
  372. {
  373. const unsigned int *pins;
  374. unsigned int i, npins;
  375. int ret;
  376. ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
  377. if (ret)
  378. return ret;
  379. for (i = 0; i < npins; i++) {
  380. ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs);
  381. if (ret)
  382. return ret;
  383. }
  384. return 0;
  385. }
  386. static const struct pinctrl_ops mtk_pctlops = {
  387. .get_groups_count = pinctrl_generic_get_group_count,
  388. .get_group_name = pinctrl_generic_get_group_name,
  389. .get_group_pins = pinctrl_generic_get_group_pins,
  390. .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
  391. .dt_free_map = pinconf_generic_dt_free_map,
  392. };
  393. static const struct pinmux_ops mtk_pmxops = {
  394. .get_functions_count = pinmux_generic_get_function_count,
  395. .get_function_name = pinmux_generic_get_function_name,
  396. .get_function_groups = pinmux_generic_get_function_groups,
  397. .set_mux = mtk_pinmux_set_mux,
  398. .gpio_request_enable = mtk_pinmux_gpio_request_enable,
  399. .gpio_set_direction = mtk_pinmux_gpio_set_direction,
  400. .strict = true,
  401. };
  402. static const struct pinconf_ops mtk_confops = {
  403. .is_generic = true,
  404. .pin_config_get = mtk_pinconf_get,
  405. .pin_config_set = mtk_pinconf_set,
  406. .pin_config_group_get = mtk_pinconf_group_get,
  407. .pin_config_group_set = mtk_pinconf_group_set,
  408. .pin_config_config_dbg_show = pinconf_generic_dump_config,
  409. };
  410. static struct pinctrl_desc mtk_desc = {
  411. .name = PINCTRL_PINCTRL_DEV,
  412. .pctlops = &mtk_pctlops,
  413. .pmxops = &mtk_pmxops,
  414. .confops = &mtk_confops,
  415. .owner = THIS_MODULE,
  416. };
  417. static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
  418. {
  419. struct mtk_pinctrl *hw = gpiochip_get_data(chip);
  420. const struct mtk_pin_desc *desc;
  421. int value, err;
  422. desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
  423. if (!desc->name)
  424. return -ENOTSUPP;
  425. err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
  426. if (err)
  427. return err;
  428. return !!value;
  429. }
  430. static int mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
  431. {
  432. struct mtk_pinctrl *hw = gpiochip_get_data(chip);
  433. const struct mtk_pin_desc *desc;
  434. desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
  435. if (!desc->name)
  436. return -ENOTSUPP;
  437. return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
  438. }
  439. static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
  440. int value)
  441. {
  442. int ret;
  443. ret = mtk_gpio_set(chip, gpio, value);
  444. if (ret)
  445. return ret;
  446. return pinctrl_gpio_direction_output(chip, gpio);
  447. }
  448. static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
  449. {
  450. struct mtk_pinctrl *hw = gpiochip_get_data(chip);
  451. const struct mtk_pin_desc *desc;
  452. if (!hw->eint)
  453. return -ENOTSUPP;
  454. desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
  455. if (desc->eint.eint_n == (u16)EINT_NA)
  456. return -ENOTSUPP;
  457. return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
  458. }
  459. static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
  460. unsigned long config)
  461. {
  462. struct mtk_pinctrl *hw = gpiochip_get_data(chip);
  463. const struct mtk_pin_desc *desc;
  464. u32 debounce;
  465. desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
  466. if (!desc->name)
  467. return -ENOTSUPP;
  468. if (!hw->eint ||
  469. pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
  470. desc->eint.eint_n == (u16)EINT_NA)
  471. return -ENOTSUPP;
  472. debounce = pinconf_to_config_argument(config);
  473. return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
  474. }
  475. static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
  476. {
  477. struct gpio_chip *chip = &hw->chip;
  478. int ret;
  479. chip->label = PINCTRL_PINCTRL_DEV;
  480. chip->parent = hw->dev;
  481. chip->request = gpiochip_generic_request;
  482. chip->free = gpiochip_generic_free;
  483. chip->direction_input = pinctrl_gpio_direction_input;
  484. chip->direction_output = mtk_gpio_direction_output;
  485. chip->get = mtk_gpio_get;
  486. chip->set = mtk_gpio_set;
  487. chip->to_irq = mtk_gpio_to_irq;
  488. chip->set_config = mtk_gpio_set_config;
  489. chip->base = -1;
  490. chip->ngpio = hw->soc->npins;
  491. ret = gpiochip_add_data(chip, hw);
  492. if (ret < 0)
  493. return ret;
  494. /* Just for backward compatible for these old pinctrl nodes without
  495. * "gpio-ranges" property. Otherwise, called directly from a
  496. * DeviceTree-supported pinctrl driver is DEPRECATED.
  497. * Please see Section 2.1 of
  498. * Documentation/devicetree/bindings/gpio/gpio.txt on how to
  499. * bind pinctrl and gpio drivers via the "gpio-ranges" property.
  500. */
  501. if (!of_property_present(hw->dev->of_node, "gpio-ranges")) {
  502. ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0,
  503. chip->ngpio);
  504. if (ret < 0) {
  505. gpiochip_remove(chip);
  506. return ret;
  507. }
  508. }
  509. return 0;
  510. }
  511. static int mtk_build_groups(struct mtk_pinctrl *hw)
  512. {
  513. int err, i;
  514. for (i = 0; i < hw->soc->ngrps; i++) {
  515. const struct group_desc *group = hw->soc->grps + i;
  516. const struct pingroup *grp = &group->grp;
  517. err = pinctrl_generic_add_group(hw->pctrl, grp->name, grp->pins, grp->npins,
  518. group->data);
  519. if (err < 0) {
  520. dev_err(hw->dev, "Failed to register group %s\n", grp->name);
  521. return err;
  522. }
  523. }
  524. return 0;
  525. }
  526. static int mtk_build_functions(struct mtk_pinctrl *hw)
  527. {
  528. int i, err;
  529. for (i = 0; i < hw->soc->nfuncs ; i++) {
  530. const struct pinfunction *func = hw->soc->funcs + i;
  531. err = pinmux_generic_add_pinfunction(hw->pctrl, func, NULL);
  532. if (err < 0) {
  533. dev_err(hw->dev, "Failed to register function %s\n",
  534. func->name);
  535. return err;
  536. }
  537. }
  538. return 0;
  539. }
  540. int mtk_moore_pinctrl_probe(struct platform_device *pdev,
  541. const struct mtk_pin_soc *soc)
  542. {
  543. struct device *dev = &pdev->dev;
  544. struct pinctrl_pin_desc *pins;
  545. struct mtk_pinctrl *hw;
  546. int err, i;
  547. hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
  548. if (!hw)
  549. return -ENOMEM;
  550. hw->soc = soc;
  551. hw->dev = &pdev->dev;
  552. if (!hw->soc->nbase_names)
  553. return dev_err_probe(dev, -EINVAL,
  554. "SoC should be assigned at least one register base\n");
  555. hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
  556. sizeof(*hw->base), GFP_KERNEL);
  557. if (!hw->base)
  558. return -ENOMEM;
  559. for (i = 0; i < hw->soc->nbase_names; i++) {
  560. hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
  561. hw->soc->base_names[i]);
  562. if (IS_ERR(hw->base[i]))
  563. return PTR_ERR(hw->base[i]);
  564. }
  565. hw->nbase = hw->soc->nbase_names;
  566. spin_lock_init(&hw->lock);
  567. /* Copy from internal struct mtk_pin_desc to register to the core */
  568. pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
  569. GFP_KERNEL);
  570. if (!pins)
  571. return -ENOMEM;
  572. for (i = 0; i < hw->soc->npins; i++) {
  573. pins[i].number = hw->soc->pins[i].number;
  574. pins[i].name = hw->soc->pins[i].name;
  575. }
  576. /* Setup pins descriptions per SoC types */
  577. mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
  578. mtk_desc.npins = hw->soc->npins;
  579. mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
  580. mtk_desc.custom_params = mtk_custom_bindings;
  581. #ifdef CONFIG_DEBUG_FS
  582. mtk_desc.custom_conf_items = mtk_conf_items;
  583. #endif
  584. err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
  585. &hw->pctrl);
  586. if (err)
  587. return err;
  588. /* Setup groups descriptions per SoC types */
  589. err = mtk_build_groups(hw);
  590. if (err)
  591. return dev_err_probe(dev, err, "Failed to build groups\n");
  592. /* Setup functions descriptions per SoC types */
  593. err = mtk_build_functions(hw);
  594. if (err)
  595. return dev_err_probe(dev, err, "Failed to build functions\n");
  596. /* For able to make pinctrl_claim_hogs, we must not enable pinctrl
  597. * until all groups and functions are being added one.
  598. */
  599. err = pinctrl_enable(hw->pctrl);
  600. if (err)
  601. return err;
  602. err = mtk_build_eint(hw, pdev);
  603. if (err)
  604. dev_warn(&pdev->dev,
  605. "Failed to add EINT, but pinctrl still can work\n");
  606. /* Build gpiochip should be after pinctrl_enable is done */
  607. err = mtk_build_gpiochip(hw);
  608. if (err)
  609. return dev_err_probe(dev, err, "Failed to add gpio_chip\n");
  610. platform_set_drvdata(pdev, hw);
  611. return 0;
  612. }