Kconfig 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724
  1. # SPDX-License-Identifier: GPL-2.0-only
  2. #
  3. # PINCTRL infrastructure and drivers
  4. #
  5. menuconfig PINCTRL
  6. bool "Pin controllers"
  7. if PINCTRL
  8. config GENERIC_PINCTRL_GROUPS
  9. bool
  10. config PINMUX
  11. bool "Support pin multiplexing controllers" if COMPILE_TEST
  12. config GENERIC_PINMUX_FUNCTIONS
  13. bool
  14. select PINMUX
  15. config PINCONF
  16. bool "Support pin configuration controllers" if COMPILE_TEST
  17. config GENERIC_PINCONF
  18. bool
  19. select PINCONF
  20. config GENERIC_PINCTRL
  21. bool
  22. select GENERIC_PINCONF
  23. select GENERIC_PINCTRL_GROUPS
  24. select GENERIC_PINMUX_FUNCTIONS
  25. config DEBUG_PINCTRL
  26. bool "Debug PINCTRL calls"
  27. depends on DEBUG_KERNEL
  28. help
  29. Say Y here to add some extra checks and diagnostics to PINCTRL calls.
  30. config PINCTRL_AMD
  31. bool "AMD GPIO pin control"
  32. depends on HAS_IOMEM
  33. depends on ACPI || COMPILE_TEST
  34. select GPIOLIB
  35. select GPIOLIB_IRQCHIP
  36. select PINMUX
  37. select PINCONF
  38. select GENERIC_PINCONF
  39. help
  40. The driver for memory mapped GPIO functionality on AMD platforms
  41. (x86 or arm). Most of the pins are usually muxed to some other
  42. functionality by firmware, so only a small amount is available
  43. for GPIO use.
  44. Requires ACPI/FDT device enumeration code to set up a platform
  45. device.
  46. config PINCTRL_AMDISP
  47. tristate "AMDISP GPIO pin control"
  48. depends on DRM_AMD_ISP || COMPILE_TEST
  49. depends on HAS_IOMEM
  50. select GPIOLIB
  51. select PINCONF
  52. select GENERIC_PINCONF
  53. help
  54. The driver for memory mapped GPIO functionality on AMD platforms
  55. with ISP support. All the pins are output controlled only
  56. Requires AMDGPU to MFD add device for enumeration to set up as
  57. platform device.
  58. config PINCTRL_APPLE_GPIO
  59. tristate "Apple SoC GPIO pin controller driver"
  60. depends on ARCH_APPLE
  61. select PINMUX
  62. select GPIOLIB
  63. select GPIOLIB_IRQCHIP
  64. select GENERIC_PINCTRL_GROUPS
  65. select GENERIC_PINMUX_FUNCTIONS
  66. select OF_GPIO
  67. help
  68. This is the driver for the GPIO controller found on Apple ARM SoCs,
  69. including M1.
  70. This driver can also be built as a module. If so, the module
  71. will be called pinctrl-apple-gpio.
  72. config PINCTRL_ARTPEC6
  73. bool "Axis ARTPEC-6 pin controller driver"
  74. depends on MACH_ARTPEC6
  75. select PINMUX
  76. select GENERIC_PINCONF
  77. help
  78. This is the driver for the Axis ARTPEC-6 pin controller. This driver
  79. supports pin function multiplexing as well as pin bias and drive
  80. strength configuration. Device tree integration instructions can be
  81. found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
  82. config PINCTRL_AS3722
  83. tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
  84. depends on MFD_AS3722 && GPIOLIB
  85. select PINMUX
  86. select GENERIC_PINCONF
  87. help
  88. AS3722 device supports the configuration of GPIO pins for different
  89. functionality. This driver supports the pinmux, push-pull and
  90. open drain configuration for the GPIO pins of AS3722 devices. It also
  91. supports the GPIO functionality through gpiolib.
  92. config PINCTRL_AT91
  93. bool "AT91 pinctrl driver"
  94. depends on (OF && ARCH_AT91) || COMPILE_TEST
  95. select PINMUX
  96. select PINCONF
  97. select GPIOLIB
  98. select GPIOLIB_IRQCHIP
  99. help
  100. Say Y here to enable the at91 pinctrl driver
  101. config PINCTRL_AT91PIO4
  102. bool "AT91 PIO4 pinctrl driver"
  103. depends on OF
  104. depends on HAS_IOMEM
  105. depends on ARCH_AT91 || COMPILE_TEST
  106. select PINMUX
  107. select GENERIC_PINCONF
  108. select GPIOLIB
  109. select GPIOLIB_IRQCHIP
  110. select OF_GPIO
  111. help
  112. Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4
  113. controller available on sama5d2 SoC.
  114. config PINCTRL_AXP209
  115. tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
  116. depends on MFD_AXP20X
  117. depends on OF
  118. select PINMUX
  119. select GENERIC_PINCONF
  120. select GPIOLIB
  121. help
  122. AXP PMICs provides multiple GPIOs that can be muxed for different
  123. functions. This driver bundles a pinctrl driver to select the function
  124. muxing and a GPIO driver to handle the GPIO when the GPIO function is
  125. selected.
  126. Say Y to enable pinctrl and GPIO support for the AXP209 PMIC.
  127. config PINCTRL_AW9523
  128. tristate "Awinic AW9523/AW9523B I2C GPIO expander pinctrl driver"
  129. depends on OF && I2C
  130. select PINMUX
  131. select PINCONF
  132. select GENERIC_PINCONF
  133. select GPIOLIB
  134. select GPIOLIB_IRQCHIP
  135. select REGMAP
  136. select REGMAP_I2C
  137. help
  138. The Awinic AW9523/AW9523B is a multi-function I2C GPIO
  139. expander with PWM functionality. This driver bundles a
  140. pinctrl driver to select the function muxing and a GPIO
  141. driver to handle GPIO, when the GPIO function is selected.
  142. Say yes to enable pinctrl and GPIO support for the AW9523(B).
  143. config PINCTRL_BM1880
  144. bool "Bitmain BM1880 Pinctrl driver"
  145. depends on OF && (ARCH_BITMAIN || COMPILE_TEST)
  146. default ARCH_BITMAIN
  147. select PINMUX
  148. help
  149. Pinctrl driver for Bitmain BM1880 SoC.
  150. config PINCTRL_CY8C95X0
  151. tristate "Cypress CY8C95X0 I2C pinctrl and GPIO driver"
  152. depends on I2C
  153. select GPIOLIB
  154. select GPIOLIB_IRQCHIP
  155. select PINMUX
  156. select PINCONF
  157. select GENERIC_PINCONF
  158. select REGMAP_I2C
  159. help
  160. Support for 20/40/60 pin Cypress Cy8C95x0 pinctrl/gpio I2C expander.
  161. This driver can also be built as a module. If so, the module will be
  162. called pinctrl-cy8c95x0.
  163. config PINCTRL_DA850_PUPD
  164. tristate "TI DA850/OMAP-L138/AM18XX pull-up and pull-down groups"
  165. depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST)
  166. select PINCONF
  167. select GENERIC_PINCONF
  168. help
  169. Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control
  170. pull-up and pull-down pin groups.
  171. config PINCTRL_DA9062
  172. tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support"
  173. depends on MFD_DA9062
  174. select GPIOLIB
  175. help
  176. The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for
  177. different functions. This driver bundles a pinctrl driver to select the
  178. function muxing and a GPIO driver to handle the GPIO when the GPIO
  179. function is selected.
  180. Say Y to enable pinctrl and GPIO support for the DA9062 PMIC.
  181. config PINCTRL_DIGICOLOR
  182. bool
  183. depends on ARCH_DIGICOLOR || COMPILE_TEST
  184. select PINMUX
  185. select GENERIC_PINCONF
  186. config PINCTRL_EIC7700
  187. tristate "EIC7700 PINCTRL driver"
  188. depends on ARCH_ESWIN || COMPILE_TEST
  189. select PINMUX
  190. select GENERIC_PINCONF
  191. select REGULATOR
  192. select REGULATOR_FIXED_VOLTAGE
  193. help
  194. This driver support for the pin controller in ESWIN's EIC7700 SoC,
  195. which supports pin multiplexing, pin configuration,and rgmii voltage
  196. control.
  197. Say Y here to enable the eic7700 pinctrl driver
  198. config PINCTRL_EP93XX
  199. bool
  200. depends on ARCH_EP93XX || COMPILE_TEST
  201. select PINMUX
  202. select GENERIC_PINCONF
  203. select MFD_SYSCON
  204. config PINCTRL_EQUILIBRIUM
  205. tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC"
  206. depends on OF && HAS_IOMEM
  207. depends on X86 || COMPILE_TEST
  208. select PINMUX
  209. select PINCONF
  210. select GPIOLIB
  211. select GPIO_GENERIC
  212. select GPIOLIB_IRQCHIP
  213. select GENERIC_PINCONF
  214. select GENERIC_PINCTRL_GROUPS
  215. select GENERIC_PINMUX_FUNCTIONS
  216. help
  217. Equilibrium driver is a pinctrl and GPIO driver for Intel Lightning
  218. Mountain network processor SoC that supports both the GPIO and pin
  219. control frameworks. It provides interfaces to setup pin muxing, assign
  220. desired pin functions, configure GPIO attributes for LGM SoC pins.
  221. Pin muxing and pin config settings are retrieved from device tree.
  222. config PINCTRL_EYEQ5
  223. bool "Mobileye EyeQ5 pinctrl driver"
  224. depends on OF
  225. depends on MACH_EYEQ5 || COMPILE_TEST
  226. select PINMUX
  227. select GENERIC_PINCONF
  228. select AUXILIARY_BUS
  229. default MACH_EYEQ5
  230. help
  231. Pin controller driver for the Mobileye EyeQ5 platform. It does both
  232. pin config & pin muxing. It does not handle GPIO.
  233. Pin muxing supports two functions for each pin: first is GPIO, second
  234. is pin-dependent. Pin config is about bias & drive strength.
  235. config PINCTRL_GEMINI
  236. bool
  237. depends on ARCH_GEMINI
  238. default ARCH_GEMINI
  239. select PINMUX
  240. select GENERIC_PINCONF
  241. select MFD_SYSCON
  242. config PINCTRL_INGENIC
  243. bool "Pinctrl driver for the Ingenic JZ47xx SoCs"
  244. default MACH_INGENIC
  245. depends on OF
  246. depends on MIPS || COMPILE_TEST
  247. select GENERIC_PINCONF
  248. select GENERIC_PINCTRL_GROUPS
  249. select GENERIC_PINMUX_FUNCTIONS
  250. select GPIOLIB
  251. select GPIOLIB_IRQCHIP
  252. select REGMAP_MMIO
  253. config PINCTRL_K210
  254. bool "Pinctrl driver for the Canaan Kendryte K210 SoC"
  255. depends on RISCV && SOC_CANAAN_K210 || COMPILE_TEST
  256. depends on OF
  257. select GENERIC_PINMUX_FUNCTIONS
  258. select GENERIC_PINCONF
  259. select GPIOLIB
  260. select OF_GPIO
  261. select REGMAP_MMIO
  262. default SOC_CANAAN_K210
  263. help
  264. Add support for the Canaan Kendryte K210 RISC-V SOC Field
  265. Programmable IO Array (FPIOA) controller.
  266. config PINCTRL_K230
  267. bool "Pinctrl driver for the Canaan Kendryte K230 SoC"
  268. depends on OF
  269. depends on ARCH_CANAAN || COMPILE_TEST
  270. select GENERIC_PINCTRL_GROUPS
  271. select GENERIC_PINMUX_FUNCTIONS
  272. select GENERIC_PINCONF
  273. select REGMAP_MMIO
  274. help
  275. Add support for the Canaan Kendryte K230 RISC-V SOC pin controller.
  276. config PINCTRL_KEEMBAY
  277. tristate "Pinctrl driver for Intel Keem Bay SoC"
  278. depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)
  279. depends on HAS_IOMEM
  280. select PINMUX
  281. select PINCONF
  282. select GENERIC_PINCONF
  283. select GENERIC_PINCTRL_GROUPS
  284. select GENERIC_PINMUX_FUNCTIONS
  285. select GPIOLIB
  286. select GPIOLIB_IRQCHIP
  287. select GPIO_GENERIC
  288. help
  289. This selects pin control driver for the Intel Keem Bay SoC.
  290. It provides pin config functions such as pull-up, pull-down,
  291. interrupt, drive strength, sec lock, Schmitt trigger, slew
  292. rate control and direction control. This module will be
  293. called as pinctrl-keembay.
  294. config PINCTRL_LANTIQ
  295. bool
  296. depends on LANTIQ
  297. select PINMUX
  298. select PINCONF
  299. config PINCTRL_FALCON
  300. bool
  301. depends on SOC_FALCON
  302. depends on PINCTRL_LANTIQ
  303. config PINCTRL_LOONGSON2
  304. tristate "Pinctrl driver for the Loongson-2 SoC"
  305. depends on OF && (LOONGARCH || COMPILE_TEST)
  306. select PINMUX
  307. select GENERIC_PINCONF
  308. help
  309. This selects pin control driver for the Loongson-2 SoC. It
  310. provides pin config functions multiplexing. GPIO pin pull-up,
  311. pull-down functions are not supported. Say yes to enable
  312. pinctrl for Loongson-2 SoC.
  313. config PINCTRL_XWAY
  314. bool
  315. depends on SOC_TYPE_XWAY
  316. depends on PINCTRL_LANTIQ
  317. config PINCTRL_LPC18XX
  318. bool "NXP LPC18XX/43XX SCU pinctrl driver"
  319. depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
  320. default ARCH_LPC18XX
  321. select PINMUX
  322. select GENERIC_PINCONF
  323. help
  324. Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
  325. config PINCTRL_MAX7360
  326. tristate "MAX7360 Pincontrol support"
  327. depends on MFD_MAX7360
  328. select PINMUX
  329. select GENERIC_PINCONF
  330. help
  331. Say Y here to enable pin control support for Maxim MAX7360 keypad
  332. controller.
  333. This keypad controller has 8 GPIO pins that may work as GPIO, or PWM,
  334. or rotary encoder alternate modes.
  335. config PINCTRL_MAX77620
  336. tristate "MAX77620/MAX20024 Pincontrol support"
  337. depends on MFD_MAX77620 && OF
  338. select PINMUX
  339. select GENERIC_PINCONF
  340. help
  341. Say Y here to enable Pin control support for Maxim MAX77620 PMIC.
  342. This PMIC has 8 GPIO pins that work as GPIO as well as special
  343. function in alternate mode. This driver also configure push-pull,
  344. open drain, FPS slots etc.
  345. config PINCTRL_MCP23S08_I2C
  346. tristate
  347. select REGMAP_I2C
  348. config PINCTRL_MCP23S08_SPI
  349. tristate
  350. select REGMAP_SPI
  351. config PINCTRL_MCP23S08
  352. tristate "Microchip MCP23xxx I/O expander"
  353. depends on SPI_MASTER || I2C
  354. select GPIOLIB
  355. select GPIOLIB_IRQCHIP
  356. select GENERIC_PINCONF
  357. select PINCTRL_MCP23S08_I2C if I2C
  358. select PINCTRL_MCP23S08_SPI if SPI_MASTER
  359. help
  360. SPI/I2C driver for Microchip MCP23S08 / MCP23S17 / MCP23S18 /
  361. MCP23008 / MCP23017 / MCP23018 I/O expanders.
  362. This provides a GPIO interface supporting inputs and outputs and a
  363. corresponding interrupt-controller.
  364. config PINCTRL_MICROCHIP_SGPIO
  365. tristate "Pinctrl driver for Microsemi/Microchip Serial GPIO"
  366. depends on OF
  367. depends on HAS_IOMEM
  368. select GPIOLIB
  369. select GPIOLIB_IRQCHIP
  370. select GENERIC_PINCONF
  371. select GENERIC_PINCTRL_GROUPS
  372. select GENERIC_PINMUX_FUNCTIONS
  373. select OF_GPIO
  374. help
  375. Support for the serial GPIO interface used on Microsemi and
  376. Microchip SoCs. By using a serial interface, the SIO
  377. controller significantly extends the number of available
  378. GPIOs with a minimum number of additional pins on the
  379. device. The primary purpose of the SIO controller is to
  380. connect control signals from SFP modules and to act as an
  381. LED controller.
  382. If compiled as a module, the module name will be
  383. pinctrl-microchip-sgpio.
  384. config PINCTRL_OCELOT
  385. tristate "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs"
  386. depends on OF
  387. depends on HAS_IOMEM
  388. select GPIOLIB
  389. select GPIOLIB_IRQCHIP
  390. select GENERIC_PINCONF
  391. select GENERIC_PINCTRL_GROUPS
  392. select GENERIC_PINMUX_FUNCTIONS
  393. select OF_GPIO
  394. select REGMAP_MMIO
  395. help
  396. Support for the internal GPIO interfaces on Microsemi Ocelot and
  397. Jaguar2 SoCs.
  398. If conpiled as a module, the module name will be pinctrl-ocelot.
  399. config PINCTRL_PALMAS
  400. tristate "Pinctrl driver for the PALMAS Series MFD devices"
  401. depends on OF && MFD_PALMAS
  402. select PINMUX
  403. select GENERIC_PINCONF
  404. help
  405. Palmas device supports the configuration of pins for different
  406. functionality. This driver supports the pinmux, push-pull and
  407. open drain configuration for the Palmas series devices like
  408. TPS65913, TPS80036 etc.
  409. config PINCTRL_PEF2256
  410. tristate "Lantiq PEF2256 (FALC56) pin controller driver"
  411. depends on OF && FRAMER_PEF2256
  412. select PINMUX
  413. select PINCONF
  414. select GENERIC_PINCONF
  415. help
  416. This option enables the pin controller support for the Lantiq PEF2256
  417. framer, also known as FALC56.
  418. If unsure, say N.
  419. To compile this driver as a module, choose M here: the
  420. module will be called pinctrl-pef2256.
  421. config PINCTRL_PIC32
  422. bool "Microchip PIC32 pin controller driver"
  423. depends on OF
  424. depends on MACH_PIC32
  425. select PINMUX
  426. select GENERIC_PINCONF
  427. select GPIOLIB_IRQCHIP
  428. select OF_GPIO
  429. help
  430. This is the pin controller and gpio driver for Microchip PIC32
  431. microcontrollers. This option is selected automatically when specific
  432. machine and arch are selected to build.
  433. config PINCTRL_PIC32MZDA
  434. def_bool y if PIC32MZDA
  435. select PINCTRL_PIC32
  436. config PINCTRL_PISTACHIO
  437. bool "IMG Pistachio SoC pinctrl driver"
  438. depends on OF && (MIPS || COMPILE_TEST)
  439. depends on GPIOLIB
  440. select PINMUX
  441. select GENERIC_PINCONF
  442. select GPIOLIB_IRQCHIP
  443. select OF_GPIO
  444. help
  445. This support pinctrl and GPIO driver for IMG Pistachio SoC.
  446. config PINCTRL_RK805
  447. tristate "Pinctrl and GPIO driver for RK805 PMIC"
  448. depends on MFD_RK8XX
  449. select GPIOLIB
  450. select PINMUX
  451. select GENERIC_PINCONF
  452. help
  453. This selects the pinctrl driver for RK805.
  454. config PINCTRL_ROCKCHIP
  455. tristate "Rockchip gpio and pinctrl driver"
  456. depends on ARCH_ROCKCHIP || COMPILE_TEST
  457. depends on OF
  458. select GPIOLIB
  459. select PINMUX
  460. select GENERIC_PINCONF
  461. select GENERIC_IRQ_CHIP
  462. select MFD_SYSCON
  463. select OF_GPIO
  464. default ARCH_ROCKCHIP
  465. help
  466. This support pinctrl and GPIO driver for Rockchip SoCs.
  467. config PINCTRL_SCMI
  468. tristate "Pinctrl driver using SCMI protocol interface"
  469. depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
  470. select PINMUX
  471. select GENERIC_PINCONF
  472. help
  473. This driver provides support for pinctrl which is controlled
  474. by firmware that implements the SCMI interface.
  475. It uses SCMI Message Protocol to interact with the
  476. firmware providing all the pinctrl controls.
  477. config PINCTRL_SINGLE
  478. tristate "One-register-per-pin type device tree based pinctrl driver"
  479. depends on OF
  480. depends on HAS_IOMEM
  481. select GENERIC_PINCTRL_GROUPS
  482. select GENERIC_PINMUX_FUNCTIONS
  483. select GENERIC_PINCONF
  484. help
  485. This selects the device tree based generic pinctrl driver.
  486. config PINCTRL_ST
  487. bool
  488. depends on OF
  489. select PINMUX
  490. select PINCONF
  491. select GPIOLIB_IRQCHIP
  492. config PINCTRL_STMFX
  493. tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
  494. depends on I2C
  495. depends on OF_GPIO
  496. depends on HAS_IOMEM
  497. select GENERIC_PINCONF
  498. select GPIOLIB_IRQCHIP
  499. select MFD_STMFX
  500. help
  501. Driver for STMicroelectronics Multi-Function eXpander (STMFX)
  502. GPIO expander.
  503. This provides a GPIO interface supporting inputs and outputs,
  504. and configuring push-pull, open-drain, and can also be used as
  505. interrupt-controller.
  506. config PINCTRL_SX150X
  507. tristate "Semtech SX150x I2C GPIO expander pinctrl driver"
  508. depends on I2C=y
  509. select PINMUX
  510. select PINCONF
  511. select GENERIC_PINCONF
  512. select GPIOLIB
  513. select GPIOLIB_IRQCHIP
  514. select REGMAP
  515. help
  516. Say Y here to provide support for Semtech SX150x-series I2C
  517. GPIO expanders as pinctrl module.
  518. Compatible models include:
  519. - 8 bits: sx1508q, sx1502q
  520. - 16 bits: sx1509q, sx1506q
  521. config PINCTRL_TB10X
  522. bool "Pinctrl for TB10X" if COMPILE_TEST
  523. depends on OF && ARC_PLAT_TB10X || COMPILE_TEST
  524. select GPIOLIB
  525. config PINCTRL_TPS6594
  526. tristate "Pinctrl and GPIO driver for TI TPS6594 PMIC"
  527. depends on OF && MFD_TPS6594
  528. default MFD_TPS6594
  529. select PINMUX
  530. select GPIOLIB
  531. select REGMAP
  532. select GPIO_REGMAP
  533. select GENERIC_PINCONF
  534. help
  535. Say Y to select the pinmuxing and GPIOs driver for the TPS6594
  536. PMICs chip family.
  537. This driver can also be built as a module
  538. called tps6594-pinctrl.
  539. config PINCTRL_TH1520
  540. tristate "Pinctrl driver for the T-Head TH1520 SoC"
  541. depends on ARCH_THEAD || COMPILE_TEST
  542. depends on OF
  543. select GENERIC_PINMUX_FUNCTIONS
  544. select GENERIC_PINCONF
  545. select PINMUX
  546. help
  547. This is the driver for the pin controller blocks on the
  548. T-Head TH1520 SoC.
  549. This driver is needed for RISC-V development boards like
  550. the BeagleV Ahead and the LicheePi 4A.
  551. config PINCTRL_UPBOARD
  552. tristate "AAeon UP board FPGA pin controller"
  553. depends on MFD_UPBOARD_FPGA
  554. select PINMUX
  555. select GENERIC_PINCTRL_GROUPS
  556. select GENERIC_PINMUX_FUNCTIONS
  557. select GPIOLIB
  558. select GPIO_AGGREGATOR
  559. help
  560. Pin controller for the FPGA GPIO lines on UP boards. Due to the
  561. hardware layout, the driver controls the FPGA pins in tandem with
  562. their corresponding Intel SoC GPIOs.
  563. Currently supported:
  564. - UP Squared
  565. To compile this driver as a module, choose M here: the module
  566. will be called pinctrl-upboard.
  567. config PINCTRL_ZYNQ
  568. bool "Pinctrl driver for Xilinx Zynq"
  569. depends on ARCH_ZYNQ || COMPILE_TEST
  570. depends on OF
  571. select PINMUX
  572. select GENERIC_PINCONF
  573. help
  574. This selects the pinctrl driver for Xilinx Zynq.
  575. config PINCTRL_ZYNQMP
  576. tristate "Pinctrl driver for Xilinx ZynqMP"
  577. depends on ZYNQMP_FIRMWARE
  578. select PINMUX
  579. select GENERIC_PINCONF
  580. default ZYNQMP_FIRMWARE
  581. help
  582. This selects the pinctrl driver for Xilinx ZynqMP platform.
  583. This driver will query the pin information from the firmware
  584. and allow configuring the pins.
  585. Configuration can include the mux function to select on those
  586. pin(s)/group(s), and various pin configuration parameters
  587. such as pull-up, slew rate, etc.
  588. This driver can also be built as a module. If so, the module
  589. will be called pinctrl-zynqmp.
  590. config PINCTRL_MLXBF3
  591. tristate "NVIDIA BlueField-3 SoC Pinctrl driver"
  592. depends on (MELLANOX_PLATFORM && ARM64) || COMPILE_TEST
  593. select PINMUX
  594. select GPIOLIB
  595. select GPIOLIB_IRQCHIP
  596. help
  597. Say Y to select the pinctrl driver for BlueField-3 SoCs.
  598. This pin controller allows selecting the mux function for
  599. each pin. This driver can also be built as a module called
  600. pinctrl-mlxbf3.
  601. config PINCTRL_RP1
  602. tristate "Pinctrl driver for RP1"
  603. depends on MISC_RP1
  604. default MISC_RP1
  605. select PINMUX
  606. select PINCONF
  607. select GENERIC_PINCONF
  608. help
  609. Enable the gpio and pinctrl/mux driver for RaspberryPi RP1
  610. multi function device.
  611. source "drivers/pinctrl/actions/Kconfig"
  612. source "drivers/pinctrl/aspeed/Kconfig"
  613. source "drivers/pinctrl/bcm/Kconfig"
  614. source "drivers/pinctrl/berlin/Kconfig"
  615. source "drivers/pinctrl/cirrus/Kconfig"
  616. source "drivers/pinctrl/cix/Kconfig"
  617. source "drivers/pinctrl/freescale/Kconfig"
  618. source "drivers/pinctrl/intel/Kconfig"
  619. source "drivers/pinctrl/mediatek/Kconfig"
  620. source "drivers/pinctrl/meson/Kconfig"
  621. source "drivers/pinctrl/microchip/Kconfig"
  622. source "drivers/pinctrl/mvebu/Kconfig"
  623. source "drivers/pinctrl/nomadik/Kconfig"
  624. source "drivers/pinctrl/nuvoton/Kconfig"
  625. source "drivers/pinctrl/nxp/Kconfig"
  626. source "drivers/pinctrl/pxa/Kconfig"
  627. source "drivers/pinctrl/qcom/Kconfig"
  628. source "drivers/pinctrl/realtek/Kconfig"
  629. source "drivers/pinctrl/renesas/Kconfig"
  630. source "drivers/pinctrl/samsung/Kconfig"
  631. source "drivers/pinctrl/sophgo/Kconfig"
  632. source "drivers/pinctrl/spacemit/Kconfig"
  633. source "drivers/pinctrl/spear/Kconfig"
  634. source "drivers/pinctrl/sprd/Kconfig"
  635. source "drivers/pinctrl/starfive/Kconfig"
  636. source "drivers/pinctrl/stm32/Kconfig"
  637. source "drivers/pinctrl/sunplus/Kconfig"
  638. source "drivers/pinctrl/sunxi/Kconfig"
  639. source "drivers/pinctrl/tegra/Kconfig"
  640. source "drivers/pinctrl/ti/Kconfig"
  641. source "drivers/pinctrl/uniphier/Kconfig"
  642. source "drivers/pinctrl/visconti/Kconfig"
  643. source "drivers/pinctrl/vt8500/Kconfig"
  644. endif