msm8916.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018-2020 Linaro Ltd
  4. * Author: Georgi Djakov <georgi.djakov@linaro.org>
  5. */
  6. #include <linux/device.h>
  7. #include <linux/interconnect-provider.h>
  8. #include <linux/io.h>
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/regmap.h>
  13. #include <dt-bindings/interconnect/qcom,msm8916.h>
  14. #include "icc-rpm.h"
  15. enum {
  16. MSM8916_BIMC_SNOC_MAS = 1,
  17. MSM8916_BIMC_SNOC_SLV,
  18. MSM8916_MASTER_AMPSS_M0,
  19. MSM8916_MASTER_LPASS,
  20. MSM8916_MASTER_BLSP_1,
  21. MSM8916_MASTER_DEHR,
  22. MSM8916_MASTER_GRAPHICS_3D,
  23. MSM8916_MASTER_JPEG,
  24. MSM8916_MASTER_MDP_PORT0,
  25. MSM8916_MASTER_CRYPTO_CORE0,
  26. MSM8916_MASTER_SDCC_1,
  27. MSM8916_MASTER_SDCC_2,
  28. MSM8916_MASTER_QDSS_BAM,
  29. MSM8916_MASTER_QDSS_ETR,
  30. MSM8916_MASTER_SNOC_CFG,
  31. MSM8916_MASTER_SPDM,
  32. MSM8916_MASTER_TCU0,
  33. MSM8916_MASTER_TCU1,
  34. MSM8916_MASTER_USB_HS,
  35. MSM8916_MASTER_VFE,
  36. MSM8916_MASTER_VIDEO_P0,
  37. MSM8916_SNOC_MM_INT_0,
  38. MSM8916_SNOC_MM_INT_1,
  39. MSM8916_SNOC_MM_INT_2,
  40. MSM8916_SNOC_MM_INT_BIMC,
  41. MSM8916_PNOC_INT_0,
  42. MSM8916_PNOC_INT_1,
  43. MSM8916_PNOC_MAS_0,
  44. MSM8916_PNOC_MAS_1,
  45. MSM8916_PNOC_SLV_0,
  46. MSM8916_PNOC_SLV_1,
  47. MSM8916_PNOC_SLV_2,
  48. MSM8916_PNOC_SLV_3,
  49. MSM8916_PNOC_SLV_4,
  50. MSM8916_PNOC_SLV_8,
  51. MSM8916_PNOC_SLV_9,
  52. MSM8916_PNOC_SNOC_MAS,
  53. MSM8916_PNOC_SNOC_SLV,
  54. MSM8916_SNOC_QDSS_INT,
  55. MSM8916_SLAVE_AMPSS_L2,
  56. MSM8916_SLAVE_APSS,
  57. MSM8916_SLAVE_LPASS,
  58. MSM8916_SLAVE_BIMC_CFG,
  59. MSM8916_SLAVE_BLSP_1,
  60. MSM8916_SLAVE_BOOT_ROM,
  61. MSM8916_SLAVE_CAMERA_CFG,
  62. MSM8916_SLAVE_CATS_128,
  63. MSM8916_SLAVE_OCMEM_64,
  64. MSM8916_SLAVE_CLK_CTL,
  65. MSM8916_SLAVE_CRYPTO_0_CFG,
  66. MSM8916_SLAVE_DEHR_CFG,
  67. MSM8916_SLAVE_DISPLAY_CFG,
  68. MSM8916_SLAVE_EBI_CH0,
  69. MSM8916_SLAVE_GRAPHICS_3D_CFG,
  70. MSM8916_SLAVE_IMEM_CFG,
  71. MSM8916_SLAVE_IMEM,
  72. MSM8916_SLAVE_MPM,
  73. MSM8916_SLAVE_MSG_RAM,
  74. MSM8916_SLAVE_MSS,
  75. MSM8916_SLAVE_PDM,
  76. MSM8916_SLAVE_PMIC_ARB,
  77. MSM8916_SLAVE_PNOC_CFG,
  78. MSM8916_SLAVE_PRNG,
  79. MSM8916_SLAVE_QDSS_CFG,
  80. MSM8916_SLAVE_QDSS_STM,
  81. MSM8916_SLAVE_RBCPR_CFG,
  82. MSM8916_SLAVE_SDCC_1,
  83. MSM8916_SLAVE_SDCC_2,
  84. MSM8916_SLAVE_SECURITY,
  85. MSM8916_SLAVE_SNOC_CFG,
  86. MSM8916_SLAVE_SPDM,
  87. MSM8916_SLAVE_SRVC_SNOC,
  88. MSM8916_SLAVE_TCSR,
  89. MSM8916_SLAVE_TLMM,
  90. MSM8916_SLAVE_USB_HS,
  91. MSM8916_SLAVE_VENUS_CFG,
  92. MSM8916_SNOC_BIMC_0_MAS,
  93. MSM8916_SNOC_BIMC_0_SLV,
  94. MSM8916_SNOC_BIMC_1_MAS,
  95. MSM8916_SNOC_BIMC_1_SLV,
  96. MSM8916_SNOC_INT_0,
  97. MSM8916_SNOC_INT_1,
  98. MSM8916_SNOC_INT_BIMC,
  99. MSM8916_SNOC_PNOC_MAS,
  100. MSM8916_SNOC_PNOC_SLV,
  101. };
  102. static const u16 bimc_snoc_mas_links[] = {
  103. MSM8916_BIMC_SNOC_SLV
  104. };
  105. static struct qcom_icc_node bimc_snoc_mas = {
  106. .name = "bimc_snoc_mas",
  107. .id = MSM8916_BIMC_SNOC_MAS,
  108. .buswidth = 8,
  109. .mas_rpm_id = -1,
  110. .slv_rpm_id = -1,
  111. .qos.ap_owned = true,
  112. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  113. .num_links = ARRAY_SIZE(bimc_snoc_mas_links),
  114. .links = bimc_snoc_mas_links,
  115. };
  116. static const u16 bimc_snoc_slv_links[] = {
  117. MSM8916_SNOC_INT_0,
  118. MSM8916_SNOC_INT_1
  119. };
  120. static struct qcom_icc_node bimc_snoc_slv = {
  121. .name = "bimc_snoc_slv",
  122. .id = MSM8916_BIMC_SNOC_SLV,
  123. .buswidth = 8,
  124. .mas_rpm_id = -1,
  125. .slv_rpm_id = -1,
  126. .qos.ap_owned = true,
  127. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  128. .num_links = ARRAY_SIZE(bimc_snoc_slv_links),
  129. .links = bimc_snoc_slv_links,
  130. };
  131. static const u16 mas_apss_links[] = {
  132. MSM8916_SLAVE_EBI_CH0,
  133. MSM8916_BIMC_SNOC_MAS,
  134. MSM8916_SLAVE_AMPSS_L2
  135. };
  136. static struct qcom_icc_node mas_apss = {
  137. .name = "mas_apss",
  138. .id = MSM8916_MASTER_AMPSS_M0,
  139. .buswidth = 8,
  140. .mas_rpm_id = -1,
  141. .slv_rpm_id = -1,
  142. .qos.ap_owned = true,
  143. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  144. .qos.areq_prio = 0,
  145. .qos.prio_level = 0,
  146. .qos.qos_port = 0,
  147. .num_links = ARRAY_SIZE(mas_apss_links),
  148. .links = mas_apss_links,
  149. };
  150. static const u16 mas_audio_links[] = {
  151. MSM8916_PNOC_MAS_0
  152. };
  153. static struct qcom_icc_node mas_audio = {
  154. .name = "mas_audio",
  155. .id = MSM8916_MASTER_LPASS,
  156. .buswidth = 4,
  157. .mas_rpm_id = -1,
  158. .slv_rpm_id = -1,
  159. .num_links = ARRAY_SIZE(mas_audio_links),
  160. .links = mas_audio_links,
  161. };
  162. static const u16 mas_blsp_1_links[] = {
  163. MSM8916_PNOC_MAS_1
  164. };
  165. static struct qcom_icc_node mas_blsp_1 = {
  166. .name = "mas_blsp_1",
  167. .id = MSM8916_MASTER_BLSP_1,
  168. .buswidth = 4,
  169. .mas_rpm_id = -1,
  170. .slv_rpm_id = -1,
  171. .num_links = ARRAY_SIZE(mas_blsp_1_links),
  172. .links = mas_blsp_1_links,
  173. };
  174. static const u16 mas_dehr_links[] = {
  175. MSM8916_PNOC_MAS_0
  176. };
  177. static struct qcom_icc_node mas_dehr = {
  178. .name = "mas_dehr",
  179. .id = MSM8916_MASTER_DEHR,
  180. .buswidth = 4,
  181. .mas_rpm_id = -1,
  182. .slv_rpm_id = -1,
  183. .num_links = ARRAY_SIZE(mas_dehr_links),
  184. .links = mas_dehr_links,
  185. };
  186. static const u16 mas_gfx_links[] = {
  187. MSM8916_SLAVE_EBI_CH0,
  188. MSM8916_BIMC_SNOC_MAS,
  189. MSM8916_SLAVE_AMPSS_L2
  190. };
  191. static struct qcom_icc_node mas_gfx = {
  192. .name = "mas_gfx",
  193. .id = MSM8916_MASTER_GRAPHICS_3D,
  194. .buswidth = 8,
  195. .mas_rpm_id = -1,
  196. .slv_rpm_id = -1,
  197. .qos.ap_owned = true,
  198. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  199. .qos.areq_prio = 0,
  200. .qos.prio_level = 0,
  201. .qos.qos_port = 2,
  202. .num_links = ARRAY_SIZE(mas_gfx_links),
  203. .links = mas_gfx_links,
  204. };
  205. static const u16 mas_jpeg_links[] = {
  206. MSM8916_SNOC_MM_INT_0,
  207. MSM8916_SNOC_MM_INT_2
  208. };
  209. static struct qcom_icc_node mas_jpeg = {
  210. .name = "mas_jpeg",
  211. .id = MSM8916_MASTER_JPEG,
  212. .buswidth = 16,
  213. .mas_rpm_id = -1,
  214. .slv_rpm_id = -1,
  215. .qos.ap_owned = true,
  216. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  217. .qos.areq_prio = 0,
  218. .qos.prio_level = 0,
  219. .qos.qos_port = 6,
  220. .num_links = ARRAY_SIZE(mas_jpeg_links),
  221. .links = mas_jpeg_links,
  222. };
  223. static const u16 mas_mdp_links[] = {
  224. MSM8916_SNOC_MM_INT_0,
  225. MSM8916_SNOC_MM_INT_2
  226. };
  227. static struct qcom_icc_node mas_mdp = {
  228. .name = "mas_mdp",
  229. .id = MSM8916_MASTER_MDP_PORT0,
  230. .buswidth = 16,
  231. .mas_rpm_id = -1,
  232. .slv_rpm_id = -1,
  233. .qos.ap_owned = true,
  234. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  235. .qos.areq_prio = 0,
  236. .qos.prio_level = 0,
  237. .qos.qos_port = 7,
  238. .num_links = ARRAY_SIZE(mas_mdp_links),
  239. .links = mas_mdp_links,
  240. };
  241. static const u16 mas_pcnoc_crypto_0_links[] = {
  242. MSM8916_PNOC_INT_1
  243. };
  244. static struct qcom_icc_node mas_pcnoc_crypto_0 = {
  245. .name = "mas_pcnoc_crypto_0",
  246. .id = MSM8916_MASTER_CRYPTO_CORE0,
  247. .buswidth = 8,
  248. .mas_rpm_id = -1,
  249. .slv_rpm_id = -1,
  250. .num_links = ARRAY_SIZE(mas_pcnoc_crypto_0_links),
  251. .links = mas_pcnoc_crypto_0_links,
  252. };
  253. static const u16 mas_pcnoc_sdcc_1_links[] = {
  254. MSM8916_PNOC_INT_1
  255. };
  256. static struct qcom_icc_node mas_pcnoc_sdcc_1 = {
  257. .name = "mas_pcnoc_sdcc_1",
  258. .id = MSM8916_MASTER_SDCC_1,
  259. .buswidth = 8,
  260. .mas_rpm_id = -1,
  261. .slv_rpm_id = -1,
  262. .num_links = ARRAY_SIZE(mas_pcnoc_sdcc_1_links),
  263. .links = mas_pcnoc_sdcc_1_links,
  264. };
  265. static const u16 mas_pcnoc_sdcc_2_links[] = {
  266. MSM8916_PNOC_INT_1
  267. };
  268. static struct qcom_icc_node mas_pcnoc_sdcc_2 = {
  269. .name = "mas_pcnoc_sdcc_2",
  270. .id = MSM8916_MASTER_SDCC_2,
  271. .buswidth = 8,
  272. .mas_rpm_id = -1,
  273. .slv_rpm_id = -1,
  274. .num_links = ARRAY_SIZE(mas_pcnoc_sdcc_2_links),
  275. .links = mas_pcnoc_sdcc_2_links,
  276. };
  277. static const u16 mas_qdss_bam_links[] = {
  278. MSM8916_SNOC_QDSS_INT
  279. };
  280. static struct qcom_icc_node mas_qdss_bam = {
  281. .name = "mas_qdss_bam",
  282. .id = MSM8916_MASTER_QDSS_BAM,
  283. .buswidth = 8,
  284. .mas_rpm_id = -1,
  285. .slv_rpm_id = -1,
  286. .qos.ap_owned = true,
  287. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  288. .qos.areq_prio = 1,
  289. .qos.prio_level = 1,
  290. .qos.qos_port = 11,
  291. .num_links = ARRAY_SIZE(mas_qdss_bam_links),
  292. .links = mas_qdss_bam_links,
  293. };
  294. static const u16 mas_qdss_etr_links[] = {
  295. MSM8916_SNOC_QDSS_INT
  296. };
  297. static struct qcom_icc_node mas_qdss_etr = {
  298. .name = "mas_qdss_etr",
  299. .id = MSM8916_MASTER_QDSS_ETR,
  300. .buswidth = 8,
  301. .mas_rpm_id = -1,
  302. .slv_rpm_id = -1,
  303. .qos.ap_owned = true,
  304. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  305. .qos.areq_prio = 1,
  306. .qos.prio_level = 1,
  307. .qos.qos_port = 10,
  308. .num_links = ARRAY_SIZE(mas_qdss_etr_links),
  309. .links = mas_qdss_etr_links,
  310. };
  311. static const u16 mas_snoc_cfg_links[] = {
  312. MSM8916_SNOC_QDSS_INT
  313. };
  314. static struct qcom_icc_node mas_snoc_cfg = {
  315. .name = "mas_snoc_cfg",
  316. .id = MSM8916_MASTER_SNOC_CFG,
  317. .buswidth = 4,
  318. .mas_rpm_id = -1,
  319. .slv_rpm_id = -1,
  320. .num_links = ARRAY_SIZE(mas_snoc_cfg_links),
  321. .links = mas_snoc_cfg_links,
  322. };
  323. static const u16 mas_spdm_links[] = {
  324. MSM8916_PNOC_MAS_0
  325. };
  326. static struct qcom_icc_node mas_spdm = {
  327. .name = "mas_spdm",
  328. .id = MSM8916_MASTER_SPDM,
  329. .buswidth = 4,
  330. .mas_rpm_id = -1,
  331. .slv_rpm_id = -1,
  332. .num_links = ARRAY_SIZE(mas_spdm_links),
  333. .links = mas_spdm_links,
  334. };
  335. static const u16 mas_tcu0_links[] = {
  336. MSM8916_SLAVE_EBI_CH0,
  337. MSM8916_BIMC_SNOC_MAS,
  338. MSM8916_SLAVE_AMPSS_L2
  339. };
  340. static struct qcom_icc_node mas_tcu0 = {
  341. .name = "mas_tcu0",
  342. .id = MSM8916_MASTER_TCU0,
  343. .buswidth = 8,
  344. .mas_rpm_id = -1,
  345. .slv_rpm_id = -1,
  346. .qos.ap_owned = true,
  347. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  348. .qos.areq_prio = 2,
  349. .qos.prio_level = 2,
  350. .qos.qos_port = 5,
  351. .num_links = ARRAY_SIZE(mas_tcu0_links),
  352. .links = mas_tcu0_links,
  353. };
  354. static const u16 mas_tcu1_links[] = {
  355. MSM8916_SLAVE_EBI_CH0,
  356. MSM8916_BIMC_SNOC_MAS,
  357. MSM8916_SLAVE_AMPSS_L2
  358. };
  359. static struct qcom_icc_node mas_tcu1 = {
  360. .name = "mas_tcu1",
  361. .id = MSM8916_MASTER_TCU1,
  362. .buswidth = 8,
  363. .mas_rpm_id = -1,
  364. .slv_rpm_id = -1,
  365. .qos.ap_owned = true,
  366. .qos.qos_mode = NOC_QOS_MODE_FIXED,
  367. .qos.areq_prio = 2,
  368. .qos.prio_level = 2,
  369. .qos.qos_port = 6,
  370. .num_links = ARRAY_SIZE(mas_tcu1_links),
  371. .links = mas_tcu1_links,
  372. };
  373. static const u16 mas_usb_hs_links[] = {
  374. MSM8916_PNOC_MAS_1
  375. };
  376. static struct qcom_icc_node mas_usb_hs = {
  377. .name = "mas_usb_hs",
  378. .id = MSM8916_MASTER_USB_HS,
  379. .buswidth = 4,
  380. .mas_rpm_id = -1,
  381. .slv_rpm_id = -1,
  382. .num_links = ARRAY_SIZE(mas_usb_hs_links),
  383. .links = mas_usb_hs_links,
  384. };
  385. static const u16 mas_vfe_links[] = {
  386. MSM8916_SNOC_MM_INT_1,
  387. MSM8916_SNOC_MM_INT_2
  388. };
  389. static struct qcom_icc_node mas_vfe = {
  390. .name = "mas_vfe",
  391. .id = MSM8916_MASTER_VFE,
  392. .buswidth = 16,
  393. .mas_rpm_id = -1,
  394. .slv_rpm_id = -1,
  395. .qos.ap_owned = true,
  396. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  397. .qos.areq_prio = 0,
  398. .qos.prio_level = 0,
  399. .qos.qos_port = 9,
  400. .num_links = ARRAY_SIZE(mas_vfe_links),
  401. .links = mas_vfe_links,
  402. };
  403. static const u16 mas_video_links[] = {
  404. MSM8916_SNOC_MM_INT_0,
  405. MSM8916_SNOC_MM_INT_2
  406. };
  407. static struct qcom_icc_node mas_video = {
  408. .name = "mas_video",
  409. .id = MSM8916_MASTER_VIDEO_P0,
  410. .buswidth = 16,
  411. .mas_rpm_id = -1,
  412. .slv_rpm_id = -1,
  413. .qos.ap_owned = true,
  414. .qos.qos_mode = NOC_QOS_MODE_BYPASS,
  415. .qos.areq_prio = 0,
  416. .qos.prio_level = 0,
  417. .qos.qos_port = 8,
  418. .num_links = ARRAY_SIZE(mas_video_links),
  419. .links = mas_video_links,
  420. };
  421. static const u16 mm_int_0_links[] = {
  422. MSM8916_SNOC_MM_INT_BIMC
  423. };
  424. static struct qcom_icc_node mm_int_0 = {
  425. .name = "mm_int_0",
  426. .id = MSM8916_SNOC_MM_INT_0,
  427. .buswidth = 16,
  428. .mas_rpm_id = -1,
  429. .slv_rpm_id = -1,
  430. .qos.ap_owned = true,
  431. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  432. .num_links = ARRAY_SIZE(mm_int_0_links),
  433. .links = mm_int_0_links,
  434. };
  435. static const u16 mm_int_1_links[] = {
  436. MSM8916_SNOC_MM_INT_BIMC
  437. };
  438. static struct qcom_icc_node mm_int_1 = {
  439. .name = "mm_int_1",
  440. .id = MSM8916_SNOC_MM_INT_1,
  441. .buswidth = 16,
  442. .mas_rpm_id = -1,
  443. .slv_rpm_id = -1,
  444. .qos.ap_owned = true,
  445. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  446. .num_links = ARRAY_SIZE(mm_int_1_links),
  447. .links = mm_int_1_links,
  448. };
  449. static const u16 mm_int_2_links[] = {
  450. MSM8916_SNOC_INT_0
  451. };
  452. static struct qcom_icc_node mm_int_2 = {
  453. .name = "mm_int_2",
  454. .id = MSM8916_SNOC_MM_INT_2,
  455. .buswidth = 16,
  456. .mas_rpm_id = -1,
  457. .slv_rpm_id = -1,
  458. .qos.ap_owned = true,
  459. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  460. .num_links = ARRAY_SIZE(mm_int_2_links),
  461. .links = mm_int_2_links,
  462. };
  463. static const u16 mm_int_bimc_links[] = {
  464. MSM8916_SNOC_BIMC_1_MAS
  465. };
  466. static struct qcom_icc_node mm_int_bimc = {
  467. .name = "mm_int_bimc",
  468. .id = MSM8916_SNOC_MM_INT_BIMC,
  469. .buswidth = 16,
  470. .mas_rpm_id = -1,
  471. .slv_rpm_id = -1,
  472. .qos.ap_owned = true,
  473. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  474. .num_links = ARRAY_SIZE(mm_int_bimc_links),
  475. .links = mm_int_bimc_links,
  476. };
  477. static const u16 pcnoc_int_0_links[] = {
  478. MSM8916_PNOC_SNOC_MAS,
  479. MSM8916_PNOC_SLV_0,
  480. MSM8916_PNOC_SLV_1,
  481. MSM8916_PNOC_SLV_2,
  482. MSM8916_PNOC_SLV_3,
  483. MSM8916_PNOC_SLV_4,
  484. MSM8916_PNOC_SLV_8,
  485. MSM8916_PNOC_SLV_9
  486. };
  487. static struct qcom_icc_node pcnoc_int_0 = {
  488. .name = "pcnoc_int_0",
  489. .id = MSM8916_PNOC_INT_0,
  490. .buswidth = 8,
  491. .mas_rpm_id = -1,
  492. .slv_rpm_id = -1,
  493. .num_links = ARRAY_SIZE(pcnoc_int_0_links),
  494. .links = pcnoc_int_0_links,
  495. };
  496. static const u16 pcnoc_int_1_links[] = {
  497. MSM8916_PNOC_SNOC_MAS
  498. };
  499. static struct qcom_icc_node pcnoc_int_1 = {
  500. .name = "pcnoc_int_1",
  501. .id = MSM8916_PNOC_INT_1,
  502. .buswidth = 8,
  503. .mas_rpm_id = -1,
  504. .slv_rpm_id = -1,
  505. .num_links = ARRAY_SIZE(pcnoc_int_1_links),
  506. .links = pcnoc_int_1_links,
  507. };
  508. static const u16 pcnoc_m_0_links[] = {
  509. MSM8916_PNOC_INT_0
  510. };
  511. static struct qcom_icc_node pcnoc_m_0 = {
  512. .name = "pcnoc_m_0",
  513. .id = MSM8916_PNOC_MAS_0,
  514. .buswidth = 8,
  515. .mas_rpm_id = -1,
  516. .slv_rpm_id = -1,
  517. .num_links = ARRAY_SIZE(pcnoc_m_0_links),
  518. .links = pcnoc_m_0_links,
  519. };
  520. static const u16 pcnoc_m_1_links[] = {
  521. MSM8916_PNOC_SNOC_MAS
  522. };
  523. static struct qcom_icc_node pcnoc_m_1 = {
  524. .name = "pcnoc_m_1",
  525. .id = MSM8916_PNOC_MAS_1,
  526. .buswidth = 8,
  527. .mas_rpm_id = -1,
  528. .slv_rpm_id = -1,
  529. .num_links = ARRAY_SIZE(pcnoc_m_1_links),
  530. .links = pcnoc_m_1_links,
  531. };
  532. static const u16 pcnoc_s_0_links[] = {
  533. MSM8916_SLAVE_CLK_CTL,
  534. MSM8916_SLAVE_TLMM,
  535. MSM8916_SLAVE_TCSR,
  536. MSM8916_SLAVE_SECURITY,
  537. MSM8916_SLAVE_MSS
  538. };
  539. static struct qcom_icc_node pcnoc_s_0 = {
  540. .name = "pcnoc_s_0",
  541. .id = MSM8916_PNOC_SLV_0,
  542. .buswidth = 4,
  543. .mas_rpm_id = -1,
  544. .slv_rpm_id = -1,
  545. .num_links = ARRAY_SIZE(pcnoc_s_0_links),
  546. .links = pcnoc_s_0_links,
  547. };
  548. static const u16 pcnoc_s_1_links[] = {
  549. MSM8916_SLAVE_IMEM_CFG,
  550. MSM8916_SLAVE_CRYPTO_0_CFG,
  551. MSM8916_SLAVE_MSG_RAM,
  552. MSM8916_SLAVE_PDM,
  553. MSM8916_SLAVE_PRNG
  554. };
  555. static struct qcom_icc_node pcnoc_s_1 = {
  556. .name = "pcnoc_s_1",
  557. .id = MSM8916_PNOC_SLV_1,
  558. .buswidth = 4,
  559. .mas_rpm_id = -1,
  560. .slv_rpm_id = -1,
  561. .num_links = ARRAY_SIZE(pcnoc_s_1_links),
  562. .links = pcnoc_s_1_links,
  563. };
  564. static const u16 pcnoc_s_2_links[] = {
  565. MSM8916_SLAVE_SPDM,
  566. MSM8916_SLAVE_BOOT_ROM,
  567. MSM8916_SLAVE_BIMC_CFG,
  568. MSM8916_SLAVE_PNOC_CFG,
  569. MSM8916_SLAVE_PMIC_ARB
  570. };
  571. static struct qcom_icc_node pcnoc_s_2 = {
  572. .name = "pcnoc_s_2",
  573. .id = MSM8916_PNOC_SLV_2,
  574. .buswidth = 4,
  575. .mas_rpm_id = -1,
  576. .slv_rpm_id = -1,
  577. .num_links = ARRAY_SIZE(pcnoc_s_2_links),
  578. .links = pcnoc_s_2_links,
  579. };
  580. static const u16 pcnoc_s_3_links[] = {
  581. MSM8916_SLAVE_MPM,
  582. MSM8916_SLAVE_SNOC_CFG,
  583. MSM8916_SLAVE_RBCPR_CFG,
  584. MSM8916_SLAVE_QDSS_CFG,
  585. MSM8916_SLAVE_DEHR_CFG
  586. };
  587. static struct qcom_icc_node pcnoc_s_3 = {
  588. .name = "pcnoc_s_3",
  589. .id = MSM8916_PNOC_SLV_3,
  590. .buswidth = 4,
  591. .mas_rpm_id = -1,
  592. .slv_rpm_id = -1,
  593. .num_links = ARRAY_SIZE(pcnoc_s_3_links),
  594. .links = pcnoc_s_3_links,
  595. };
  596. static const u16 pcnoc_s_4_links[] = {
  597. MSM8916_SLAVE_VENUS_CFG,
  598. MSM8916_SLAVE_CAMERA_CFG,
  599. MSM8916_SLAVE_DISPLAY_CFG
  600. };
  601. static struct qcom_icc_node pcnoc_s_4 = {
  602. .name = "pcnoc_s_4",
  603. .id = MSM8916_PNOC_SLV_4,
  604. .buswidth = 4,
  605. .mas_rpm_id = -1,
  606. .slv_rpm_id = -1,
  607. .num_links = ARRAY_SIZE(pcnoc_s_4_links),
  608. .links = pcnoc_s_4_links,
  609. };
  610. static const u16 pcnoc_s_8_links[] = {
  611. MSM8916_SLAVE_USB_HS,
  612. MSM8916_SLAVE_SDCC_1,
  613. MSM8916_SLAVE_BLSP_1
  614. };
  615. static struct qcom_icc_node pcnoc_s_8 = {
  616. .name = "pcnoc_s_8",
  617. .id = MSM8916_PNOC_SLV_8,
  618. .buswidth = 4,
  619. .mas_rpm_id = -1,
  620. .slv_rpm_id = -1,
  621. .num_links = ARRAY_SIZE(pcnoc_s_8_links),
  622. .links = pcnoc_s_8_links,
  623. };
  624. static const u16 pcnoc_s_9_links[] = {
  625. MSM8916_SLAVE_SDCC_2,
  626. MSM8916_SLAVE_LPASS,
  627. MSM8916_SLAVE_GRAPHICS_3D_CFG
  628. };
  629. static struct qcom_icc_node pcnoc_s_9 = {
  630. .name = "pcnoc_s_9",
  631. .id = MSM8916_PNOC_SLV_9,
  632. .buswidth = 4,
  633. .mas_rpm_id = -1,
  634. .slv_rpm_id = -1,
  635. .num_links = ARRAY_SIZE(pcnoc_s_9_links),
  636. .links = pcnoc_s_9_links,
  637. };
  638. static const u16 pcnoc_snoc_mas_links[] = {
  639. MSM8916_PNOC_SNOC_SLV
  640. };
  641. static struct qcom_icc_node pcnoc_snoc_mas = {
  642. .name = "pcnoc_snoc_mas",
  643. .id = MSM8916_PNOC_SNOC_MAS,
  644. .buswidth = 8,
  645. .mas_rpm_id = 29,
  646. .slv_rpm_id = -1,
  647. .num_links = ARRAY_SIZE(pcnoc_snoc_mas_links),
  648. .links = pcnoc_snoc_mas_links,
  649. };
  650. static const u16 pcnoc_snoc_slv_links[] = {
  651. MSM8916_SNOC_INT_0,
  652. MSM8916_SNOC_INT_BIMC,
  653. MSM8916_SNOC_INT_1
  654. };
  655. static struct qcom_icc_node pcnoc_snoc_slv = {
  656. .name = "pcnoc_snoc_slv",
  657. .id = MSM8916_PNOC_SNOC_SLV,
  658. .buswidth = 8,
  659. .mas_rpm_id = -1,
  660. .slv_rpm_id = 45,
  661. .num_links = ARRAY_SIZE(pcnoc_snoc_slv_links),
  662. .links = pcnoc_snoc_slv_links,
  663. };
  664. static const u16 qdss_int_links[] = {
  665. MSM8916_SNOC_INT_0,
  666. MSM8916_SNOC_INT_BIMC
  667. };
  668. static struct qcom_icc_node qdss_int = {
  669. .name = "qdss_int",
  670. .id = MSM8916_SNOC_QDSS_INT,
  671. .buswidth = 8,
  672. .mas_rpm_id = -1,
  673. .slv_rpm_id = -1,
  674. .qos.ap_owned = true,
  675. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  676. .num_links = ARRAY_SIZE(qdss_int_links),
  677. .links = qdss_int_links,
  678. };
  679. static struct qcom_icc_node slv_apps_l2 = {
  680. .name = "slv_apps_l2",
  681. .id = MSM8916_SLAVE_AMPSS_L2,
  682. .buswidth = 8,
  683. .mas_rpm_id = -1,
  684. .slv_rpm_id = -1,
  685. };
  686. static struct qcom_icc_node slv_apss = {
  687. .name = "slv_apss",
  688. .id = MSM8916_SLAVE_APSS,
  689. .buswidth = 4,
  690. .mas_rpm_id = -1,
  691. .slv_rpm_id = -1,
  692. };
  693. static struct qcom_icc_node slv_audio = {
  694. .name = "slv_audio",
  695. .id = MSM8916_SLAVE_LPASS,
  696. .buswidth = 4,
  697. .mas_rpm_id = -1,
  698. .slv_rpm_id = -1,
  699. };
  700. static struct qcom_icc_node slv_bimc_cfg = {
  701. .name = "slv_bimc_cfg",
  702. .id = MSM8916_SLAVE_BIMC_CFG,
  703. .buswidth = 4,
  704. .mas_rpm_id = -1,
  705. .slv_rpm_id = -1,
  706. };
  707. static struct qcom_icc_node slv_blsp_1 = {
  708. .name = "slv_blsp_1",
  709. .id = MSM8916_SLAVE_BLSP_1,
  710. .buswidth = 4,
  711. .mas_rpm_id = -1,
  712. .slv_rpm_id = -1,
  713. };
  714. static struct qcom_icc_node slv_boot_rom = {
  715. .name = "slv_boot_rom",
  716. .id = MSM8916_SLAVE_BOOT_ROM,
  717. .buswidth = 4,
  718. .mas_rpm_id = -1,
  719. .slv_rpm_id = -1,
  720. };
  721. static struct qcom_icc_node slv_camera_cfg = {
  722. .name = "slv_camera_cfg",
  723. .id = MSM8916_SLAVE_CAMERA_CFG,
  724. .buswidth = 4,
  725. .mas_rpm_id = -1,
  726. .slv_rpm_id = -1,
  727. };
  728. static struct qcom_icc_node slv_cats_0 = {
  729. .name = "slv_cats_0",
  730. .id = MSM8916_SLAVE_CATS_128,
  731. .buswidth = 16,
  732. .mas_rpm_id = -1,
  733. .slv_rpm_id = -1,
  734. };
  735. static struct qcom_icc_node slv_cats_1 = {
  736. .name = "slv_cats_1",
  737. .id = MSM8916_SLAVE_OCMEM_64,
  738. .buswidth = 8,
  739. .mas_rpm_id = -1,
  740. .slv_rpm_id = -1,
  741. };
  742. static struct qcom_icc_node slv_clk_ctl = {
  743. .name = "slv_clk_ctl",
  744. .id = MSM8916_SLAVE_CLK_CTL,
  745. .buswidth = 4,
  746. .mas_rpm_id = -1,
  747. .slv_rpm_id = -1,
  748. };
  749. static struct qcom_icc_node slv_crypto_0_cfg = {
  750. .name = "slv_crypto_0_cfg",
  751. .id = MSM8916_SLAVE_CRYPTO_0_CFG,
  752. .buswidth = 4,
  753. .mas_rpm_id = -1,
  754. .slv_rpm_id = -1,
  755. };
  756. static struct qcom_icc_node slv_dehr_cfg = {
  757. .name = "slv_dehr_cfg",
  758. .id = MSM8916_SLAVE_DEHR_CFG,
  759. .buswidth = 4,
  760. .mas_rpm_id = -1,
  761. .slv_rpm_id = -1,
  762. };
  763. static struct qcom_icc_node slv_display_cfg = {
  764. .name = "slv_display_cfg",
  765. .id = MSM8916_SLAVE_DISPLAY_CFG,
  766. .buswidth = 4,
  767. .mas_rpm_id = -1,
  768. .slv_rpm_id = -1,
  769. };
  770. static struct qcom_icc_node slv_ebi_ch0 = {
  771. .name = "slv_ebi_ch0",
  772. .id = MSM8916_SLAVE_EBI_CH0,
  773. .buswidth = 8,
  774. .mas_rpm_id = -1,
  775. .slv_rpm_id = 0,
  776. };
  777. static struct qcom_icc_node slv_gfx_cfg = {
  778. .name = "slv_gfx_cfg",
  779. .id = MSM8916_SLAVE_GRAPHICS_3D_CFG,
  780. .buswidth = 4,
  781. .mas_rpm_id = -1,
  782. .slv_rpm_id = -1,
  783. };
  784. static struct qcom_icc_node slv_imem_cfg = {
  785. .name = "slv_imem_cfg",
  786. .id = MSM8916_SLAVE_IMEM_CFG,
  787. .buswidth = 4,
  788. .mas_rpm_id = -1,
  789. .slv_rpm_id = -1,
  790. };
  791. static struct qcom_icc_node slv_imem = {
  792. .name = "slv_imem",
  793. .id = MSM8916_SLAVE_IMEM,
  794. .buswidth = 8,
  795. .mas_rpm_id = -1,
  796. .slv_rpm_id = 26,
  797. };
  798. static struct qcom_icc_node slv_mpm = {
  799. .name = "slv_mpm",
  800. .id = MSM8916_SLAVE_MPM,
  801. .buswidth = 4,
  802. .mas_rpm_id = -1,
  803. .slv_rpm_id = -1,
  804. };
  805. static struct qcom_icc_node slv_msg_ram = {
  806. .name = "slv_msg_ram",
  807. .id = MSM8916_SLAVE_MSG_RAM,
  808. .buswidth = 4,
  809. .mas_rpm_id = -1,
  810. .slv_rpm_id = -1,
  811. };
  812. static struct qcom_icc_node slv_mss = {
  813. .name = "slv_mss",
  814. .id = MSM8916_SLAVE_MSS,
  815. .buswidth = 4,
  816. .mas_rpm_id = -1,
  817. .slv_rpm_id = -1,
  818. };
  819. static struct qcom_icc_node slv_pdm = {
  820. .name = "slv_pdm",
  821. .id = MSM8916_SLAVE_PDM,
  822. .buswidth = 4,
  823. .mas_rpm_id = -1,
  824. .slv_rpm_id = -1,
  825. };
  826. static struct qcom_icc_node slv_pmic_arb = {
  827. .name = "slv_pmic_arb",
  828. .id = MSM8916_SLAVE_PMIC_ARB,
  829. .buswidth = 4,
  830. .mas_rpm_id = -1,
  831. .slv_rpm_id = -1,
  832. };
  833. static struct qcom_icc_node slv_pcnoc_cfg = {
  834. .name = "slv_pcnoc_cfg",
  835. .id = MSM8916_SLAVE_PNOC_CFG,
  836. .buswidth = 4,
  837. .mas_rpm_id = -1,
  838. .slv_rpm_id = -1,
  839. };
  840. static struct qcom_icc_node slv_prng = {
  841. .name = "slv_prng",
  842. .id = MSM8916_SLAVE_PRNG,
  843. .buswidth = 4,
  844. .mas_rpm_id = -1,
  845. .slv_rpm_id = -1,
  846. };
  847. static struct qcom_icc_node slv_qdss_cfg = {
  848. .name = "slv_qdss_cfg",
  849. .id = MSM8916_SLAVE_QDSS_CFG,
  850. .buswidth = 4,
  851. .mas_rpm_id = -1,
  852. .slv_rpm_id = -1,
  853. };
  854. static struct qcom_icc_node slv_qdss_stm = {
  855. .name = "slv_qdss_stm",
  856. .id = MSM8916_SLAVE_QDSS_STM,
  857. .buswidth = 4,
  858. .mas_rpm_id = -1,
  859. .slv_rpm_id = 30,
  860. };
  861. static struct qcom_icc_node slv_rbcpr_cfg = {
  862. .name = "slv_rbcpr_cfg",
  863. .id = MSM8916_SLAVE_RBCPR_CFG,
  864. .buswidth = 4,
  865. .mas_rpm_id = -1,
  866. .slv_rpm_id = -1,
  867. };
  868. static struct qcom_icc_node slv_sdcc_1 = {
  869. .name = "slv_sdcc_1",
  870. .id = MSM8916_SLAVE_SDCC_1,
  871. .buswidth = 4,
  872. .mas_rpm_id = -1,
  873. .slv_rpm_id = -1,
  874. };
  875. static struct qcom_icc_node slv_sdcc_2 = {
  876. .name = "slv_sdcc_2",
  877. .id = MSM8916_SLAVE_SDCC_2,
  878. .buswidth = 4,
  879. .mas_rpm_id = -1,
  880. .slv_rpm_id = -1,
  881. };
  882. static struct qcom_icc_node slv_security = {
  883. .name = "slv_security",
  884. .id = MSM8916_SLAVE_SECURITY,
  885. .buswidth = 4,
  886. .mas_rpm_id = -1,
  887. .slv_rpm_id = -1,
  888. };
  889. static struct qcom_icc_node slv_snoc_cfg = {
  890. .name = "slv_snoc_cfg",
  891. .id = MSM8916_SLAVE_SNOC_CFG,
  892. .buswidth = 4,
  893. .mas_rpm_id = -1,
  894. .slv_rpm_id = -1,
  895. };
  896. static struct qcom_icc_node slv_spdm = {
  897. .name = "slv_spdm",
  898. .id = MSM8916_SLAVE_SPDM,
  899. .buswidth = 4,
  900. .mas_rpm_id = -1,
  901. .slv_rpm_id = -1,
  902. };
  903. static struct qcom_icc_node slv_srvc_snoc = {
  904. .name = "slv_srvc_snoc",
  905. .id = MSM8916_SLAVE_SRVC_SNOC,
  906. .buswidth = 8,
  907. .mas_rpm_id = -1,
  908. .slv_rpm_id = -1,
  909. };
  910. static struct qcom_icc_node slv_tcsr = {
  911. .name = "slv_tcsr",
  912. .id = MSM8916_SLAVE_TCSR,
  913. .buswidth = 4,
  914. .mas_rpm_id = -1,
  915. .slv_rpm_id = -1,
  916. };
  917. static struct qcom_icc_node slv_tlmm = {
  918. .name = "slv_tlmm",
  919. .id = MSM8916_SLAVE_TLMM,
  920. .buswidth = 4,
  921. .mas_rpm_id = -1,
  922. .slv_rpm_id = -1,
  923. };
  924. static struct qcom_icc_node slv_usb_hs = {
  925. .name = "slv_usb_hs",
  926. .id = MSM8916_SLAVE_USB_HS,
  927. .buswidth = 4,
  928. .mas_rpm_id = -1,
  929. .slv_rpm_id = -1,
  930. };
  931. static struct qcom_icc_node slv_venus_cfg = {
  932. .name = "slv_venus_cfg",
  933. .id = MSM8916_SLAVE_VENUS_CFG,
  934. .buswidth = 4,
  935. .mas_rpm_id = -1,
  936. .slv_rpm_id = -1,
  937. };
  938. static const u16 snoc_bimc_0_mas_links[] = {
  939. MSM8916_SNOC_BIMC_0_SLV
  940. };
  941. static struct qcom_icc_node snoc_bimc_0_mas = {
  942. .name = "snoc_bimc_0_mas",
  943. .id = MSM8916_SNOC_BIMC_0_MAS,
  944. .buswidth = 8,
  945. .mas_rpm_id = 3,
  946. .slv_rpm_id = -1,
  947. .num_links = ARRAY_SIZE(snoc_bimc_0_mas_links),
  948. .links = snoc_bimc_0_mas_links,
  949. };
  950. static const u16 snoc_bimc_0_slv_links[] = {
  951. MSM8916_SLAVE_EBI_CH0
  952. };
  953. static struct qcom_icc_node snoc_bimc_0_slv = {
  954. .name = "snoc_bimc_0_slv",
  955. .id = MSM8916_SNOC_BIMC_0_SLV,
  956. .buswidth = 8,
  957. .mas_rpm_id = -1,
  958. .slv_rpm_id = 24,
  959. .num_links = ARRAY_SIZE(snoc_bimc_0_slv_links),
  960. .links = snoc_bimc_0_slv_links,
  961. };
  962. static const u16 snoc_bimc_1_mas_links[] = {
  963. MSM8916_SNOC_BIMC_1_SLV
  964. };
  965. static struct qcom_icc_node snoc_bimc_1_mas = {
  966. .name = "snoc_bimc_1_mas",
  967. .id = MSM8916_SNOC_BIMC_1_MAS,
  968. .buswidth = 16,
  969. .mas_rpm_id = -1,
  970. .slv_rpm_id = -1,
  971. .qos.ap_owned = true,
  972. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  973. .num_links = ARRAY_SIZE(snoc_bimc_1_mas_links),
  974. .links = snoc_bimc_1_mas_links,
  975. };
  976. static const u16 snoc_bimc_1_slv_links[] = {
  977. MSM8916_SLAVE_EBI_CH0
  978. };
  979. static struct qcom_icc_node snoc_bimc_1_slv = {
  980. .name = "snoc_bimc_1_slv",
  981. .id = MSM8916_SNOC_BIMC_1_SLV,
  982. .buswidth = 8,
  983. .mas_rpm_id = -1,
  984. .slv_rpm_id = -1,
  985. .qos.ap_owned = true,
  986. .qos.qos_mode = NOC_QOS_MODE_INVALID,
  987. .num_links = ARRAY_SIZE(snoc_bimc_1_slv_links),
  988. .links = snoc_bimc_1_slv_links,
  989. };
  990. static const u16 snoc_int_0_links[] = {
  991. MSM8916_SLAVE_QDSS_STM,
  992. MSM8916_SLAVE_IMEM,
  993. MSM8916_SNOC_PNOC_MAS
  994. };
  995. static struct qcom_icc_node snoc_int_0 = {
  996. .name = "snoc_int_0",
  997. .id = MSM8916_SNOC_INT_0,
  998. .buswidth = 8,
  999. .mas_rpm_id = 99,
  1000. .slv_rpm_id = 130,
  1001. .num_links = ARRAY_SIZE(snoc_int_0_links),
  1002. .links = snoc_int_0_links,
  1003. };
  1004. static const u16 snoc_int_1_links[] = {
  1005. MSM8916_SLAVE_APSS,
  1006. MSM8916_SLAVE_CATS_128,
  1007. MSM8916_SLAVE_OCMEM_64
  1008. };
  1009. static struct qcom_icc_node snoc_int_1 = {
  1010. .name = "snoc_int_1",
  1011. .id = MSM8916_SNOC_INT_1,
  1012. .buswidth = 8,
  1013. .mas_rpm_id = -1,
  1014. .slv_rpm_id = -1,
  1015. .num_links = ARRAY_SIZE(snoc_int_1_links),
  1016. .links = snoc_int_1_links,
  1017. };
  1018. static const u16 snoc_int_bimc_links[] = {
  1019. MSM8916_SNOC_BIMC_0_MAS
  1020. };
  1021. static struct qcom_icc_node snoc_int_bimc = {
  1022. .name = "snoc_int_bimc",
  1023. .id = MSM8916_SNOC_INT_BIMC,
  1024. .buswidth = 8,
  1025. .mas_rpm_id = 101,
  1026. .slv_rpm_id = 132,
  1027. .num_links = ARRAY_SIZE(snoc_int_bimc_links),
  1028. .links = snoc_int_bimc_links,
  1029. };
  1030. static const u16 snoc_pcnoc_mas_links[] = {
  1031. MSM8916_SNOC_PNOC_SLV
  1032. };
  1033. static struct qcom_icc_node snoc_pcnoc_mas = {
  1034. .name = "snoc_pcnoc_mas",
  1035. .id = MSM8916_SNOC_PNOC_MAS,
  1036. .buswidth = 8,
  1037. .mas_rpm_id = -1,
  1038. .slv_rpm_id = -1,
  1039. .num_links = ARRAY_SIZE(snoc_pcnoc_mas_links),
  1040. .links = snoc_pcnoc_mas_links,
  1041. };
  1042. static const u16 snoc_pcnoc_slv_links[] = {
  1043. MSM8916_PNOC_INT_0
  1044. };
  1045. static struct qcom_icc_node snoc_pcnoc_slv = {
  1046. .name = "snoc_pcnoc_slv",
  1047. .id = MSM8916_SNOC_PNOC_SLV,
  1048. .buswidth = 8,
  1049. .mas_rpm_id = -1,
  1050. .slv_rpm_id = -1,
  1051. .num_links = ARRAY_SIZE(snoc_pcnoc_slv_links),
  1052. .links = snoc_pcnoc_slv_links,
  1053. };
  1054. static struct qcom_icc_node * const msm8916_snoc_nodes[] = {
  1055. [BIMC_SNOC_SLV] = &bimc_snoc_slv,
  1056. [MASTER_JPEG] = &mas_jpeg,
  1057. [MASTER_MDP_PORT0] = &mas_mdp,
  1058. [MASTER_QDSS_BAM] = &mas_qdss_bam,
  1059. [MASTER_QDSS_ETR] = &mas_qdss_etr,
  1060. [MASTER_SNOC_CFG] = &mas_snoc_cfg,
  1061. [MASTER_VFE] = &mas_vfe,
  1062. [MASTER_VIDEO_P0] = &mas_video,
  1063. [SNOC_MM_INT_0] = &mm_int_0,
  1064. [SNOC_MM_INT_1] = &mm_int_1,
  1065. [SNOC_MM_INT_2] = &mm_int_2,
  1066. [SNOC_MM_INT_BIMC] = &mm_int_bimc,
  1067. [PCNOC_SNOC_SLV] = &pcnoc_snoc_slv,
  1068. [SLAVE_APSS] = &slv_apss,
  1069. [SLAVE_CATS_128] = &slv_cats_0,
  1070. [SLAVE_OCMEM_64] = &slv_cats_1,
  1071. [SLAVE_IMEM] = &slv_imem,
  1072. [SLAVE_QDSS_STM] = &slv_qdss_stm,
  1073. [SLAVE_SRVC_SNOC] = &slv_srvc_snoc,
  1074. [SNOC_BIMC_0_MAS] = &snoc_bimc_0_mas,
  1075. [SNOC_BIMC_1_MAS] = &snoc_bimc_1_mas,
  1076. [SNOC_INT_0] = &snoc_int_0,
  1077. [SNOC_INT_1] = &snoc_int_1,
  1078. [SNOC_INT_BIMC] = &snoc_int_bimc,
  1079. [SNOC_PCNOC_MAS] = &snoc_pcnoc_mas,
  1080. [SNOC_QDSS_INT] = &qdss_int,
  1081. };
  1082. static const struct regmap_config msm8916_snoc_regmap_config = {
  1083. .reg_bits = 32,
  1084. .reg_stride = 4,
  1085. .val_bits = 32,
  1086. .max_register = 0x14000,
  1087. .fast_io = true,
  1088. };
  1089. static const struct qcom_icc_desc msm8916_snoc = {
  1090. .type = QCOM_ICC_NOC,
  1091. .nodes = msm8916_snoc_nodes,
  1092. .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes),
  1093. .bus_clk_desc = &bus_1_clk,
  1094. .regmap_cfg = &msm8916_snoc_regmap_config,
  1095. .qos_offset = 0x7000,
  1096. };
  1097. static struct qcom_icc_node * const msm8916_bimc_nodes[] = {
  1098. [BIMC_SNOC_MAS] = &bimc_snoc_mas,
  1099. [MASTER_AMPSS_M0] = &mas_apss,
  1100. [MASTER_GRAPHICS_3D] = &mas_gfx,
  1101. [MASTER_TCU0] = &mas_tcu0,
  1102. [MASTER_TCU1] = &mas_tcu1,
  1103. [SLAVE_AMPSS_L2] = &slv_apps_l2,
  1104. [SLAVE_EBI_CH0] = &slv_ebi_ch0,
  1105. [SNOC_BIMC_0_SLV] = &snoc_bimc_0_slv,
  1106. [SNOC_BIMC_1_SLV] = &snoc_bimc_1_slv,
  1107. };
  1108. static const struct regmap_config msm8916_bimc_regmap_config = {
  1109. .reg_bits = 32,
  1110. .reg_stride = 4,
  1111. .val_bits = 32,
  1112. .max_register = 0x62000,
  1113. .fast_io = true,
  1114. };
  1115. static const struct qcom_icc_desc msm8916_bimc = {
  1116. .type = QCOM_ICC_BIMC,
  1117. .nodes = msm8916_bimc_nodes,
  1118. .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes),
  1119. .bus_clk_desc = &bimc_clk,
  1120. .regmap_cfg = &msm8916_bimc_regmap_config,
  1121. .qos_offset = 0x8000,
  1122. };
  1123. static struct qcom_icc_node * const msm8916_pcnoc_nodes[] = {
  1124. [MASTER_BLSP_1] = &mas_blsp_1,
  1125. [MASTER_DEHR] = &mas_dehr,
  1126. [MASTER_LPASS] = &mas_audio,
  1127. [MASTER_CRYPTO_CORE0] = &mas_pcnoc_crypto_0,
  1128. [MASTER_SDCC_1] = &mas_pcnoc_sdcc_1,
  1129. [MASTER_SDCC_2] = &mas_pcnoc_sdcc_2,
  1130. [MASTER_SPDM] = &mas_spdm,
  1131. [MASTER_USB_HS] = &mas_usb_hs,
  1132. [PCNOC_INT_0] = &pcnoc_int_0,
  1133. [PCNOC_INT_1] = &pcnoc_int_1,
  1134. [PCNOC_MAS_0] = &pcnoc_m_0,
  1135. [PCNOC_MAS_1] = &pcnoc_m_1,
  1136. [PCNOC_SLV_0] = &pcnoc_s_0,
  1137. [PCNOC_SLV_1] = &pcnoc_s_1,
  1138. [PCNOC_SLV_2] = &pcnoc_s_2,
  1139. [PCNOC_SLV_3] = &pcnoc_s_3,
  1140. [PCNOC_SLV_4] = &pcnoc_s_4,
  1141. [PCNOC_SLV_8] = &pcnoc_s_8,
  1142. [PCNOC_SLV_9] = &pcnoc_s_9,
  1143. [PCNOC_SNOC_MAS] = &pcnoc_snoc_mas,
  1144. [SLAVE_BIMC_CFG] = &slv_bimc_cfg,
  1145. [SLAVE_BLSP_1] = &slv_blsp_1,
  1146. [SLAVE_BOOT_ROM] = &slv_boot_rom,
  1147. [SLAVE_CAMERA_CFG] = &slv_camera_cfg,
  1148. [SLAVE_CLK_CTL] = &slv_clk_ctl,
  1149. [SLAVE_CRYPTO_0_CFG] = &slv_crypto_0_cfg,
  1150. [SLAVE_DEHR_CFG] = &slv_dehr_cfg,
  1151. [SLAVE_DISPLAY_CFG] = &slv_display_cfg,
  1152. [SLAVE_GRAPHICS_3D_CFG] = &slv_gfx_cfg,
  1153. [SLAVE_IMEM_CFG] = &slv_imem_cfg,
  1154. [SLAVE_LPASS] = &slv_audio,
  1155. [SLAVE_MPM] = &slv_mpm,
  1156. [SLAVE_MSG_RAM] = &slv_msg_ram,
  1157. [SLAVE_MSS] = &slv_mss,
  1158. [SLAVE_PDM] = &slv_pdm,
  1159. [SLAVE_PMIC_ARB] = &slv_pmic_arb,
  1160. [SLAVE_PCNOC_CFG] = &slv_pcnoc_cfg,
  1161. [SLAVE_PRNG] = &slv_prng,
  1162. [SLAVE_QDSS_CFG] = &slv_qdss_cfg,
  1163. [SLAVE_RBCPR_CFG] = &slv_rbcpr_cfg,
  1164. [SLAVE_SDCC_1] = &slv_sdcc_1,
  1165. [SLAVE_SDCC_2] = &slv_sdcc_2,
  1166. [SLAVE_SECURITY] = &slv_security,
  1167. [SLAVE_SNOC_CFG] = &slv_snoc_cfg,
  1168. [SLAVE_SPDM] = &slv_spdm,
  1169. [SLAVE_TCSR] = &slv_tcsr,
  1170. [SLAVE_TLMM] = &slv_tlmm,
  1171. [SLAVE_USB_HS] = &slv_usb_hs,
  1172. [SLAVE_VENUS_CFG] = &slv_venus_cfg,
  1173. [SNOC_PCNOC_SLV] = &snoc_pcnoc_slv,
  1174. };
  1175. static const struct regmap_config msm8916_pcnoc_regmap_config = {
  1176. .reg_bits = 32,
  1177. .reg_stride = 4,
  1178. .val_bits = 32,
  1179. .max_register = 0x11000,
  1180. .fast_io = true,
  1181. };
  1182. static const struct qcom_icc_desc msm8916_pcnoc = {
  1183. .type = QCOM_ICC_NOC,
  1184. .nodes = msm8916_pcnoc_nodes,
  1185. .num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes),
  1186. .bus_clk_desc = &bus_0_clk,
  1187. .regmap_cfg = &msm8916_pcnoc_regmap_config,
  1188. .qos_offset = 0x7000,
  1189. };
  1190. static const struct of_device_id msm8916_noc_of_match[] = {
  1191. { .compatible = "qcom,msm8916-bimc", .data = &msm8916_bimc },
  1192. { .compatible = "qcom,msm8916-pcnoc", .data = &msm8916_pcnoc },
  1193. { .compatible = "qcom,msm8916-snoc", .data = &msm8916_snoc },
  1194. { }
  1195. };
  1196. MODULE_DEVICE_TABLE(of, msm8916_noc_of_match);
  1197. static struct platform_driver msm8916_noc_driver = {
  1198. .probe = qnoc_probe,
  1199. .remove = qnoc_remove,
  1200. .driver = {
  1201. .name = "qnoc-msm8916",
  1202. .of_match_table = msm8916_noc_of_match,
  1203. },
  1204. };
  1205. module_platform_driver(msm8916_noc_driver);
  1206. MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");
  1207. MODULE_DESCRIPTION("Qualcomm MSM8916 NoC driver");
  1208. MODULE_LICENSE("GPL v2");