industrialio-buffer-dmaengine.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2014-2015 Analog Devices Inc.
  4. * Author: Lars-Peter Clausen <lars@metafoo.de>
  5. */
  6. #include <linux/slab.h>
  7. #include <linux/kernel.h>
  8. #include <linux/cleanup.h>
  9. #include <linux/dmaengine.h>
  10. #include <linux/dma-mapping.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/err.h>
  13. #include <linux/module.h>
  14. #include <linux/iio/iio.h>
  15. #include <linux/iio/sysfs.h>
  16. #include <linux/iio/buffer.h>
  17. #include <linux/iio/buffer_impl.h>
  18. #include <linux/iio/buffer-dma.h>
  19. #include <linux/iio/buffer-dmaengine.h>
  20. /*
  21. * The IIO DMAengine buffer combines the generic IIO DMA buffer infrastructure
  22. * with the DMAengine framework. The generic IIO DMA buffer infrastructure is
  23. * used to manage the buffer memory and implement the IIO buffer operations
  24. * while the DMAengine framework is used to perform the DMA transfers. Combined
  25. * this results in a device independent fully functional DMA buffer
  26. * implementation that can be used by device drivers for peripherals which are
  27. * connected to a DMA controller which has a DMAengine driver implementation.
  28. */
  29. struct dmaengine_buffer {
  30. struct iio_dma_buffer_queue queue;
  31. struct dma_chan *chan;
  32. struct list_head active;
  33. size_t align;
  34. size_t max_size;
  35. };
  36. static struct dmaengine_buffer *iio_buffer_to_dmaengine_buffer(struct iio_buffer *buffer)
  37. {
  38. return container_of(buffer, struct dmaengine_buffer, queue.buffer);
  39. }
  40. static void iio_dmaengine_buffer_block_done(void *data,
  41. const struct dmaengine_result *result)
  42. {
  43. struct iio_dma_buffer_block *block = data;
  44. scoped_guard(spinlock_irqsave, &block->queue->list_lock)
  45. list_del(&block->head);
  46. block->bytes_used -= result->residue;
  47. iio_dma_buffer_block_done(block);
  48. }
  49. static int iio_dmaengine_buffer_submit_block(struct iio_dma_buffer_queue *queue,
  50. struct iio_dma_buffer_block *block)
  51. {
  52. struct dmaengine_buffer *dmaengine_buffer =
  53. iio_buffer_to_dmaengine_buffer(&queue->buffer);
  54. struct dma_async_tx_descriptor *desc;
  55. enum dma_transfer_direction dma_dir;
  56. struct scatterlist *sgl;
  57. struct dma_vec *vecs;
  58. size_t max_size;
  59. dma_cookie_t cookie;
  60. size_t len_total;
  61. unsigned int i;
  62. int nents;
  63. max_size = min(block->size, dmaengine_buffer->max_size);
  64. max_size = round_down(max_size, dmaengine_buffer->align);
  65. if (queue->buffer.direction == IIO_BUFFER_DIRECTION_IN)
  66. dma_dir = DMA_DEV_TO_MEM;
  67. else
  68. dma_dir = DMA_MEM_TO_DEV;
  69. if (block->sg_table) {
  70. sgl = block->sg_table->sgl;
  71. nents = sg_nents_for_len(sgl, block->bytes_used);
  72. if (nents < 0)
  73. return nents;
  74. vecs = kmalloc_array(nents, sizeof(*vecs), GFP_ATOMIC);
  75. if (!vecs)
  76. return -ENOMEM;
  77. len_total = block->bytes_used;
  78. for (i = 0; i < nents; i++) {
  79. vecs[i].addr = sg_dma_address(sgl);
  80. vecs[i].len = min(sg_dma_len(sgl), len_total);
  81. len_total -= vecs[i].len;
  82. sgl = sg_next(sgl);
  83. }
  84. desc = dmaengine_prep_peripheral_dma_vec(dmaengine_buffer->chan,
  85. vecs, nents, dma_dir,
  86. DMA_PREP_INTERRUPT);
  87. kfree(vecs);
  88. } else {
  89. max_size = min(block->size, dmaengine_buffer->max_size);
  90. max_size = round_down(max_size, dmaengine_buffer->align);
  91. if (queue->buffer.direction == IIO_BUFFER_DIRECTION_IN)
  92. block->bytes_used = max_size;
  93. if (!block->bytes_used || block->bytes_used > max_size)
  94. return -EINVAL;
  95. desc = dmaengine_prep_slave_single(dmaengine_buffer->chan,
  96. block->phys_addr,
  97. block->bytes_used,
  98. dma_dir,
  99. DMA_PREP_INTERRUPT);
  100. }
  101. if (!desc)
  102. return -ENOMEM;
  103. desc->callback_result = iio_dmaengine_buffer_block_done;
  104. desc->callback_param = block;
  105. cookie = dmaengine_submit(desc);
  106. if (dma_submit_error(cookie))
  107. return dma_submit_error(cookie);
  108. scoped_guard(spinlock_irq, &dmaengine_buffer->queue.list_lock)
  109. list_add_tail(&block->head, &dmaengine_buffer->active);
  110. dma_async_issue_pending(dmaengine_buffer->chan);
  111. return 0;
  112. }
  113. static void iio_dmaengine_buffer_abort(struct iio_dma_buffer_queue *queue)
  114. {
  115. struct dmaengine_buffer *dmaengine_buffer =
  116. iio_buffer_to_dmaengine_buffer(&queue->buffer);
  117. dmaengine_terminate_sync(dmaengine_buffer->chan);
  118. iio_dma_buffer_block_list_abort(queue, &dmaengine_buffer->active);
  119. }
  120. static void iio_dmaengine_buffer_release(struct iio_buffer *buf)
  121. {
  122. struct dmaengine_buffer *dmaengine_buffer =
  123. iio_buffer_to_dmaengine_buffer(buf);
  124. iio_dma_buffer_release(&dmaengine_buffer->queue);
  125. kfree(dmaengine_buffer);
  126. }
  127. static const struct iio_buffer_access_funcs iio_dmaengine_buffer_ops = {
  128. .read = iio_dma_buffer_read,
  129. .write = iio_dma_buffer_write,
  130. .set_bytes_per_datum = iio_dma_buffer_set_bytes_per_datum,
  131. .set_length = iio_dma_buffer_set_length,
  132. .request_update = iio_dma_buffer_request_update,
  133. .enable = iio_dma_buffer_enable,
  134. .disable = iio_dma_buffer_disable,
  135. .data_available = iio_dma_buffer_usage,
  136. .space_available = iio_dma_buffer_usage,
  137. .release = iio_dmaengine_buffer_release,
  138. .enqueue_dmabuf = iio_dma_buffer_enqueue_dmabuf,
  139. .attach_dmabuf = iio_dma_buffer_attach_dmabuf,
  140. .detach_dmabuf = iio_dma_buffer_detach_dmabuf,
  141. .lock_queue = iio_dma_buffer_lock_queue,
  142. .unlock_queue = iio_dma_buffer_unlock_queue,
  143. .get_dma_dev = iio_dma_buffer_get_dma_dev,
  144. .modes = INDIO_BUFFER_HARDWARE,
  145. .flags = INDIO_BUFFER_FLAG_FIXED_WATERMARK,
  146. };
  147. static const struct iio_dma_buffer_ops iio_dmaengine_default_ops = {
  148. .submit = iio_dmaengine_buffer_submit_block,
  149. .abort = iio_dmaengine_buffer_abort,
  150. };
  151. static ssize_t iio_dmaengine_buffer_get_length_align(struct device *dev,
  152. struct device_attribute *attr, char *buf)
  153. {
  154. struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer;
  155. struct dmaengine_buffer *dmaengine_buffer =
  156. iio_buffer_to_dmaengine_buffer(buffer);
  157. return sysfs_emit(buf, "%zu\n", dmaengine_buffer->align);
  158. }
  159. static IIO_DEVICE_ATTR(length_align_bytes, 0444,
  160. iio_dmaengine_buffer_get_length_align, NULL, 0);
  161. static const struct iio_dev_attr *iio_dmaengine_buffer_attrs[] = {
  162. &iio_dev_attr_length_align_bytes,
  163. NULL,
  164. };
  165. /**
  166. * iio_dmaengine_buffer_alloc() - Allocate new buffer which uses DMAengine
  167. * @chan: DMA channel.
  168. *
  169. * This allocates a new IIO buffer which internally uses the DMAengine framework
  170. * to perform its transfers.
  171. *
  172. * Once done using the buffer iio_dmaengine_buffer_free() should be used to
  173. * release it.
  174. */
  175. static struct iio_buffer *iio_dmaengine_buffer_alloc(struct dma_chan *chan)
  176. {
  177. struct dmaengine_buffer *dmaengine_buffer;
  178. unsigned int width, src_width, dest_width;
  179. struct dma_slave_caps caps;
  180. int ret;
  181. ret = dma_get_slave_caps(chan, &caps);
  182. if (ret < 0)
  183. return ERR_PTR(ret);
  184. dmaengine_buffer = kzalloc_obj(*dmaengine_buffer);
  185. if (!dmaengine_buffer)
  186. return ERR_PTR(-ENOMEM);
  187. /* Needs to be aligned to the maximum of the minimums */
  188. if (caps.src_addr_widths)
  189. src_width = __ffs(caps.src_addr_widths);
  190. else
  191. src_width = 1;
  192. if (caps.dst_addr_widths)
  193. dest_width = __ffs(caps.dst_addr_widths);
  194. else
  195. dest_width = 1;
  196. width = max(src_width, dest_width);
  197. INIT_LIST_HEAD(&dmaengine_buffer->active);
  198. dmaengine_buffer->chan = chan;
  199. dmaengine_buffer->align = width;
  200. dmaengine_buffer->max_size = dma_get_max_seg_size(chan->device->dev);
  201. iio_dma_buffer_init(&dmaengine_buffer->queue, chan->device->dev,
  202. &iio_dmaengine_default_ops);
  203. dmaengine_buffer->queue.buffer.attrs = iio_dmaengine_buffer_attrs;
  204. dmaengine_buffer->queue.buffer.access = &iio_dmaengine_buffer_ops;
  205. return &dmaengine_buffer->queue.buffer;
  206. }
  207. /**
  208. * iio_dmaengine_buffer_free() - Free dmaengine buffer
  209. * @buffer: Buffer to free
  210. *
  211. * Frees a buffer previously allocated with iio_dmaengine_buffer_alloc().
  212. */
  213. static void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
  214. {
  215. struct dmaengine_buffer *dmaengine_buffer =
  216. iio_buffer_to_dmaengine_buffer(buffer);
  217. iio_dma_buffer_exit(&dmaengine_buffer->queue);
  218. iio_buffer_put(buffer);
  219. }
  220. /**
  221. * iio_dmaengine_buffer_teardown() - Releases DMA channel and frees buffer
  222. * @buffer: Buffer to free
  223. *
  224. * Releases the DMA channel and frees the buffer previously setup with
  225. * iio_dmaengine_buffer_setup_ext().
  226. */
  227. void iio_dmaengine_buffer_teardown(struct iio_buffer *buffer)
  228. {
  229. struct dmaengine_buffer *dmaengine_buffer =
  230. iio_buffer_to_dmaengine_buffer(buffer);
  231. struct dma_chan *chan = dmaengine_buffer->chan;
  232. iio_dmaengine_buffer_free(buffer);
  233. dma_release_channel(chan);
  234. }
  235. EXPORT_SYMBOL_NS_GPL(iio_dmaengine_buffer_teardown, "IIO_DMAENGINE_BUFFER");
  236. static struct iio_buffer
  237. *__iio_dmaengine_buffer_setup_ext(struct iio_dev *indio_dev,
  238. struct dma_chan *chan,
  239. enum iio_buffer_direction dir)
  240. {
  241. struct iio_buffer *buffer;
  242. int ret;
  243. buffer = iio_dmaengine_buffer_alloc(chan);
  244. if (IS_ERR(buffer))
  245. return ERR_CAST(buffer);
  246. indio_dev->modes |= INDIO_BUFFER_HARDWARE;
  247. buffer->direction = dir;
  248. ret = iio_device_attach_buffer(indio_dev, buffer);
  249. if (ret) {
  250. iio_dmaengine_buffer_free(buffer);
  251. return ERR_PTR(ret);
  252. }
  253. return buffer;
  254. }
  255. /**
  256. * iio_dmaengine_buffer_setup_ext() - Setup a DMA buffer for an IIO device
  257. * @dev: DMA channel consumer device
  258. * @indio_dev: IIO device to which to attach this buffer.
  259. * @channel: DMA channel name, typically "rx".
  260. * @dir: Direction of buffer (in or out)
  261. *
  262. * This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc()
  263. * and attaches it to an IIO device with iio_device_attach_buffer().
  264. * It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes of the
  265. * IIO device.
  266. *
  267. * Once done using the buffer iio_dmaengine_buffer_teardown() should be used to
  268. * release it.
  269. */
  270. struct iio_buffer *iio_dmaengine_buffer_setup_ext(struct device *dev,
  271. struct iio_dev *indio_dev,
  272. const char *channel,
  273. enum iio_buffer_direction dir)
  274. {
  275. struct dma_chan *chan;
  276. struct iio_buffer *buffer;
  277. chan = dma_request_chan(dev, channel);
  278. if (IS_ERR(chan))
  279. return ERR_CAST(chan);
  280. buffer = __iio_dmaengine_buffer_setup_ext(indio_dev, chan, dir);
  281. if (IS_ERR(buffer))
  282. dma_release_channel(chan);
  283. return buffer;
  284. }
  285. EXPORT_SYMBOL_NS_GPL(iio_dmaengine_buffer_setup_ext, "IIO_DMAENGINE_BUFFER");
  286. static void devm_iio_dmaengine_buffer_teardown(void *buffer)
  287. {
  288. iio_dmaengine_buffer_teardown(buffer);
  289. }
  290. /**
  291. * devm_iio_dmaengine_buffer_setup_ext() - Setup a DMA buffer for an IIO device
  292. * @dev: Device for devm ownership and DMA channel consumer device
  293. * @indio_dev: IIO device to which to attach this buffer.
  294. * @channel: DMA channel name, typically "rx".
  295. * @dir: Direction of buffer (in or out)
  296. *
  297. * This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc()
  298. * and attaches it to an IIO device with iio_device_attach_buffer().
  299. * It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes of the
  300. * IIO device.
  301. */
  302. int devm_iio_dmaengine_buffer_setup_ext(struct device *dev,
  303. struct iio_dev *indio_dev,
  304. const char *channel,
  305. enum iio_buffer_direction dir)
  306. {
  307. struct iio_buffer *buffer;
  308. buffer = iio_dmaengine_buffer_setup_ext(dev, indio_dev, channel, dir);
  309. if (IS_ERR(buffer))
  310. return PTR_ERR(buffer);
  311. return devm_add_action_or_reset(dev, devm_iio_dmaengine_buffer_teardown,
  312. buffer);
  313. }
  314. EXPORT_SYMBOL_NS_GPL(devm_iio_dmaengine_buffer_setup_ext, "IIO_DMAENGINE_BUFFER");
  315. static void devm_iio_dmaengine_buffer_free(void *buffer)
  316. {
  317. iio_dmaengine_buffer_free(buffer);
  318. }
  319. /**
  320. * devm_iio_dmaengine_buffer_setup_with_handle() - Setup a DMA buffer for an
  321. * IIO device
  322. * @dev: Device for devm ownership
  323. * @indio_dev: IIO device to which to attach this buffer.
  324. * @chan: DMA channel
  325. * @dir: Direction of buffer (in or out)
  326. *
  327. * This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc()
  328. * and attaches it to an IIO device with iio_device_attach_buffer().
  329. * It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes of the
  330. * IIO device.
  331. *
  332. * This is the same as devm_iio_dmaengine_buffer_setup_ext() except that the
  333. * caller manages requesting and releasing the DMA channel handle.
  334. */
  335. int devm_iio_dmaengine_buffer_setup_with_handle(struct device *dev,
  336. struct iio_dev *indio_dev,
  337. struct dma_chan *chan,
  338. enum iio_buffer_direction dir)
  339. {
  340. struct iio_buffer *buffer;
  341. buffer = __iio_dmaengine_buffer_setup_ext(indio_dev, chan, dir);
  342. if (IS_ERR(buffer))
  343. return PTR_ERR(buffer);
  344. return devm_add_action_or_reset(dev, devm_iio_dmaengine_buffer_free,
  345. buffer);
  346. }
  347. EXPORT_SYMBOL_NS_GPL(devm_iio_dmaengine_buffer_setup_with_handle,
  348. "IIO_DMAENGINE_BUFFER");
  349. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  350. MODULE_DESCRIPTION("DMA buffer for the IIO framework");
  351. MODULE_LICENSE("GPL");
  352. MODULE_IMPORT_NS("IIO_DMA_BUFFER");