omap_hwspinlock.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * OMAP hardware spinlock driver
  4. *
  5. * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com
  6. *
  7. * Contact: Simon Que <sque@ti.com>
  8. * Hari Kanigeri <h-kanigeri2@ti.com>
  9. * Ohad Ben-Cohen <ohad@wizery.com>
  10. * Suman Anna <s-anna@ti.com>
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/device.h>
  15. #include <linux/delay.h>
  16. #include <linux/io.h>
  17. #include <linux/bitops.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/hwspinlock.h>
  22. #include <linux/of.h>
  23. #include <linux/platform_device.h>
  24. #include "hwspinlock_internal.h"
  25. /* Spinlock register offsets */
  26. #define SYSSTATUS_OFFSET 0x0014
  27. #define LOCK_BASE_OFFSET 0x0800
  28. #define SPINLOCK_NUMLOCKS_BIT_OFFSET (24)
  29. /* Possible values of SPINLOCK_LOCK_REG */
  30. #define SPINLOCK_NOTTAKEN (0) /* free */
  31. #define SPINLOCK_TAKEN (1) /* locked */
  32. static int omap_hwspinlock_trylock(struct hwspinlock *lock)
  33. {
  34. void __iomem *lock_addr = lock->priv;
  35. /* attempt to acquire the lock by reading its value */
  36. return (SPINLOCK_NOTTAKEN == readl(lock_addr));
  37. }
  38. static void omap_hwspinlock_unlock(struct hwspinlock *lock)
  39. {
  40. void __iomem *lock_addr = lock->priv;
  41. /* release the lock by writing 0 to it */
  42. writel(SPINLOCK_NOTTAKEN, lock_addr);
  43. }
  44. /*
  45. * relax the OMAP interconnect while spinning on it.
  46. *
  47. * The specs recommended that the retry delay time will be
  48. * just over half of the time that a requester would be
  49. * expected to hold the lock.
  50. *
  51. * The number below is taken from an hardware specs example,
  52. * obviously it is somewhat arbitrary.
  53. */
  54. static void omap_hwspinlock_relax(struct hwspinlock *lock)
  55. {
  56. ndelay(50);
  57. }
  58. static const struct hwspinlock_ops omap_hwspinlock_ops = {
  59. .trylock = omap_hwspinlock_trylock,
  60. .unlock = omap_hwspinlock_unlock,
  61. .relax = omap_hwspinlock_relax,
  62. };
  63. static int omap_hwspinlock_probe(struct platform_device *pdev)
  64. {
  65. struct hwspinlock_device *bank;
  66. void __iomem *io_base;
  67. int num_locks, i, ret;
  68. /* Only a single hwspinlock block device is supported */
  69. int base_id = 0;
  70. io_base = devm_platform_ioremap_resource(pdev, 0);
  71. if (IS_ERR(io_base))
  72. return PTR_ERR(io_base);
  73. /*
  74. * make sure the module is enabled and clocked before reading
  75. * the module SYSSTATUS register
  76. */
  77. ret = devm_pm_runtime_enable(&pdev->dev);
  78. if (ret)
  79. return ret;
  80. ret = pm_runtime_resume_and_get(&pdev->dev);
  81. if (ret < 0)
  82. return ret;
  83. /* Determine number of locks */
  84. i = readl(io_base + SYSSTATUS_OFFSET);
  85. i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
  86. /*
  87. * runtime PM will make sure the clock of this module is
  88. * enabled again iff at least one lock is requested
  89. */
  90. pm_runtime_put(&pdev->dev);
  91. /* one of the four lsb's must be set, and nothing else */
  92. if (hweight_long(i & 0xf) != 1 || i > 8)
  93. return -EINVAL;
  94. num_locks = i * 32; /* actual number of locks in this device */
  95. bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
  96. GFP_KERNEL);
  97. if (!bank)
  98. return -ENOMEM;
  99. for (i = 0; i < num_locks; i++)
  100. bank->lock[i].priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
  101. return devm_hwspin_lock_register(&pdev->dev, bank, &omap_hwspinlock_ops,
  102. base_id, num_locks);
  103. }
  104. static const struct of_device_id omap_hwspinlock_of_match[] = {
  105. { .compatible = "ti,omap4-hwspinlock", },
  106. { .compatible = "ti,am64-hwspinlock", },
  107. { .compatible = "ti,am654-hwspinlock", },
  108. { /* end */ },
  109. };
  110. MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
  111. static struct platform_driver omap_hwspinlock_driver = {
  112. .probe = omap_hwspinlock_probe,
  113. .driver = {
  114. .name = "omap_hwspinlock",
  115. .of_match_table = omap_hwspinlock_of_match,
  116. },
  117. };
  118. static int __init omap_hwspinlock_init(void)
  119. {
  120. return platform_driver_register(&omap_hwspinlock_driver);
  121. }
  122. /* board init code might need to reserve hwspinlocks for predefined purposes */
  123. postcore_initcall(omap_hwspinlock_init);
  124. static void __exit omap_hwspinlock_exit(void)
  125. {
  126. platform_driver_unregister(&omap_hwspinlock_driver);
  127. }
  128. module_exit(omap_hwspinlock_exit);
  129. MODULE_LICENSE("GPL v2");
  130. MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
  131. MODULE_AUTHOR("Simon Que <sque@ti.com>");
  132. MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
  133. MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");