dmaengine.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
  4. */
  5. /*
  6. * This code implements the DMA subsystem. It provides a HW-neutral interface
  7. * for other kernel code to use asynchronous memory copy capabilities,
  8. * if present, and allows different HW DMA drivers to register as providing
  9. * this capability.
  10. *
  11. * Due to the fact we are accelerating what is already a relatively fast
  12. * operation, the code goes to great lengths to avoid additional overhead,
  13. * such as locking.
  14. *
  15. * LOCKING:
  16. *
  17. * The subsystem keeps a global list of dma_device structs it is protected by a
  18. * mutex, dma_list_mutex.
  19. *
  20. * A subsystem can get access to a channel by calling dmaengine_get() followed
  21. * by dma_find_channel(), or if it has need for an exclusive channel it can call
  22. * dma_request_channel(). Once a channel is allocated a reference is taken
  23. * against its corresponding driver to disable removal.
  24. *
  25. * Each device has a channels list, which runs unlocked but is never modified
  26. * once the device is registered, it's just setup by the driver.
  27. *
  28. * See Documentation/driver-api/dmaengine for more details
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/platform_device.h>
  32. #include <linux/dma-mapping.h>
  33. #include <linux/init.h>
  34. #include <linux/module.h>
  35. #include <linux/mm.h>
  36. #include <linux/device.h>
  37. #include <linux/dmaengine.h>
  38. #include <linux/hardirq.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/of.h>
  41. #include <linux/property.h>
  42. #include <linux/percpu.h>
  43. #include <linux/rcupdate.h>
  44. #include <linux/mutex.h>
  45. #include <linux/jiffies.h>
  46. #include <linux/rculist.h>
  47. #include <linux/idr.h>
  48. #include <linux/slab.h>
  49. #include <linux/acpi.h>
  50. #include <linux/acpi_dma.h>
  51. #include <linux/of_dma.h>
  52. #include <linux/mempool.h>
  53. #include <linux/numa.h>
  54. #include "dmaengine.h"
  55. static DEFINE_MUTEX(dma_list_mutex);
  56. static DEFINE_IDA(dma_ida);
  57. static LIST_HEAD(dma_device_list);
  58. static long dmaengine_ref_count;
  59. /* --- debugfs implementation --- */
  60. #ifdef CONFIG_DEBUG_FS
  61. #include <linux/debugfs.h>
  62. static struct dentry *rootdir;
  63. static void dmaengine_debug_register(struct dma_device *dma_dev)
  64. {
  65. dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev),
  66. rootdir);
  67. if (IS_ERR(dma_dev->dbg_dev_root))
  68. dma_dev->dbg_dev_root = NULL;
  69. }
  70. static void dmaengine_debug_unregister(struct dma_device *dma_dev)
  71. {
  72. debugfs_remove_recursive(dma_dev->dbg_dev_root);
  73. dma_dev->dbg_dev_root = NULL;
  74. }
  75. static void dmaengine_dbg_summary_show(struct seq_file *s,
  76. struct dma_device *dma_dev)
  77. {
  78. struct dma_chan *chan;
  79. list_for_each_entry(chan, &dma_dev->channels, device_node) {
  80. if (chan->client_count) {
  81. seq_printf(s, " %-13s| %s", dma_chan_name(chan),
  82. chan->dbg_client_name ?: "in-use");
  83. if (chan->router)
  84. seq_printf(s, " (via router: %s)\n",
  85. dev_name(chan->router->dev));
  86. else
  87. seq_puts(s, "\n");
  88. }
  89. }
  90. }
  91. static int dmaengine_summary_show(struct seq_file *s, void *data)
  92. {
  93. struct dma_device *dma_dev = NULL;
  94. mutex_lock(&dma_list_mutex);
  95. list_for_each_entry(dma_dev, &dma_device_list, global_node) {
  96. seq_printf(s, "dma%d (%s): number of channels: %u\n",
  97. dma_dev->dev_id, dev_name(dma_dev->dev),
  98. dma_dev->chancnt);
  99. if (dma_dev->dbg_summary_show)
  100. dma_dev->dbg_summary_show(s, dma_dev);
  101. else
  102. dmaengine_dbg_summary_show(s, dma_dev);
  103. if (!list_is_last(&dma_dev->global_node, &dma_device_list))
  104. seq_puts(s, "\n");
  105. }
  106. mutex_unlock(&dma_list_mutex);
  107. return 0;
  108. }
  109. DEFINE_SHOW_ATTRIBUTE(dmaengine_summary);
  110. static void __init dmaengine_debugfs_init(void)
  111. {
  112. rootdir = debugfs_create_dir("dmaengine", NULL);
  113. /* /sys/kernel/debug/dmaengine/summary */
  114. debugfs_create_file("summary", 0444, rootdir, NULL,
  115. &dmaengine_summary_fops);
  116. }
  117. #else
  118. static inline void dmaengine_debugfs_init(void) { }
  119. static inline int dmaengine_debug_register(struct dma_device *dma_dev)
  120. {
  121. return 0;
  122. }
  123. static inline void dmaengine_debug_unregister(struct dma_device *dma_dev) { }
  124. #endif /* DEBUG_FS */
  125. /* --- sysfs implementation --- */
  126. #define DMA_SLAVE_NAME "slave"
  127. /**
  128. * dev_to_dma_chan - convert a device pointer to its sysfs container object
  129. * @dev: device node
  130. *
  131. * Must be called under dma_list_mutex.
  132. */
  133. static struct dma_chan *dev_to_dma_chan(struct device *dev)
  134. {
  135. struct dma_chan_dev *chan_dev;
  136. chan_dev = container_of(dev, typeof(*chan_dev), device);
  137. return chan_dev->chan;
  138. }
  139. static ssize_t memcpy_count_show(struct device *dev,
  140. struct device_attribute *attr, char *buf)
  141. {
  142. struct dma_chan *chan;
  143. unsigned long count = 0;
  144. int i;
  145. int err;
  146. mutex_lock(&dma_list_mutex);
  147. chan = dev_to_dma_chan(dev);
  148. if (chan) {
  149. for_each_possible_cpu(i)
  150. count += per_cpu_ptr(chan->local, i)->memcpy_count;
  151. err = sysfs_emit(buf, "%lu\n", count);
  152. } else
  153. err = -ENODEV;
  154. mutex_unlock(&dma_list_mutex);
  155. return err;
  156. }
  157. static DEVICE_ATTR_RO(memcpy_count);
  158. static ssize_t bytes_transferred_show(struct device *dev,
  159. struct device_attribute *attr, char *buf)
  160. {
  161. struct dma_chan *chan;
  162. unsigned long count = 0;
  163. int i;
  164. int err;
  165. mutex_lock(&dma_list_mutex);
  166. chan = dev_to_dma_chan(dev);
  167. if (chan) {
  168. for_each_possible_cpu(i)
  169. count += per_cpu_ptr(chan->local, i)->bytes_transferred;
  170. err = sysfs_emit(buf, "%lu\n", count);
  171. } else
  172. err = -ENODEV;
  173. mutex_unlock(&dma_list_mutex);
  174. return err;
  175. }
  176. static DEVICE_ATTR_RO(bytes_transferred);
  177. static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
  178. char *buf)
  179. {
  180. struct dma_chan *chan;
  181. int err;
  182. mutex_lock(&dma_list_mutex);
  183. chan = dev_to_dma_chan(dev);
  184. if (chan)
  185. err = sysfs_emit(buf, "%d\n", chan->client_count);
  186. else
  187. err = -ENODEV;
  188. mutex_unlock(&dma_list_mutex);
  189. return err;
  190. }
  191. static DEVICE_ATTR_RO(in_use);
  192. static struct attribute *dma_dev_attrs[] = {
  193. &dev_attr_memcpy_count.attr,
  194. &dev_attr_bytes_transferred.attr,
  195. &dev_attr_in_use.attr,
  196. NULL,
  197. };
  198. ATTRIBUTE_GROUPS(dma_dev);
  199. static void chan_dev_release(struct device *dev)
  200. {
  201. struct dma_chan_dev *chan_dev;
  202. chan_dev = container_of(dev, typeof(*chan_dev), device);
  203. kfree(chan_dev);
  204. }
  205. static struct class dma_devclass = {
  206. .name = "dma",
  207. .dev_groups = dma_dev_groups,
  208. .dev_release = chan_dev_release,
  209. };
  210. /* --- client and device registration --- */
  211. /* enable iteration over all operation types */
  212. static dma_cap_mask_t dma_cap_mask_all;
  213. /**
  214. * struct dma_chan_tbl_ent - tracks channel allocations per core/operation
  215. * @chan: associated channel for this entry
  216. */
  217. struct dma_chan_tbl_ent {
  218. struct dma_chan *chan;
  219. };
  220. /* percpu lookup table for memory-to-memory offload providers */
  221. static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
  222. static int __init dma_channel_table_init(void)
  223. {
  224. enum dma_transaction_type cap;
  225. int err = 0;
  226. bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
  227. /* 'interrupt', 'private', and 'slave' are channel capabilities,
  228. * but are not associated with an operation so they do not need
  229. * an entry in the channel_table
  230. */
  231. clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
  232. clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
  233. clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
  234. for_each_dma_cap_mask(cap, dma_cap_mask_all) {
  235. channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
  236. if (!channel_table[cap]) {
  237. err = -ENOMEM;
  238. break;
  239. }
  240. }
  241. if (err) {
  242. pr_err("dmaengine dma_channel_table_init failure: %d\n", err);
  243. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  244. free_percpu(channel_table[cap]);
  245. }
  246. return err;
  247. }
  248. arch_initcall(dma_channel_table_init);
  249. /**
  250. * dma_chan_is_local - checks if the channel is in the same NUMA-node as the CPU
  251. * @chan: DMA channel to test
  252. * @cpu: CPU index which the channel should be close to
  253. *
  254. * Returns true if the channel is in the same NUMA-node as the CPU.
  255. */
  256. static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
  257. {
  258. int node = dev_to_node(chan->device->dev);
  259. return node == NUMA_NO_NODE ||
  260. cpumask_test_cpu(cpu, cpumask_of_node(node));
  261. }
  262. /**
  263. * min_chan - finds the channel with min count and in the same NUMA-node as the CPU
  264. * @cap: capability to match
  265. * @cpu: CPU index which the channel should be close to
  266. *
  267. * If some channels are close to the given CPU, the one with the lowest
  268. * reference count is returned. Otherwise, CPU is ignored and only the
  269. * reference count is taken into account.
  270. *
  271. * Must be called under dma_list_mutex.
  272. */
  273. static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
  274. {
  275. struct dma_device *device;
  276. struct dma_chan *chan;
  277. struct dma_chan *min = NULL;
  278. struct dma_chan *localmin = NULL;
  279. list_for_each_entry(device, &dma_device_list, global_node) {
  280. if (!dma_has_cap(cap, device->cap_mask) ||
  281. dma_has_cap(DMA_PRIVATE, device->cap_mask))
  282. continue;
  283. list_for_each_entry(chan, &device->channels, device_node) {
  284. if (!chan->client_count)
  285. continue;
  286. if (!min || chan->table_count < min->table_count)
  287. min = chan;
  288. if (dma_chan_is_local(chan, cpu))
  289. if (!localmin ||
  290. chan->table_count < localmin->table_count)
  291. localmin = chan;
  292. }
  293. }
  294. chan = localmin ? localmin : min;
  295. if (chan)
  296. chan->table_count++;
  297. return chan;
  298. }
  299. /**
  300. * dma_channel_rebalance - redistribute the available channels
  301. *
  302. * Optimize for CPU isolation (each CPU gets a dedicated channel for an
  303. * operation type) in the SMP case, and operation isolation (avoid
  304. * multi-tasking channels) in the non-SMP case.
  305. *
  306. * Must be called under dma_list_mutex.
  307. */
  308. static void dma_channel_rebalance(void)
  309. {
  310. struct dma_chan *chan;
  311. struct dma_device *device;
  312. int cpu;
  313. int cap;
  314. /* undo the last distribution */
  315. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  316. for_each_possible_cpu(cpu)
  317. per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
  318. list_for_each_entry(device, &dma_device_list, global_node) {
  319. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  320. continue;
  321. list_for_each_entry(chan, &device->channels, device_node)
  322. chan->table_count = 0;
  323. }
  324. /* don't populate the channel_table if no clients are available */
  325. if (!dmaengine_ref_count)
  326. return;
  327. /* redistribute available channels */
  328. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  329. for_each_online_cpu(cpu) {
  330. chan = min_chan(cap, cpu);
  331. per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
  332. }
  333. }
  334. static int dma_device_satisfies_mask(struct dma_device *device,
  335. const dma_cap_mask_t *want)
  336. {
  337. dma_cap_mask_t has;
  338. bitmap_and(has.bits, want->bits, device->cap_mask.bits,
  339. DMA_TX_TYPE_END);
  340. return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
  341. }
  342. static struct module *dma_chan_to_owner(struct dma_chan *chan)
  343. {
  344. return chan->device->owner;
  345. }
  346. /**
  347. * balance_ref_count - catch up the channel reference count
  348. * @chan: channel to balance ->client_count versus dmaengine_ref_count
  349. *
  350. * Must be called under dma_list_mutex.
  351. */
  352. static void balance_ref_count(struct dma_chan *chan)
  353. {
  354. struct module *owner = dma_chan_to_owner(chan);
  355. while (chan->client_count < dmaengine_ref_count) {
  356. __module_get(owner);
  357. chan->client_count++;
  358. }
  359. }
  360. static void dma_device_release(struct kref *ref)
  361. {
  362. struct dma_device *device = container_of(ref, struct dma_device, ref);
  363. list_del_rcu(&device->global_node);
  364. dma_channel_rebalance();
  365. if (device->device_release)
  366. device->device_release(device);
  367. }
  368. static void dma_device_put(struct dma_device *device)
  369. {
  370. lockdep_assert_held(&dma_list_mutex);
  371. kref_put(&device->ref, dma_device_release);
  372. }
  373. /**
  374. * dma_chan_get - try to grab a DMA channel's parent driver module
  375. * @chan: channel to grab
  376. *
  377. * Must be called under dma_list_mutex.
  378. */
  379. static int dma_chan_get(struct dma_chan *chan)
  380. {
  381. struct module *owner = dma_chan_to_owner(chan);
  382. int ret;
  383. /* The channel is already in use, update client count */
  384. if (chan->client_count) {
  385. __module_get(owner);
  386. chan->client_count++;
  387. return 0;
  388. }
  389. if (!try_module_get(owner))
  390. return -ENODEV;
  391. ret = kref_get_unless_zero(&chan->device->ref);
  392. if (!ret) {
  393. ret = -ENODEV;
  394. goto module_put_out;
  395. }
  396. /* allocate upon first client reference */
  397. if (chan->device->device_alloc_chan_resources) {
  398. ret = chan->device->device_alloc_chan_resources(chan);
  399. if (ret < 0)
  400. goto err_out;
  401. }
  402. chan->client_count++;
  403. if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
  404. balance_ref_count(chan);
  405. return 0;
  406. err_out:
  407. dma_device_put(chan->device);
  408. module_put_out:
  409. module_put(owner);
  410. return ret;
  411. }
  412. /**
  413. * dma_chan_put - drop a reference to a DMA channel's parent driver module
  414. * @chan: channel to release
  415. *
  416. * Must be called under dma_list_mutex.
  417. */
  418. static void dma_chan_put(struct dma_chan *chan)
  419. {
  420. /* This channel is not in use, bail out */
  421. if (!chan->client_count)
  422. return;
  423. chan->client_count--;
  424. /* This channel is not in use anymore, free it */
  425. if (!chan->client_count && chan->device->device_free_chan_resources) {
  426. /* Make sure all operations have completed */
  427. dmaengine_synchronize(chan);
  428. chan->device->device_free_chan_resources(chan);
  429. }
  430. /* If the channel is used via a DMA request router, free the mapping */
  431. if (chan->router && chan->router->route_free) {
  432. chan->router->route_free(chan->router->dev, chan->route_data);
  433. chan->router = NULL;
  434. chan->route_data = NULL;
  435. }
  436. dma_device_put(chan->device);
  437. module_put(dma_chan_to_owner(chan));
  438. }
  439. enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
  440. {
  441. enum dma_status status;
  442. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  443. dma_async_issue_pending(chan);
  444. do {
  445. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  446. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  447. dev_err(chan->device->dev, "%s: timeout!\n", __func__);
  448. return DMA_ERROR;
  449. }
  450. if (status != DMA_IN_PROGRESS)
  451. break;
  452. cpu_relax();
  453. } while (1);
  454. return status;
  455. }
  456. EXPORT_SYMBOL(dma_sync_wait);
  457. /**
  458. * dma_find_channel - find a channel to carry out the operation
  459. * @tx_type: transaction type
  460. */
  461. struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
  462. {
  463. return this_cpu_read(channel_table[tx_type]->chan);
  464. }
  465. EXPORT_SYMBOL(dma_find_channel);
  466. /**
  467. * dma_issue_pending_all - flush all pending operations across all channels
  468. */
  469. void dma_issue_pending_all(void)
  470. {
  471. struct dma_device *device;
  472. struct dma_chan *chan;
  473. rcu_read_lock();
  474. list_for_each_entry_rcu(device, &dma_device_list, global_node) {
  475. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  476. continue;
  477. list_for_each_entry(chan, &device->channels, device_node)
  478. if (chan->client_count)
  479. device->device_issue_pending(chan);
  480. }
  481. rcu_read_unlock();
  482. }
  483. EXPORT_SYMBOL(dma_issue_pending_all);
  484. int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
  485. {
  486. struct dma_device *device;
  487. if (!chan || !caps)
  488. return -EINVAL;
  489. device = chan->device;
  490. /* check if the channel supports slave transactions */
  491. if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
  492. test_bit(DMA_CYCLIC, device->cap_mask.bits)))
  493. return -ENXIO;
  494. /*
  495. * Check whether it reports it uses the generic slave
  496. * capabilities, if not, that means it doesn't support any
  497. * kind of slave capabilities reporting.
  498. */
  499. if (!device->directions)
  500. return -ENXIO;
  501. caps->src_addr_widths = device->src_addr_widths;
  502. caps->dst_addr_widths = device->dst_addr_widths;
  503. caps->directions = device->directions;
  504. caps->min_burst = device->min_burst;
  505. caps->max_burst = device->max_burst;
  506. caps->max_sg_burst = device->max_sg_burst;
  507. caps->residue_granularity = device->residue_granularity;
  508. caps->descriptor_reuse = device->descriptor_reuse;
  509. caps->cmd_pause = !!device->device_pause;
  510. caps->cmd_resume = !!device->device_resume;
  511. caps->cmd_terminate = !!device->device_terminate_all;
  512. /*
  513. * DMA engine device might be configured with non-uniformly
  514. * distributed slave capabilities per device channels. In this
  515. * case the corresponding driver may provide the device_caps
  516. * callback to override the generic capabilities with
  517. * channel-specific ones.
  518. */
  519. if (device->device_caps)
  520. device->device_caps(chan, caps);
  521. return 0;
  522. }
  523. EXPORT_SYMBOL_GPL(dma_get_slave_caps);
  524. static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
  525. struct dma_device *dev,
  526. dma_filter_fn fn, void *fn_param)
  527. {
  528. struct dma_chan *chan;
  529. if (mask && !dma_device_satisfies_mask(dev, mask)) {
  530. dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__);
  531. return NULL;
  532. }
  533. /* devices with multiple channels need special handling as we need to
  534. * ensure that all channels are either private or public.
  535. */
  536. if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
  537. list_for_each_entry(chan, &dev->channels, device_node) {
  538. /* some channels are already publicly allocated */
  539. if (chan->client_count)
  540. return NULL;
  541. }
  542. list_for_each_entry(chan, &dev->channels, device_node) {
  543. if (chan->client_count) {
  544. dev_dbg(dev->dev, "%s: %s busy\n",
  545. __func__, dma_chan_name(chan));
  546. continue;
  547. }
  548. if (fn && !fn(chan, fn_param)) {
  549. dev_dbg(dev->dev, "%s: %s filter said false\n",
  550. __func__, dma_chan_name(chan));
  551. continue;
  552. }
  553. return chan;
  554. }
  555. return NULL;
  556. }
  557. static struct dma_chan *find_candidate(struct dma_device *device,
  558. const dma_cap_mask_t *mask,
  559. dma_filter_fn fn, void *fn_param)
  560. {
  561. struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
  562. int err;
  563. if (chan) {
  564. /* Found a suitable channel, try to grab, prep, and return it.
  565. * We first set DMA_PRIVATE to disable balance_ref_count as this
  566. * channel will not be published in the general-purpose
  567. * allocator
  568. */
  569. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  570. device->privatecnt++;
  571. err = dma_chan_get(chan);
  572. if (err) {
  573. if (err == -ENODEV) {
  574. dev_dbg(device->dev, "%s: %s module removed\n",
  575. __func__, dma_chan_name(chan));
  576. list_del_rcu(&device->global_node);
  577. } else
  578. dev_dbg(device->dev,
  579. "%s: failed to get %s: (%d)\n",
  580. __func__, dma_chan_name(chan), err);
  581. if (--device->privatecnt == 0)
  582. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  583. chan = ERR_PTR(err);
  584. }
  585. }
  586. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  587. }
  588. /**
  589. * dma_get_slave_channel - try to get specific channel exclusively
  590. * @chan: target channel
  591. */
  592. struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
  593. {
  594. /* lock against __dma_request_channel */
  595. mutex_lock(&dma_list_mutex);
  596. if (chan->client_count == 0) {
  597. struct dma_device *device = chan->device;
  598. int err;
  599. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  600. device->privatecnt++;
  601. err = dma_chan_get(chan);
  602. if (err) {
  603. dev_dbg(chan->device->dev,
  604. "%s: failed to get %s: (%d)\n",
  605. __func__, dma_chan_name(chan), err);
  606. chan = NULL;
  607. if (--device->privatecnt == 0)
  608. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  609. }
  610. } else
  611. chan = NULL;
  612. mutex_unlock(&dma_list_mutex);
  613. return chan;
  614. }
  615. EXPORT_SYMBOL_GPL(dma_get_slave_channel);
  616. struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
  617. {
  618. dma_cap_mask_t mask;
  619. struct dma_chan *chan;
  620. dma_cap_zero(mask);
  621. dma_cap_set(DMA_SLAVE, mask);
  622. /* lock against __dma_request_channel */
  623. mutex_lock(&dma_list_mutex);
  624. chan = find_candidate(device, &mask, NULL, NULL);
  625. mutex_unlock(&dma_list_mutex);
  626. return IS_ERR(chan) ? NULL : chan;
  627. }
  628. EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
  629. /**
  630. * __dma_request_channel - try to allocate an exclusive channel
  631. * @mask: capabilities that the channel must satisfy
  632. * @fn: optional callback to disposition available channels
  633. * @fn_param: opaque parameter to pass to dma_filter_fn()
  634. * @np: device node to look for DMA channels
  635. *
  636. * Returns pointer to appropriate DMA channel on success or NULL.
  637. */
  638. struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
  639. dma_filter_fn fn, void *fn_param,
  640. struct device_node *np)
  641. {
  642. struct dma_device *device, *_d;
  643. struct dma_chan *chan = NULL;
  644. /* Find a channel */
  645. mutex_lock(&dma_list_mutex);
  646. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  647. /* Finds a DMA controller with matching device node */
  648. if (np && device->dev->of_node && np != device->dev->of_node)
  649. continue;
  650. chan = find_candidate(device, mask, fn, fn_param);
  651. if (!IS_ERR(chan))
  652. break;
  653. chan = NULL;
  654. }
  655. mutex_unlock(&dma_list_mutex);
  656. pr_debug("%s: %s (%s)\n",
  657. __func__,
  658. chan ? "success" : "fail",
  659. chan ? dma_chan_name(chan) : NULL);
  660. return chan;
  661. }
  662. EXPORT_SYMBOL_GPL(__dma_request_channel);
  663. static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
  664. const char *name,
  665. struct device *dev)
  666. {
  667. int i;
  668. if (!device->filter.mapcnt)
  669. return NULL;
  670. for (i = 0; i < device->filter.mapcnt; i++) {
  671. const struct dma_slave_map *map = &device->filter.map[i];
  672. if (!strcmp(map->devname, dev_name(dev)) &&
  673. !strcmp(map->slave, name))
  674. return map;
  675. }
  676. return NULL;
  677. }
  678. /**
  679. * dma_request_chan - try to allocate an exclusive slave channel
  680. * @dev: pointer to client device structure
  681. * @name: slave channel name
  682. *
  683. * Returns pointer to appropriate DMA channel on success or an error pointer.
  684. */
  685. struct dma_chan *dma_request_chan(struct device *dev, const char *name)
  686. {
  687. struct fwnode_handle *fwnode = dev_fwnode(dev);
  688. struct dma_device *d, *_d;
  689. struct dma_chan *chan = NULL;
  690. if (is_of_node(fwnode))
  691. chan = of_dma_request_slave_channel(to_of_node(fwnode), name);
  692. else if (is_acpi_device_node(fwnode))
  693. chan = acpi_dma_request_slave_chan_by_name(dev, name);
  694. if (PTR_ERR(chan) == -EPROBE_DEFER)
  695. return chan;
  696. if (!IS_ERR_OR_NULL(chan))
  697. goto found;
  698. /* Try to find the channel via the DMA filter map(s) */
  699. mutex_lock(&dma_list_mutex);
  700. list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
  701. dma_cap_mask_t mask;
  702. const struct dma_slave_map *map = dma_filter_match(d, name, dev);
  703. if (!map)
  704. continue;
  705. dma_cap_zero(mask);
  706. dma_cap_set(DMA_SLAVE, mask);
  707. chan = find_candidate(d, &mask, d->filter.fn, map->param);
  708. if (!IS_ERR(chan))
  709. break;
  710. }
  711. mutex_unlock(&dma_list_mutex);
  712. if (IS_ERR(chan))
  713. return chan;
  714. if (!chan)
  715. return ERR_PTR(-EPROBE_DEFER);
  716. found:
  717. #ifdef CONFIG_DEBUG_FS
  718. chan->dbg_client_name = kasprintf(GFP_KERNEL, "%s:%s", dev_name(dev), name);
  719. /* No functional issue if it fails, users are supposed to test before use */
  720. #endif
  721. chan->name = kasprintf(GFP_KERNEL, "dma:%s", name);
  722. if (!chan->name)
  723. return chan;
  724. chan->slave = dev;
  725. if (sysfs_create_link(&chan->dev->device.kobj, &dev->kobj,
  726. DMA_SLAVE_NAME))
  727. dev_warn(dev, "Cannot create DMA %s symlink\n", DMA_SLAVE_NAME);
  728. if (sysfs_create_link(&dev->kobj, &chan->dev->device.kobj, chan->name))
  729. dev_warn(dev, "Cannot create DMA %s symlink\n", chan->name);
  730. return chan;
  731. }
  732. EXPORT_SYMBOL_GPL(dma_request_chan);
  733. /**
  734. * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities
  735. * @mask: capabilities that the channel must satisfy
  736. *
  737. * Returns pointer to appropriate DMA channel on success or an error pointer.
  738. */
  739. struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
  740. {
  741. struct dma_chan *chan;
  742. if (!mask)
  743. return ERR_PTR(-ENODEV);
  744. chan = __dma_request_channel(mask, NULL, NULL, NULL);
  745. if (!chan) {
  746. mutex_lock(&dma_list_mutex);
  747. if (list_empty(&dma_device_list))
  748. chan = ERR_PTR(-EPROBE_DEFER);
  749. else
  750. chan = ERR_PTR(-ENODEV);
  751. mutex_unlock(&dma_list_mutex);
  752. }
  753. return chan;
  754. }
  755. EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
  756. void dma_release_channel(struct dma_chan *chan)
  757. {
  758. mutex_lock(&dma_list_mutex);
  759. WARN_ONCE(chan->client_count != 1,
  760. "chan reference count %d != 1\n", chan->client_count);
  761. dma_chan_put(chan);
  762. /* drop PRIVATE cap enabled by __dma_request_channel() */
  763. if (--chan->device->privatecnt == 0)
  764. dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
  765. if (chan->slave) {
  766. sysfs_remove_link(&chan->dev->device.kobj, DMA_SLAVE_NAME);
  767. sysfs_remove_link(&chan->slave->kobj, chan->name);
  768. kfree(chan->name);
  769. chan->name = NULL;
  770. chan->slave = NULL;
  771. }
  772. #ifdef CONFIG_DEBUG_FS
  773. kfree(chan->dbg_client_name);
  774. chan->dbg_client_name = NULL;
  775. #endif
  776. mutex_unlock(&dma_list_mutex);
  777. }
  778. EXPORT_SYMBOL_GPL(dma_release_channel);
  779. static void dmaenginem_release_channel(void *chan)
  780. {
  781. dma_release_channel(chan);
  782. }
  783. /**
  784. * devm_dma_request_chan - try to allocate an exclusive slave channel
  785. * @dev: pointer to client device structure
  786. * @name: slave channel name
  787. *
  788. * Returns pointer to appropriate DMA channel on success or an error pointer.
  789. *
  790. * The operation is managed and will be undone on driver detach.
  791. */
  792. struct dma_chan *devm_dma_request_chan(struct device *dev, const char *name)
  793. {
  794. struct dma_chan *chan = dma_request_chan(dev, name);
  795. int ret = 0;
  796. if (!IS_ERR(chan))
  797. ret = devm_add_action_or_reset(dev, dmaenginem_release_channel, chan);
  798. if (ret)
  799. return ERR_PTR(ret);
  800. return chan;
  801. }
  802. EXPORT_SYMBOL_GPL(devm_dma_request_chan);
  803. /**
  804. * dmaengine_get - register interest in dma_channels
  805. */
  806. void dmaengine_get(void)
  807. {
  808. struct dma_device *device, *_d;
  809. struct dma_chan *chan;
  810. int err;
  811. mutex_lock(&dma_list_mutex);
  812. dmaengine_ref_count++;
  813. /* try to grab channels */
  814. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  815. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  816. continue;
  817. list_for_each_entry(chan, &device->channels, device_node) {
  818. err = dma_chan_get(chan);
  819. if (err == -ENODEV) {
  820. /* module removed before we could use it */
  821. list_del_rcu(&device->global_node);
  822. break;
  823. } else if (err)
  824. dev_dbg(chan->device->dev,
  825. "%s: failed to get %s: (%d)\n",
  826. __func__, dma_chan_name(chan), err);
  827. }
  828. }
  829. /* if this is the first reference and there were channels
  830. * waiting we need to rebalance to get those channels
  831. * incorporated into the channel table
  832. */
  833. if (dmaengine_ref_count == 1)
  834. dma_channel_rebalance();
  835. mutex_unlock(&dma_list_mutex);
  836. }
  837. EXPORT_SYMBOL(dmaengine_get);
  838. /**
  839. * dmaengine_put - let DMA drivers be removed when ref_count == 0
  840. */
  841. void dmaengine_put(void)
  842. {
  843. struct dma_device *device, *_d;
  844. struct dma_chan *chan;
  845. mutex_lock(&dma_list_mutex);
  846. dmaengine_ref_count--;
  847. BUG_ON(dmaengine_ref_count < 0);
  848. /* drop channel references */
  849. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  850. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  851. continue;
  852. list_for_each_entry(chan, &device->channels, device_node)
  853. dma_chan_put(chan);
  854. }
  855. mutex_unlock(&dma_list_mutex);
  856. }
  857. EXPORT_SYMBOL(dmaengine_put);
  858. static bool device_has_all_tx_types(struct dma_device *device)
  859. {
  860. /* A device that satisfies this test has channels that will never cause
  861. * an async_tx channel switch event as all possible operation types can
  862. * be handled.
  863. */
  864. #ifdef CONFIG_ASYNC_TX_DMA
  865. if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  866. return false;
  867. #endif
  868. #if IS_ENABLED(CONFIG_ASYNC_MEMCPY)
  869. if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
  870. return false;
  871. #endif
  872. #if IS_ENABLED(CONFIG_ASYNC_XOR)
  873. if (!dma_has_cap(DMA_XOR, device->cap_mask))
  874. return false;
  875. #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
  876. if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
  877. return false;
  878. #endif
  879. #endif
  880. #if IS_ENABLED(CONFIG_ASYNC_PQ)
  881. if (!dma_has_cap(DMA_PQ, device->cap_mask))
  882. return false;
  883. #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
  884. if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
  885. return false;
  886. #endif
  887. #endif
  888. return true;
  889. }
  890. static int get_dma_id(struct dma_device *device)
  891. {
  892. int rc = ida_alloc(&dma_ida, GFP_KERNEL);
  893. if (rc < 0)
  894. return rc;
  895. device->dev_id = rc;
  896. return 0;
  897. }
  898. static int __dma_async_device_channel_register(struct dma_device *device,
  899. struct dma_chan *chan,
  900. const char *name)
  901. {
  902. int rc;
  903. chan->local = alloc_percpu(typeof(*chan->local));
  904. if (!chan->local)
  905. return -ENOMEM;
  906. chan->dev = kzalloc_obj(*chan->dev);
  907. if (!chan->dev) {
  908. rc = -ENOMEM;
  909. goto err_free_local;
  910. }
  911. /*
  912. * When the chan_id is a negative value, we are dynamically adding
  913. * the channel. Otherwise we are static enumerating.
  914. */
  915. chan->chan_id = ida_alloc(&device->chan_ida, GFP_KERNEL);
  916. if (chan->chan_id < 0) {
  917. pr_err("%s: unable to alloc ida for chan: %d\n",
  918. __func__, chan->chan_id);
  919. rc = chan->chan_id;
  920. goto err_free_dev;
  921. }
  922. chan->dev->device.class = &dma_devclass;
  923. chan->dev->device.parent = device->dev;
  924. chan->dev->chan = chan;
  925. chan->dev->dev_id = device->dev_id;
  926. if (!name)
  927. dev_set_name(&chan->dev->device, "dma%dchan%d", device->dev_id, chan->chan_id);
  928. else
  929. dev_set_name(&chan->dev->device, "%s", name);
  930. rc = device_register(&chan->dev->device);
  931. if (rc)
  932. goto err_out_ida;
  933. chan->client_count = 0;
  934. device->chancnt++;
  935. return 0;
  936. err_out_ida:
  937. ida_free(&device->chan_ida, chan->chan_id);
  938. err_free_dev:
  939. kfree(chan->dev);
  940. err_free_local:
  941. free_percpu(chan->local);
  942. chan->local = NULL;
  943. return rc;
  944. }
  945. int dma_async_device_channel_register(struct dma_device *device,
  946. struct dma_chan *chan,
  947. const char *name)
  948. {
  949. int rc;
  950. rc = __dma_async_device_channel_register(device, chan, name);
  951. if (rc < 0)
  952. return rc;
  953. dma_channel_rebalance();
  954. return 0;
  955. }
  956. EXPORT_SYMBOL_GPL(dma_async_device_channel_register);
  957. static void __dma_async_device_channel_unregister(struct dma_device *device,
  958. struct dma_chan *chan)
  959. {
  960. if (chan->local == NULL)
  961. return;
  962. WARN_ONCE(!device->device_release && chan->client_count,
  963. "%s called while %d clients hold a reference\n",
  964. __func__, chan->client_count);
  965. mutex_lock(&dma_list_mutex);
  966. device->chancnt--;
  967. chan->dev->chan = NULL;
  968. mutex_unlock(&dma_list_mutex);
  969. ida_free(&device->chan_ida, chan->chan_id);
  970. device_unregister(&chan->dev->device);
  971. free_percpu(chan->local);
  972. }
  973. void dma_async_device_channel_unregister(struct dma_device *device,
  974. struct dma_chan *chan)
  975. {
  976. __dma_async_device_channel_unregister(device, chan);
  977. dma_channel_rebalance();
  978. }
  979. EXPORT_SYMBOL_GPL(dma_async_device_channel_unregister);
  980. /**
  981. * dma_async_device_register - registers DMA devices found
  982. * @device: pointer to &struct dma_device
  983. *
  984. * After calling this routine the structure should not be freed except in the
  985. * device_release() callback which will be called after
  986. * dma_async_device_unregister() is called and no further references are taken.
  987. */
  988. int dma_async_device_register(struct dma_device *device)
  989. {
  990. int rc;
  991. struct dma_chan* chan;
  992. if (!device)
  993. return -ENODEV;
  994. /* validate device routines */
  995. if (!device->dev) {
  996. pr_err("DMAdevice must have dev\n");
  997. return -EIO;
  998. }
  999. device->owner = device->dev->driver->owner;
  1000. #define CHECK_CAP(_name, _type) \
  1001. { \
  1002. if (dma_has_cap(_type, device->cap_mask) && !device->device_prep_##_name) { \
  1003. dev_err(device->dev, \
  1004. "Device claims capability %s, but op is not defined\n", \
  1005. __stringify(_type)); \
  1006. return -EIO; \
  1007. } \
  1008. }
  1009. CHECK_CAP(dma_memcpy, DMA_MEMCPY);
  1010. CHECK_CAP(dma_xor, DMA_XOR);
  1011. CHECK_CAP(dma_xor_val, DMA_XOR_VAL);
  1012. CHECK_CAP(dma_pq, DMA_PQ);
  1013. CHECK_CAP(dma_pq_val, DMA_PQ_VAL);
  1014. CHECK_CAP(dma_memset, DMA_MEMSET);
  1015. CHECK_CAP(dma_interrupt, DMA_INTERRUPT);
  1016. CHECK_CAP(dma_cyclic, DMA_CYCLIC);
  1017. CHECK_CAP(interleaved_dma, DMA_INTERLEAVE);
  1018. #undef CHECK_CAP
  1019. if (!device->device_tx_status) {
  1020. dev_err(device->dev, "Device tx_status is not defined\n");
  1021. return -EIO;
  1022. }
  1023. if (!device->device_issue_pending) {
  1024. dev_err(device->dev, "Device issue_pending is not defined\n");
  1025. return -EIO;
  1026. }
  1027. if (!device->device_release)
  1028. dev_dbg(device->dev,
  1029. "WARN: Device release is not defined so it is not safe to unbind this driver while in use\n");
  1030. kref_init(&device->ref);
  1031. /* note: this only matters in the
  1032. * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
  1033. */
  1034. if (device_has_all_tx_types(device))
  1035. dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
  1036. rc = get_dma_id(device);
  1037. if (rc != 0)
  1038. return rc;
  1039. ida_init(&device->chan_ida);
  1040. /* represent channels in sysfs. Probably want devs too */
  1041. list_for_each_entry(chan, &device->channels, device_node) {
  1042. rc = __dma_async_device_channel_register(device, chan, NULL);
  1043. if (rc < 0)
  1044. goto err_out;
  1045. }
  1046. mutex_lock(&dma_list_mutex);
  1047. /* take references on public channels */
  1048. if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
  1049. list_for_each_entry(chan, &device->channels, device_node) {
  1050. /* if clients are already waiting for channels we need
  1051. * to take references on their behalf
  1052. */
  1053. if (dma_chan_get(chan) == -ENODEV) {
  1054. /* note we can only get here for the first
  1055. * channel as the remaining channels are
  1056. * guaranteed to get a reference
  1057. */
  1058. rc = -ENODEV;
  1059. mutex_unlock(&dma_list_mutex);
  1060. goto err_out;
  1061. }
  1062. }
  1063. list_add_tail_rcu(&device->global_node, &dma_device_list);
  1064. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  1065. device->privatecnt++; /* Always private */
  1066. dma_channel_rebalance();
  1067. mutex_unlock(&dma_list_mutex);
  1068. dmaengine_debug_register(device);
  1069. return 0;
  1070. err_out:
  1071. /* if we never registered a channel just release the idr */
  1072. if (!device->chancnt) {
  1073. ida_free(&dma_ida, device->dev_id);
  1074. return rc;
  1075. }
  1076. list_for_each_entry(chan, &device->channels, device_node) {
  1077. if (chan->local == NULL)
  1078. continue;
  1079. mutex_lock(&dma_list_mutex);
  1080. chan->dev->chan = NULL;
  1081. mutex_unlock(&dma_list_mutex);
  1082. device_unregister(&chan->dev->device);
  1083. free_percpu(chan->local);
  1084. }
  1085. return rc;
  1086. }
  1087. EXPORT_SYMBOL(dma_async_device_register);
  1088. /**
  1089. * dma_async_device_unregister - unregister a DMA device
  1090. * @device: pointer to &struct dma_device
  1091. *
  1092. * This routine is called by dma driver exit routines, dmaengine holds module
  1093. * references to prevent it being called while channels are in use.
  1094. */
  1095. void dma_async_device_unregister(struct dma_device *device)
  1096. {
  1097. struct dma_chan *chan, *n;
  1098. dmaengine_debug_unregister(device);
  1099. list_for_each_entry_safe(chan, n, &device->channels, device_node)
  1100. __dma_async_device_channel_unregister(device, chan);
  1101. mutex_lock(&dma_list_mutex);
  1102. /*
  1103. * setting DMA_PRIVATE ensures the device being torn down will not
  1104. * be used in the channel_table
  1105. */
  1106. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  1107. dma_channel_rebalance();
  1108. ida_free(&dma_ida, device->dev_id);
  1109. dma_device_put(device);
  1110. mutex_unlock(&dma_list_mutex);
  1111. }
  1112. EXPORT_SYMBOL(dma_async_device_unregister);
  1113. static void dmaenginem_async_device_unregister(void *device)
  1114. {
  1115. dma_async_device_unregister(device);
  1116. }
  1117. /**
  1118. * dmaenginem_async_device_register - registers DMA devices found
  1119. * @device: pointer to &struct dma_device
  1120. *
  1121. * The operation is managed and will be undone on driver detach.
  1122. */
  1123. int dmaenginem_async_device_register(struct dma_device *device)
  1124. {
  1125. int ret;
  1126. ret = dma_async_device_register(device);
  1127. if (ret)
  1128. return ret;
  1129. return devm_add_action_or_reset(device->dev, dmaenginem_async_device_unregister, device);
  1130. }
  1131. EXPORT_SYMBOL(dmaenginem_async_device_register);
  1132. struct dmaengine_unmap_pool {
  1133. struct kmem_cache *cache;
  1134. const char *name;
  1135. mempool_t *pool;
  1136. size_t size;
  1137. };
  1138. #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
  1139. static struct dmaengine_unmap_pool unmap_pool[] = {
  1140. __UNMAP_POOL(2),
  1141. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  1142. __UNMAP_POOL(16),
  1143. __UNMAP_POOL(128),
  1144. __UNMAP_POOL(256),
  1145. #endif
  1146. };
  1147. static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
  1148. {
  1149. int order = get_count_order(nr);
  1150. switch (order) {
  1151. case 0 ... 1:
  1152. return &unmap_pool[0];
  1153. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  1154. case 2 ... 4:
  1155. return &unmap_pool[1];
  1156. case 5 ... 7:
  1157. return &unmap_pool[2];
  1158. case 8:
  1159. return &unmap_pool[3];
  1160. #endif
  1161. default:
  1162. BUG();
  1163. return NULL;
  1164. }
  1165. }
  1166. static void dmaengine_unmap(struct kref *kref)
  1167. {
  1168. struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
  1169. struct device *dev = unmap->dev;
  1170. int cnt, i;
  1171. cnt = unmap->to_cnt;
  1172. for (i = 0; i < cnt; i++)
  1173. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1174. DMA_TO_DEVICE);
  1175. cnt += unmap->from_cnt;
  1176. for (; i < cnt; i++)
  1177. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1178. DMA_FROM_DEVICE);
  1179. cnt += unmap->bidi_cnt;
  1180. for (; i < cnt; i++) {
  1181. if (unmap->addr[i] == 0)
  1182. continue;
  1183. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1184. DMA_BIDIRECTIONAL);
  1185. }
  1186. cnt = unmap->map_cnt;
  1187. mempool_free(unmap, __get_unmap_pool(cnt)->pool);
  1188. }
  1189. void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
  1190. {
  1191. if (unmap)
  1192. kref_put(&unmap->kref, dmaengine_unmap);
  1193. }
  1194. EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
  1195. static void dmaengine_destroy_unmap_pool(void)
  1196. {
  1197. int i;
  1198. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  1199. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  1200. mempool_destroy(p->pool);
  1201. p->pool = NULL;
  1202. kmem_cache_destroy(p->cache);
  1203. p->cache = NULL;
  1204. }
  1205. }
  1206. static int __init dmaengine_init_unmap_pool(void)
  1207. {
  1208. int i;
  1209. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  1210. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  1211. size_t size;
  1212. size = sizeof(struct dmaengine_unmap_data) +
  1213. sizeof(dma_addr_t) * p->size;
  1214. p->cache = kmem_cache_create(p->name, size, 0,
  1215. SLAB_HWCACHE_ALIGN, NULL);
  1216. if (!p->cache)
  1217. break;
  1218. p->pool = mempool_create_slab_pool(1, p->cache);
  1219. if (!p->pool)
  1220. break;
  1221. }
  1222. if (i == ARRAY_SIZE(unmap_pool))
  1223. return 0;
  1224. dmaengine_destroy_unmap_pool();
  1225. return -ENOMEM;
  1226. }
  1227. struct dmaengine_unmap_data *
  1228. dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
  1229. {
  1230. struct dmaengine_unmap_data *unmap;
  1231. unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
  1232. if (!unmap)
  1233. return NULL;
  1234. memset(unmap, 0, sizeof(*unmap));
  1235. kref_init(&unmap->kref);
  1236. unmap->dev = dev;
  1237. unmap->map_cnt = nr;
  1238. return unmap;
  1239. }
  1240. EXPORT_SYMBOL(dmaengine_get_unmap_data);
  1241. void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
  1242. struct dma_chan *chan)
  1243. {
  1244. tx->chan = chan;
  1245. #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
  1246. spin_lock_init(&tx->lock);
  1247. #endif
  1248. }
  1249. EXPORT_SYMBOL(dma_async_tx_descriptor_init);
  1250. static inline int desc_check_and_set_metadata_mode(
  1251. struct dma_async_tx_descriptor *desc, enum dma_desc_metadata_mode mode)
  1252. {
  1253. /* Make sure that the metadata mode is not mixed */
  1254. if (!desc->desc_metadata_mode) {
  1255. if (dmaengine_is_metadata_mode_supported(desc->chan, mode))
  1256. desc->desc_metadata_mode = mode;
  1257. else
  1258. return -ENOTSUPP;
  1259. } else if (desc->desc_metadata_mode != mode) {
  1260. return -EINVAL;
  1261. }
  1262. return 0;
  1263. }
  1264. int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc,
  1265. void *data, size_t len)
  1266. {
  1267. int ret;
  1268. if (!desc)
  1269. return -EINVAL;
  1270. ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_CLIENT);
  1271. if (ret)
  1272. return ret;
  1273. if (!desc->metadata_ops || !desc->metadata_ops->attach)
  1274. return -ENOTSUPP;
  1275. return desc->metadata_ops->attach(desc, data, len);
  1276. }
  1277. EXPORT_SYMBOL_GPL(dmaengine_desc_attach_metadata);
  1278. void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc,
  1279. size_t *payload_len, size_t *max_len)
  1280. {
  1281. int ret;
  1282. if (!desc)
  1283. return ERR_PTR(-EINVAL);
  1284. ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
  1285. if (ret)
  1286. return ERR_PTR(ret);
  1287. if (!desc->metadata_ops || !desc->metadata_ops->get_ptr)
  1288. return ERR_PTR(-ENOTSUPP);
  1289. return desc->metadata_ops->get_ptr(desc, payload_len, max_len);
  1290. }
  1291. EXPORT_SYMBOL_GPL(dmaengine_desc_get_metadata_ptr);
  1292. int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc,
  1293. size_t payload_len)
  1294. {
  1295. int ret;
  1296. if (!desc)
  1297. return -EINVAL;
  1298. ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
  1299. if (ret)
  1300. return ret;
  1301. if (!desc->metadata_ops || !desc->metadata_ops->set_len)
  1302. return -ENOTSUPP;
  1303. return desc->metadata_ops->set_len(desc, payload_len);
  1304. }
  1305. EXPORT_SYMBOL_GPL(dmaengine_desc_set_metadata_len);
  1306. /**
  1307. * dma_wait_for_async_tx - spin wait for a transaction to complete
  1308. * @tx: in-flight transaction to wait on
  1309. */
  1310. enum dma_status
  1311. dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
  1312. {
  1313. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  1314. if (!tx)
  1315. return DMA_COMPLETE;
  1316. while (tx->cookie == -EBUSY) {
  1317. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  1318. dev_err(tx->chan->device->dev,
  1319. "%s timeout waiting for descriptor submission\n",
  1320. __func__);
  1321. return DMA_ERROR;
  1322. }
  1323. cpu_relax();
  1324. }
  1325. return dma_sync_wait(tx->chan, tx->cookie);
  1326. }
  1327. EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
  1328. /**
  1329. * dma_run_dependencies - process dependent operations on the target channel
  1330. * @tx: transaction with dependencies
  1331. *
  1332. * Helper routine for DMA drivers to process (start) dependent operations
  1333. * on their target channel.
  1334. */
  1335. void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
  1336. {
  1337. struct dma_async_tx_descriptor *dep = txd_next(tx);
  1338. struct dma_async_tx_descriptor *dep_next;
  1339. struct dma_chan *chan;
  1340. if (!dep)
  1341. return;
  1342. /* we'll submit tx->next now, so clear the link */
  1343. txd_clear_next(tx);
  1344. chan = dep->chan;
  1345. /* keep submitting up until a channel switch is detected
  1346. * in that case we will be called again as a result of
  1347. * processing the interrupt from async_tx_channel_switch
  1348. */
  1349. for (; dep; dep = dep_next) {
  1350. txd_lock(dep);
  1351. txd_clear_parent(dep);
  1352. dep_next = txd_next(dep);
  1353. if (dep_next && dep_next->chan == chan)
  1354. txd_clear_next(dep); /* ->next will be submitted */
  1355. else
  1356. dep_next = NULL; /* submit current dep and terminate */
  1357. txd_unlock(dep);
  1358. dep->tx_submit(dep);
  1359. }
  1360. chan->device->device_issue_pending(chan);
  1361. }
  1362. EXPORT_SYMBOL_GPL(dma_run_dependencies);
  1363. static int __init dma_bus_init(void)
  1364. {
  1365. int err = dmaengine_init_unmap_pool();
  1366. if (err)
  1367. return err;
  1368. err = class_register(&dma_devclass);
  1369. if (!err)
  1370. dmaengine_debugfs_init();
  1371. return err;
  1372. }
  1373. arch_initcall(dma_bus_init);