devinit.rst 2.9 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. ==================================
  3. Device Initialization (devinit)
  4. ==================================
  5. The devinit process is complex and subject to change. This document provides a high-level
  6. overview using the Ampere GPU family as an example. The goal is to provide a conceptual
  7. overview of the process to aid in understanding the corresponding kernel code.
  8. Device initialization (devinit) is a crucial sequence of register read/write operations
  9. that occur after a GPU reset. The devinit sequence is essential for properly configuring
  10. the GPU hardware before it can be used.
  11. The devinit engine is an interpreter program that typically runs on the PMU (Power Management
  12. Unit) microcontroller of the GPU. This interpreter executes a "script" of initialization
  13. commands. The devinit engine itself is part of the VBIOS ROM in the same ROM image as the
  14. FWSEC (Firmware Security) image (see fwsec.rst and vbios.rst) and it runs before the
  15. nova-core driver is even loaded. On an Ampere GPU, the devinit ucode is separate from the
  16. FWSEC ucode. It is launched by FWSEC, which runs on the GSP in 'heavy-secure' mode, while
  17. devinit runs on the PMU in 'light-secure' mode.
  18. Key Functions of devinit
  19. ------------------------
  20. devinit performs several critical tasks:
  21. 1. Programming VRAM memory controller timings
  22. 2. Power sequencing
  23. 3. Clock and PLL (Phase-Locked Loop) configuration
  24. 4. Thermal management
  25. Low-level Firmware Initialization Flow
  26. --------------------------------------
  27. Upon reset, several microcontrollers on the GPU (such as PMU, SEC2, GSP, etc.) run GPU
  28. firmware (gfw) code to set up the GPU and its core parameters. Most of the GPU is
  29. considered unusable until this initialization process completes.
  30. These low-level GPU firmware components are typically:
  31. 1. Located in the VBIOS ROM in the same ROM partition (see vbios.rst and fwsec.rst).
  32. 2. Executed in sequence on different microcontrollers:
  33. - The devinit engine typically but not necessarily runs on the PMU.
  34. - On an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Processor) in
  35. heavy-secure mode.
  36. Before the driver can proceed with further initialization, it must wait for a signal
  37. indicating that core initialization is complete (known as GFW_BOOT). This signal is
  38. asserted by the FWSEC running on the GSP in heavy-secure mode.
  39. Runtime Considerations
  40. ----------------------
  41. It's important to note that the devinit sequence also needs to run during suspend/resume
  42. operations at runtime, not just during initial boot, as it is critical to power management.
  43. Security and Access Control
  44. ---------------------------
  45. The initialization process involves careful privilege management. For example, before
  46. accessing certain completion status registers, the driver must check privilege level
  47. masks. Some registers are only accessible after secure firmware (FWSEC) lowers the
  48. privilege level to allow CPU (LS/low-secure) access. This is the case, for example,
  49. when receiving the GFW_BOOT signal.