moxtet.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Turris Mox module configuration bus driver
  4. *
  5. * Copyright (C) 2019 Marek Behún <kabel@kernel.org>
  6. */
  7. #include <dt-bindings/bus/moxtet.h>
  8. #include <linux/bitops.h>
  9. #include <linux/debugfs.h>
  10. #include <linux/hex.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/module.h>
  13. #include <linux/moxtet.h>
  14. #include <linux/mutex.h>
  15. #include <linux/of_device.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/spi/spi.h>
  18. /*
  19. * @name: module name for sysfs
  20. * @hwirq_base: base index for IRQ for this module (-1 if no IRQs)
  21. * @nirqs: how many interrupts does the shift register provide
  22. * @desc: module description for kernel log
  23. */
  24. static const struct {
  25. const char *name;
  26. int hwirq_base;
  27. int nirqs;
  28. const char *desc;
  29. } mox_module_table[] = {
  30. /* do not change order of this array! */
  31. { NULL, 0, 0, NULL },
  32. { "sfp", -1, 0, "MOX D (SFP cage)" },
  33. { "pci", MOXTET_IRQ_PCI, 1, "MOX B (Mini-PCIe)" },
  34. { "topaz", MOXTET_IRQ_TOPAZ, 1, "MOX C (4 port switch)" },
  35. { "peridot", MOXTET_IRQ_PERIDOT(0), 1, "MOX E (8 port switch)" },
  36. { "usb3", MOXTET_IRQ_USB3, 2, "MOX F (USB 3.0)" },
  37. { "pci-bridge", -1, 0, "MOX G (Mini-PCIe bridge)" },
  38. };
  39. static inline bool mox_module_known(unsigned int id)
  40. {
  41. return id >= TURRIS_MOX_MODULE_FIRST && id <= TURRIS_MOX_MODULE_LAST;
  42. }
  43. static inline const char *mox_module_name(unsigned int id)
  44. {
  45. if (mox_module_known(id))
  46. return mox_module_table[id].name;
  47. else
  48. return "unknown";
  49. }
  50. #define DEF_MODULE_ATTR(name, fmt, ...) \
  51. static ssize_t \
  52. module_##name##_show(struct device *dev, struct device_attribute *a, \
  53. char *buf) \
  54. { \
  55. struct moxtet_device *mdev = to_moxtet_device(dev); \
  56. return sprintf(buf, (fmt), __VA_ARGS__); \
  57. } \
  58. static DEVICE_ATTR_RO(module_##name)
  59. DEF_MODULE_ATTR(id, "0x%x\n", mdev->id);
  60. DEF_MODULE_ATTR(name, "%s\n", mox_module_name(mdev->id));
  61. DEF_MODULE_ATTR(description, "%s\n",
  62. mox_module_known(mdev->id) ? mox_module_table[mdev->id].desc
  63. : "");
  64. static struct attribute *moxtet_dev_attrs[] = {
  65. &dev_attr_module_id.attr,
  66. &dev_attr_module_name.attr,
  67. &dev_attr_module_description.attr,
  68. NULL,
  69. };
  70. static const struct attribute_group moxtet_dev_group = {
  71. .attrs = moxtet_dev_attrs,
  72. };
  73. static const struct attribute_group *moxtet_dev_groups[] = {
  74. &moxtet_dev_group,
  75. NULL,
  76. };
  77. static int moxtet_match(struct device *dev, const struct device_driver *drv)
  78. {
  79. struct moxtet_device *mdev = to_moxtet_device(dev);
  80. const struct moxtet_driver *tdrv = to_moxtet_driver(drv);
  81. const enum turris_mox_module_id *t;
  82. if (of_driver_match_device(dev, drv))
  83. return 1;
  84. if (!tdrv->id_table)
  85. return 0;
  86. for (t = tdrv->id_table; *t; ++t)
  87. if (*t == mdev->id)
  88. return 1;
  89. return 0;
  90. }
  91. static const struct bus_type moxtet_bus_type = {
  92. .name = "moxtet",
  93. .dev_groups = moxtet_dev_groups,
  94. .match = moxtet_match,
  95. };
  96. int __moxtet_register_driver(struct module *owner,
  97. struct moxtet_driver *mdrv)
  98. {
  99. mdrv->driver.owner = owner;
  100. mdrv->driver.bus = &moxtet_bus_type;
  101. return driver_register(&mdrv->driver);
  102. }
  103. EXPORT_SYMBOL_GPL(__moxtet_register_driver);
  104. static int moxtet_dev_check(struct device *dev, void *data)
  105. {
  106. struct moxtet_device *mdev = to_moxtet_device(dev);
  107. struct moxtet_device *new_dev = data;
  108. if (mdev->moxtet == new_dev->moxtet && mdev->id == new_dev->id &&
  109. mdev->idx == new_dev->idx)
  110. return -EBUSY;
  111. return 0;
  112. }
  113. static void moxtet_dev_release(struct device *dev)
  114. {
  115. struct moxtet_device *mdev = to_moxtet_device(dev);
  116. put_device(mdev->moxtet->dev);
  117. kfree(mdev);
  118. }
  119. static struct moxtet_device *
  120. moxtet_alloc_device(struct moxtet *moxtet)
  121. {
  122. struct moxtet_device *dev;
  123. if (!get_device(moxtet->dev))
  124. return NULL;
  125. dev = kzalloc_obj(*dev);
  126. if (!dev) {
  127. put_device(moxtet->dev);
  128. return NULL;
  129. }
  130. dev->moxtet = moxtet;
  131. dev->dev.parent = moxtet->dev;
  132. dev->dev.bus = &moxtet_bus_type;
  133. dev->dev.release = moxtet_dev_release;
  134. device_initialize(&dev->dev);
  135. return dev;
  136. }
  137. static int moxtet_add_device(struct moxtet_device *dev)
  138. {
  139. static DEFINE_MUTEX(add_mutex);
  140. int ret;
  141. if (dev->idx >= TURRIS_MOX_MAX_MODULES || dev->id > 0xf)
  142. return -EINVAL;
  143. dev_set_name(&dev->dev, "moxtet-%s.%u", mox_module_name(dev->id),
  144. dev->idx);
  145. mutex_lock(&add_mutex);
  146. ret = bus_for_each_dev(&moxtet_bus_type, NULL, dev,
  147. moxtet_dev_check);
  148. if (ret)
  149. goto done;
  150. ret = device_add(&dev->dev);
  151. if (ret < 0)
  152. dev_err(dev->moxtet->dev, "can't add %s, status %d\n",
  153. dev_name(dev->moxtet->dev), ret);
  154. done:
  155. mutex_unlock(&add_mutex);
  156. return ret;
  157. }
  158. static int __unregister(struct device *dev, void *null)
  159. {
  160. if (dev->of_node) {
  161. of_node_clear_flag(dev->of_node, OF_POPULATED);
  162. of_node_put(dev->of_node);
  163. }
  164. device_unregister(dev);
  165. return 0;
  166. }
  167. static struct moxtet_device *
  168. of_register_moxtet_device(struct moxtet *moxtet, struct device_node *nc)
  169. {
  170. struct moxtet_device *dev;
  171. u32 val;
  172. int ret;
  173. dev = moxtet_alloc_device(moxtet);
  174. if (!dev) {
  175. dev_err(moxtet->dev,
  176. "Moxtet device alloc error for %pOF\n", nc);
  177. return ERR_PTR(-ENOMEM);
  178. }
  179. ret = of_property_read_u32(nc, "reg", &val);
  180. if (ret) {
  181. dev_err(moxtet->dev, "%pOF has no valid 'reg' property (%d)\n",
  182. nc, ret);
  183. goto err_put;
  184. }
  185. dev->idx = val;
  186. if (dev->idx >= TURRIS_MOX_MAX_MODULES) {
  187. dev_err(moxtet->dev, "%pOF Moxtet address 0x%x out of range\n",
  188. nc, dev->idx);
  189. ret = -EINVAL;
  190. goto err_put;
  191. }
  192. dev->id = moxtet->modules[dev->idx];
  193. if (!dev->id) {
  194. dev_err(moxtet->dev, "%pOF Moxtet address 0x%x is empty\n", nc,
  195. dev->idx);
  196. ret = -ENODEV;
  197. goto err_put;
  198. }
  199. of_node_get(nc);
  200. dev->dev.of_node = nc;
  201. ret = moxtet_add_device(dev);
  202. if (ret) {
  203. dev_err(moxtet->dev,
  204. "Moxtet device register error for %pOF\n", nc);
  205. of_node_put(nc);
  206. goto err_put;
  207. }
  208. return dev;
  209. err_put:
  210. put_device(&dev->dev);
  211. return ERR_PTR(ret);
  212. }
  213. static void of_register_moxtet_devices(struct moxtet *moxtet)
  214. {
  215. struct moxtet_device *dev;
  216. struct device_node *nc;
  217. if (!moxtet->dev->of_node)
  218. return;
  219. for_each_available_child_of_node(moxtet->dev->of_node, nc) {
  220. if (of_node_test_and_set_flag(nc, OF_POPULATED))
  221. continue;
  222. dev = of_register_moxtet_device(moxtet, nc);
  223. if (IS_ERR(dev)) {
  224. dev_warn(moxtet->dev,
  225. "Failed to create Moxtet device for %pOF\n",
  226. nc);
  227. of_node_clear_flag(nc, OF_POPULATED);
  228. }
  229. }
  230. }
  231. static void
  232. moxtet_register_devices_from_topology(struct moxtet *moxtet)
  233. {
  234. struct moxtet_device *dev;
  235. int i, ret;
  236. for (i = 0; i < moxtet->count; ++i) {
  237. dev = moxtet_alloc_device(moxtet);
  238. if (!dev) {
  239. dev_err(moxtet->dev, "Moxtet device %u alloc error\n",
  240. i);
  241. continue;
  242. }
  243. dev->idx = i;
  244. dev->id = moxtet->modules[i];
  245. ret = moxtet_add_device(dev);
  246. if (ret && ret != -EBUSY) {
  247. put_device(&dev->dev);
  248. dev_err(moxtet->dev,
  249. "Moxtet device %u register error: %i\n", i,
  250. ret);
  251. }
  252. }
  253. }
  254. /*
  255. * @nsame: how many modules with same id are already in moxtet->modules
  256. */
  257. static int moxtet_set_irq(struct moxtet *moxtet, int idx, int id, int nsame)
  258. {
  259. int i, first;
  260. struct moxtet_irqpos *pos;
  261. first = mox_module_table[id].hwirq_base +
  262. nsame * mox_module_table[id].nirqs;
  263. if (first + mox_module_table[id].nirqs > MOXTET_NIRQS)
  264. return -EINVAL;
  265. for (i = 0; i < mox_module_table[id].nirqs; ++i) {
  266. pos = &moxtet->irq.position[first + i];
  267. pos->idx = idx;
  268. pos->bit = i;
  269. moxtet->irq.exists |= BIT(first + i);
  270. }
  271. return 0;
  272. }
  273. static int moxtet_find_topology(struct moxtet *moxtet)
  274. {
  275. u8 buf[TURRIS_MOX_MAX_MODULES];
  276. int cnts[TURRIS_MOX_MODULE_LAST];
  277. int i, ret;
  278. memset(cnts, 0, sizeof(cnts));
  279. ret = spi_read(to_spi_device(moxtet->dev), buf, TURRIS_MOX_MAX_MODULES);
  280. if (ret < 0)
  281. return ret;
  282. if (buf[0] == TURRIS_MOX_CPU_ID_EMMC) {
  283. dev_info(moxtet->dev, "Found MOX A (eMMC CPU) module\n");
  284. } else if (buf[0] == TURRIS_MOX_CPU_ID_SD) {
  285. dev_info(moxtet->dev, "Found MOX A (CPU) module\n");
  286. } else {
  287. dev_err(moxtet->dev, "Invalid Turris MOX A CPU module 0x%02x\n",
  288. buf[0]);
  289. return -ENODEV;
  290. }
  291. moxtet->count = 0;
  292. for (i = 1; i < TURRIS_MOX_MAX_MODULES; ++i) {
  293. int id;
  294. if (buf[i] == 0xff)
  295. break;
  296. id = buf[i] & 0xf;
  297. moxtet->modules[i-1] = id;
  298. ++moxtet->count;
  299. if (mox_module_known(id)) {
  300. dev_info(moxtet->dev, "Found %s module\n",
  301. mox_module_table[id].desc);
  302. if (moxtet_set_irq(moxtet, i-1, id, cnts[id]++) < 0)
  303. dev_err(moxtet->dev,
  304. " Cannot set IRQ for module %s\n",
  305. mox_module_table[id].desc);
  306. } else {
  307. dev_warn(moxtet->dev,
  308. "Unknown Moxtet module found (ID 0x%02x)\n",
  309. id);
  310. }
  311. }
  312. return 0;
  313. }
  314. static int moxtet_spi_read(struct moxtet *moxtet, u8 *buf)
  315. {
  316. struct spi_transfer xfer = {
  317. .rx_buf = buf,
  318. .tx_buf = moxtet->tx,
  319. .len = moxtet->count + 1
  320. };
  321. int ret;
  322. mutex_lock(&moxtet->lock);
  323. ret = spi_sync_transfer(to_spi_device(moxtet->dev), &xfer, 1);
  324. mutex_unlock(&moxtet->lock);
  325. return ret;
  326. }
  327. int moxtet_device_read(struct device *dev)
  328. {
  329. struct moxtet_device *mdev = to_moxtet_device(dev);
  330. struct moxtet *moxtet = mdev->moxtet;
  331. u8 buf[TURRIS_MOX_MAX_MODULES];
  332. int ret;
  333. if (mdev->idx >= moxtet->count)
  334. return -EINVAL;
  335. ret = moxtet_spi_read(moxtet, buf);
  336. if (ret < 0)
  337. return ret;
  338. return buf[mdev->idx + 1] >> 4;
  339. }
  340. EXPORT_SYMBOL_GPL(moxtet_device_read);
  341. int moxtet_device_write(struct device *dev, u8 val)
  342. {
  343. struct moxtet_device *mdev = to_moxtet_device(dev);
  344. struct moxtet *moxtet = mdev->moxtet;
  345. int ret;
  346. if (mdev->idx >= moxtet->count)
  347. return -EINVAL;
  348. mutex_lock(&moxtet->lock);
  349. moxtet->tx[moxtet->count - mdev->idx] = val;
  350. ret = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
  351. moxtet->count + 1);
  352. mutex_unlock(&moxtet->lock);
  353. return ret;
  354. }
  355. EXPORT_SYMBOL_GPL(moxtet_device_write);
  356. int moxtet_device_written(struct device *dev)
  357. {
  358. struct moxtet_device *mdev = to_moxtet_device(dev);
  359. struct moxtet *moxtet = mdev->moxtet;
  360. if (mdev->idx >= moxtet->count)
  361. return -EINVAL;
  362. return moxtet->tx[moxtet->count - mdev->idx];
  363. }
  364. EXPORT_SYMBOL_GPL(moxtet_device_written);
  365. #ifdef CONFIG_DEBUG_FS
  366. static int moxtet_debug_open(struct inode *inode, struct file *file)
  367. {
  368. file->private_data = inode->i_private;
  369. return nonseekable_open(inode, file);
  370. }
  371. static ssize_t input_read(struct file *file, char __user *buf, size_t len,
  372. loff_t *ppos)
  373. {
  374. struct moxtet *moxtet = file->private_data;
  375. u8 bin[TURRIS_MOX_MAX_MODULES];
  376. u8 hex[sizeof(bin) * 2 + 1];
  377. int ret, n;
  378. ret = moxtet_spi_read(moxtet, bin);
  379. if (ret < 0)
  380. return ret;
  381. n = moxtet->count + 1;
  382. bin2hex(hex, bin, n);
  383. hex[2*n] = '\n';
  384. return simple_read_from_buffer(buf, len, ppos, hex, 2*n + 1);
  385. }
  386. static const struct file_operations input_fops = {
  387. .owner = THIS_MODULE,
  388. .open = moxtet_debug_open,
  389. .read = input_read,
  390. };
  391. static ssize_t output_read(struct file *file, char __user *buf, size_t len,
  392. loff_t *ppos)
  393. {
  394. struct moxtet *moxtet = file->private_data;
  395. u8 hex[TURRIS_MOX_MAX_MODULES * 2 + 1];
  396. u8 *p = hex;
  397. int i;
  398. mutex_lock(&moxtet->lock);
  399. for (i = 0; i < moxtet->count; ++i)
  400. p = hex_byte_pack(p, moxtet->tx[moxtet->count - i]);
  401. mutex_unlock(&moxtet->lock);
  402. *p++ = '\n';
  403. return simple_read_from_buffer(buf, len, ppos, hex, p - hex);
  404. }
  405. static ssize_t output_write(struct file *file, const char __user *buf,
  406. size_t len, loff_t *ppos)
  407. {
  408. struct moxtet *moxtet = file->private_data;
  409. u8 bin[TURRIS_MOX_MAX_MODULES];
  410. u8 hex[sizeof(bin) * 2 + 1];
  411. ssize_t res;
  412. loff_t dummy = 0;
  413. int err, i;
  414. if (len > 2 * moxtet->count + 1 || len < 2 * moxtet->count)
  415. return -EINVAL;
  416. res = simple_write_to_buffer(hex, sizeof(hex), &dummy, buf, len);
  417. if (res < 0)
  418. return res;
  419. if (len % 2 == 1 && hex[len - 1] != '\n')
  420. return -EINVAL;
  421. err = hex2bin(bin, hex, moxtet->count);
  422. if (err < 0)
  423. return -EINVAL;
  424. mutex_lock(&moxtet->lock);
  425. for (i = 0; i < moxtet->count; ++i)
  426. moxtet->tx[moxtet->count - i] = bin[i];
  427. err = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
  428. moxtet->count + 1);
  429. mutex_unlock(&moxtet->lock);
  430. return err < 0 ? err : len;
  431. }
  432. static const struct file_operations output_fops = {
  433. .owner = THIS_MODULE,
  434. .open = moxtet_debug_open,
  435. .read = output_read,
  436. .write = output_write,
  437. };
  438. static int moxtet_register_debugfs(struct moxtet *moxtet)
  439. {
  440. struct dentry *root, *entry;
  441. root = debugfs_create_dir("moxtet", NULL);
  442. if (IS_ERR(root))
  443. return PTR_ERR(root);
  444. entry = debugfs_create_file_unsafe("input", 0444, root, moxtet,
  445. &input_fops);
  446. if (IS_ERR(entry))
  447. goto err_remove;
  448. entry = debugfs_create_file_unsafe("output", 0644, root, moxtet,
  449. &output_fops);
  450. if (IS_ERR(entry))
  451. goto err_remove;
  452. moxtet->debugfs_root = root;
  453. return 0;
  454. err_remove:
  455. debugfs_remove_recursive(root);
  456. return PTR_ERR(entry);
  457. }
  458. static void moxtet_unregister_debugfs(struct moxtet *moxtet)
  459. {
  460. debugfs_remove_recursive(moxtet->debugfs_root);
  461. }
  462. #else
  463. static inline int moxtet_register_debugfs(struct moxtet *moxtet)
  464. {
  465. return 0;
  466. }
  467. static inline void moxtet_unregister_debugfs(struct moxtet *moxtet)
  468. {
  469. }
  470. #endif
  471. static int moxtet_irq_domain_map(struct irq_domain *d, unsigned int irq,
  472. irq_hw_number_t hw)
  473. {
  474. struct moxtet *moxtet = d->host_data;
  475. if (hw >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(hw))) {
  476. dev_err(moxtet->dev, "Invalid hw irq number\n");
  477. return -EINVAL;
  478. }
  479. irq_set_chip_data(irq, d->host_data);
  480. irq_set_chip_and_handler(irq, &moxtet->irq.chip, handle_level_irq);
  481. return 0;
  482. }
  483. static int moxtet_irq_domain_xlate(struct irq_domain *d,
  484. struct device_node *ctrlr,
  485. const u32 *intspec, unsigned int intsize,
  486. unsigned long *out_hwirq,
  487. unsigned int *out_type)
  488. {
  489. struct moxtet *moxtet = d->host_data;
  490. int irq;
  491. if (WARN_ON(intsize < 1))
  492. return -EINVAL;
  493. irq = intspec[0];
  494. if (irq >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(irq)))
  495. return -EINVAL;
  496. *out_hwirq = irq;
  497. *out_type = IRQ_TYPE_NONE;
  498. return 0;
  499. }
  500. static const struct irq_domain_ops moxtet_irq_domain = {
  501. .map = moxtet_irq_domain_map,
  502. .xlate = moxtet_irq_domain_xlate,
  503. };
  504. static void moxtet_irq_mask(struct irq_data *d)
  505. {
  506. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  507. moxtet->irq.masked |= BIT(d->hwirq);
  508. }
  509. static void moxtet_irq_unmask(struct irq_data *d)
  510. {
  511. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  512. moxtet->irq.masked &= ~BIT(d->hwirq);
  513. }
  514. static void moxtet_irq_print_chip(struct irq_data *d, struct seq_file *p)
  515. {
  516. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  517. struct moxtet_irqpos *pos = &moxtet->irq.position[d->hwirq];
  518. int id;
  519. id = moxtet->modules[pos->idx];
  520. seq_printf(p, "moxtet-%s.%i#%i", mox_module_name(id), pos->idx,
  521. pos->bit);
  522. }
  523. static const struct irq_chip moxtet_irq_chip = {
  524. .name = "moxtet",
  525. .irq_mask = moxtet_irq_mask,
  526. .irq_unmask = moxtet_irq_unmask,
  527. .irq_print_chip = moxtet_irq_print_chip,
  528. };
  529. static int moxtet_irq_read(struct moxtet *moxtet, unsigned long *map)
  530. {
  531. struct moxtet_irqpos *pos = moxtet->irq.position;
  532. u8 buf[TURRIS_MOX_MAX_MODULES];
  533. int i, ret;
  534. ret = moxtet_spi_read(moxtet, buf);
  535. if (ret < 0)
  536. return ret;
  537. *map = 0;
  538. for_each_set_bit(i, &moxtet->irq.exists, MOXTET_NIRQS) {
  539. if (!(buf[pos[i].idx + 1] & BIT(4 + pos[i].bit)))
  540. set_bit(i, map);
  541. }
  542. return 0;
  543. }
  544. static irqreturn_t moxtet_irq_thread_fn(int irq, void *data)
  545. {
  546. struct moxtet *moxtet = data;
  547. unsigned long set;
  548. int nhandled = 0, i, sub_irq, ret;
  549. ret = moxtet_irq_read(moxtet, &set);
  550. if (ret < 0)
  551. goto out;
  552. set &= ~moxtet->irq.masked;
  553. do {
  554. for_each_set_bit(i, &set, MOXTET_NIRQS) {
  555. sub_irq = irq_find_mapping(moxtet->irq.domain, i);
  556. handle_nested_irq(sub_irq);
  557. dev_dbg(moxtet->dev, "%i irq\n", i);
  558. ++nhandled;
  559. }
  560. ret = moxtet_irq_read(moxtet, &set);
  561. if (ret < 0)
  562. goto out;
  563. set &= ~moxtet->irq.masked;
  564. } while (set);
  565. out:
  566. return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
  567. }
  568. static void moxtet_irq_free(struct moxtet *moxtet)
  569. {
  570. int i, irq;
  571. for (i = 0; i < MOXTET_NIRQS; ++i) {
  572. if (moxtet->irq.exists & BIT(i)) {
  573. irq = irq_find_mapping(moxtet->irq.domain, i);
  574. irq_dispose_mapping(irq);
  575. }
  576. }
  577. irq_domain_remove(moxtet->irq.domain);
  578. }
  579. static int moxtet_irq_setup(struct moxtet *moxtet)
  580. {
  581. int i, ret;
  582. moxtet->irq.domain = irq_domain_create_simple(dev_fwnode(moxtet->dev), MOXTET_NIRQS, 0,
  583. &moxtet_irq_domain, moxtet);
  584. if (moxtet->irq.domain == NULL) {
  585. dev_err(moxtet->dev, "Could not add IRQ domain\n");
  586. return -ENOMEM;
  587. }
  588. for (i = 0; i < MOXTET_NIRQS; ++i)
  589. if (moxtet->irq.exists & BIT(i))
  590. irq_create_mapping(moxtet->irq.domain, i);
  591. moxtet->irq.chip = moxtet_irq_chip;
  592. moxtet->irq.masked = ~0;
  593. ret = request_threaded_irq(moxtet->dev_irq, NULL, moxtet_irq_thread_fn,
  594. IRQF_SHARED | IRQF_ONESHOT, "moxtet", moxtet);
  595. if (ret < 0)
  596. goto err_free;
  597. return 0;
  598. err_free:
  599. moxtet_irq_free(moxtet);
  600. return ret;
  601. }
  602. static int moxtet_probe(struct spi_device *spi)
  603. {
  604. struct moxtet *moxtet;
  605. int ret;
  606. ret = spi_setup(spi);
  607. if (ret < 0)
  608. return ret;
  609. moxtet = devm_kzalloc(&spi->dev, sizeof(struct moxtet),
  610. GFP_KERNEL);
  611. if (!moxtet)
  612. return -ENOMEM;
  613. moxtet->dev = &spi->dev;
  614. spi_set_drvdata(spi, moxtet);
  615. mutex_init(&moxtet->lock);
  616. moxtet->dev_irq = of_irq_get(moxtet->dev->of_node, 0);
  617. if (moxtet->dev_irq == -EPROBE_DEFER)
  618. return -EPROBE_DEFER;
  619. if (moxtet->dev_irq <= 0) {
  620. dev_err(moxtet->dev, "No IRQ resource found\n");
  621. return -ENXIO;
  622. }
  623. ret = moxtet_find_topology(moxtet);
  624. if (ret < 0)
  625. return ret;
  626. if (moxtet->irq.exists) {
  627. ret = moxtet_irq_setup(moxtet);
  628. if (ret < 0)
  629. return ret;
  630. }
  631. of_register_moxtet_devices(moxtet);
  632. moxtet_register_devices_from_topology(moxtet);
  633. ret = moxtet_register_debugfs(moxtet);
  634. if (ret < 0)
  635. dev_warn(moxtet->dev, "Failed creating debugfs entries: %i\n",
  636. ret);
  637. return 0;
  638. }
  639. static void moxtet_remove(struct spi_device *spi)
  640. {
  641. struct moxtet *moxtet = spi_get_drvdata(spi);
  642. free_irq(moxtet->dev_irq, moxtet);
  643. moxtet_irq_free(moxtet);
  644. moxtet_unregister_debugfs(moxtet);
  645. device_for_each_child(moxtet->dev, NULL, __unregister);
  646. mutex_destroy(&moxtet->lock);
  647. }
  648. static const struct spi_device_id moxtet_spi_ids[] = {
  649. { "moxtet" },
  650. { },
  651. };
  652. MODULE_DEVICE_TABLE(spi, moxtet_spi_ids);
  653. static const struct of_device_id moxtet_dt_ids[] = {
  654. { .compatible = "cznic,moxtet" },
  655. {},
  656. };
  657. MODULE_DEVICE_TABLE(of, moxtet_dt_ids);
  658. static struct spi_driver moxtet_spi_driver = {
  659. .driver = {
  660. .name = "moxtet",
  661. .of_match_table = moxtet_dt_ids,
  662. },
  663. .id_table = moxtet_spi_ids,
  664. .probe = moxtet_probe,
  665. .remove = moxtet_remove,
  666. };
  667. static int __init moxtet_init(void)
  668. {
  669. int ret;
  670. ret = bus_register(&moxtet_bus_type);
  671. if (ret < 0) {
  672. pr_err("moxtet bus registration failed: %d\n", ret);
  673. goto error;
  674. }
  675. ret = spi_register_driver(&moxtet_spi_driver);
  676. if (ret < 0) {
  677. pr_err("moxtet spi driver registration failed: %d\n", ret);
  678. goto error_bus;
  679. }
  680. return 0;
  681. error_bus:
  682. bus_unregister(&moxtet_bus_type);
  683. error:
  684. return ret;
  685. }
  686. postcore_initcall_sync(moxtet_init);
  687. static void __exit moxtet_exit(void)
  688. {
  689. spi_unregister_driver(&moxtet_spi_driver);
  690. bus_unregister(&moxtet_bus_type);
  691. }
  692. module_exit(moxtet_exit);
  693. MODULE_AUTHOR("Marek Behun <kabel@kernel.org>");
  694. MODULE_DESCRIPTION("CZ.NIC's Turris Mox module configuration bus");
  695. MODULE_LICENSE("GPL v2");