decode.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. #include <stdio.h>
  3. #include <stdlib.h>
  4. #include <objtool/check.h>
  5. #include <objtool/disas.h>
  6. #include <objtool/elf.h>
  7. #include <objtool/arch.h>
  8. #include <objtool/warn.h>
  9. #include <objtool/builtin.h>
  10. const char *arch_reg_name[CFI_NUM_REGS] = {
  11. "r0", "sp", "r2", "r3",
  12. "r4", "r5", "r6", "r7",
  13. "r8", "r9", "r10", "r11",
  14. "r12", "r13", "r14", "r15",
  15. "r16", "r17", "r18", "r19",
  16. "r20", "r21", "r22", "r23",
  17. "r24", "r25", "r26", "r27",
  18. "r28", "r29", "r30", "r31",
  19. "ra"
  20. };
  21. int arch_ftrace_match(const char *name)
  22. {
  23. return !strcmp(name, "_mcount");
  24. }
  25. s64 arch_insn_adjusted_addend(struct instruction *insn, struct reloc *reloc)
  26. {
  27. return reloc_addend(reloc);
  28. }
  29. bool arch_callee_saved_reg(unsigned char reg)
  30. {
  31. return false;
  32. }
  33. int arch_decode_hint_reg(u8 sp_reg, int *base)
  34. {
  35. exit(-1);
  36. }
  37. const char *arch_nop_insn(int len)
  38. {
  39. exit(-1);
  40. }
  41. const char *arch_ret_insn(int len)
  42. {
  43. exit(-1);
  44. }
  45. int arch_decode_instruction(struct objtool_file *file, const struct section *sec,
  46. unsigned long offset, unsigned int maxlen,
  47. struct instruction *insn)
  48. {
  49. unsigned int opcode;
  50. enum insn_type typ;
  51. unsigned long imm;
  52. u32 ins;
  53. ins = bswap_if_needed(file->elf, *(u32 *)(sec->data->d_buf + offset));
  54. opcode = ins >> 26;
  55. typ = INSN_OTHER;
  56. imm = 0;
  57. switch (opcode) {
  58. case 18: /* b[l][a] */
  59. if (ins == 0x48000005) /* bl .+4 */
  60. typ = INSN_OTHER;
  61. else if (ins & 1) /* bl[a] */
  62. typ = INSN_CALL;
  63. else /* b[a] */
  64. typ = INSN_JUMP_UNCONDITIONAL;
  65. imm = ins & 0x3fffffc;
  66. if (imm & 0x2000000)
  67. imm -= 0x4000000;
  68. imm |= ins & 2; /* AA flag */
  69. break;
  70. }
  71. if (opcode == 1)
  72. insn->len = 8;
  73. else
  74. insn->len = 4;
  75. insn->type = typ;
  76. insn->immediate = imm;
  77. return 0;
  78. }
  79. unsigned long arch_jump_destination(struct instruction *insn)
  80. {
  81. if (insn->immediate & 2)
  82. return insn->immediate & ~2;
  83. return insn->offset + insn->immediate;
  84. }
  85. bool arch_pc_relative_reloc(struct reloc *reloc)
  86. {
  87. /*
  88. * The powerpc build only allows certain relocation types, see
  89. * relocs_check.sh, and none of those accepted are PC relative.
  90. */
  91. return false;
  92. }
  93. void arch_initial_func_cfi_state(struct cfi_init_state *state)
  94. {
  95. int i;
  96. for (i = 0; i < CFI_NUM_REGS; i++) {
  97. state->regs[i].base = CFI_UNDEFINED;
  98. state->regs[i].offset = 0;
  99. }
  100. /* initial CFA (call frame address) */
  101. state->cfa.base = CFI_SP;
  102. state->cfa.offset = 0;
  103. /* initial LR (return address) */
  104. state->regs[CFI_RA].base = CFI_CFA;
  105. state->regs[CFI_RA].offset = 0;
  106. }
  107. unsigned int arch_reloc_size(struct reloc *reloc)
  108. {
  109. switch (reloc_type(reloc)) {
  110. case R_PPC_REL32:
  111. case R_PPC_ADDR32:
  112. case R_PPC_UADDR32:
  113. case R_PPC_PLT32:
  114. case R_PPC_PLTREL32:
  115. return 4;
  116. default:
  117. return 8;
  118. }
  119. }
  120. #ifdef DISAS
  121. int arch_disas_info_init(struct disassemble_info *dinfo)
  122. {
  123. return disas_info_init(dinfo, bfd_arch_powerpc,
  124. bfd_mach_ppc, bfd_mach_ppc64,
  125. NULL);
  126. }
  127. #endif /* DISAS */