mailbox-mpfs.c 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Microchip PolarFire SoC (MPFS) system controller/mailbox controller driver
  4. *
  5. * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
  6. *
  7. * Author: Conor Dooley <conor.dooley@microchip.com>
  8. *
  9. */
  10. #include <linux/io.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/regmap.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/mfd/syscon.h>
  18. #include <linux/mod_devicetable.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/mailbox_controller.h>
  21. #include <soc/microchip/mpfs.h>
  22. #define MESSAGE_INT_OFFSET 0x18cu
  23. #define SERVICES_CR_OFFSET 0x50u
  24. #define SERVICES_SR_OFFSET 0x54u
  25. #define MAILBOX_REG_OFFSET 0x800u
  26. #define MSS_SYS_MAILBOX_DATA_OFFSET 0u
  27. #define SCB_MASK_WIDTH 16u
  28. /* SCBCTRL service control register */
  29. #define SCB_CTRL_REQ (0)
  30. #define SCB_CTRL_REQ_MASK BIT(SCB_CTRL_REQ)
  31. #define SCB_CTRL_BUSY (1)
  32. #define SCB_CTRL_BUSY_MASK BIT(SCB_CTRL_BUSY)
  33. #define SCB_CTRL_ABORT (2)
  34. #define SCB_CTRL_ABORT_MASK BIT(SCB_CTRL_ABORT)
  35. #define SCB_CTRL_NOTIFY (3)
  36. #define SCB_CTRL_NOTIFY_MASK BIT(SCB_CTRL_NOTIFY)
  37. #define SCB_CTRL_POS (16)
  38. #define SCB_CTRL_MASK GENMASK(SCB_CTRL_POS + SCB_MASK_WIDTH - 1, SCB_CTRL_POS)
  39. /* SCBCTRL service status register */
  40. #define SCB_STATUS_REQ (0)
  41. #define SCB_STATUS_REQ_MASK BIT(SCB_STATUS_REQ)
  42. #define SCB_STATUS_BUSY (1)
  43. #define SCB_STATUS_BUSY_MASK BIT(SCB_STATUS_BUSY)
  44. #define SCB_STATUS_ABORT (2)
  45. #define SCB_STATUS_ABORT_MASK BIT(SCB_STATUS_ABORT)
  46. #define SCB_STATUS_NOTIFY (3)
  47. #define SCB_STATUS_NOTIFY_MASK BIT(SCB_STATUS_NOTIFY)
  48. #define SCB_STATUS_POS (16)
  49. #define SCB_STATUS_MASK GENMASK(SCB_STATUS_POS + SCB_MASK_WIDTH - 1, SCB_STATUS_POS)
  50. struct mpfs_mbox {
  51. struct mbox_controller controller;
  52. struct device *dev;
  53. int irq;
  54. void __iomem *ctrl_base;
  55. void __iomem *mbox_base;
  56. void __iomem *int_reg;
  57. struct mbox_chan chans[1];
  58. struct mpfs_mss_response *response;
  59. struct regmap *sysreg_scb, *control_scb;
  60. u16 resp_offset;
  61. };
  62. static bool mpfs_mbox_busy(struct mpfs_mbox *mbox)
  63. {
  64. u32 status;
  65. if (mbox->control_scb)
  66. regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &status);
  67. else
  68. status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
  69. return status & SCB_STATUS_BUSY_MASK;
  70. }
  71. static bool mpfs_mbox_last_tx_done(struct mbox_chan *chan)
  72. {
  73. struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
  74. struct mpfs_mss_response *response = mbox->response;
  75. u32 val;
  76. if (mpfs_mbox_busy(mbox))
  77. return false;
  78. /*
  79. * The service status is stored in bits 31:16 of the SERVICES_SR
  80. * register & is only valid when the system controller is not busy.
  81. * Failed services are intended to generated interrupts, but in reality
  82. * this does not happen, so the status must be checked here.
  83. */
  84. if (mbox->control_scb)
  85. regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &val);
  86. else
  87. val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
  88. response->resp_status = (val & SCB_STATUS_MASK) >> SCB_STATUS_POS;
  89. return true;
  90. }
  91. static int mpfs_mbox_send_data(struct mbox_chan *chan, void *data)
  92. {
  93. struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
  94. struct mpfs_mss_msg *msg = data;
  95. u32 tx_trigger;
  96. u16 opt_sel;
  97. u32 val = 0u;
  98. mbox->response = msg->response;
  99. mbox->resp_offset = msg->resp_offset;
  100. if (mpfs_mbox_busy(mbox))
  101. return -EBUSY;
  102. if (msg->cmd_data_size) {
  103. u32 index;
  104. u8 extra_bits = msg->cmd_data_size & 3;
  105. u32 *word_buf = (u32 *)msg->cmd_data;
  106. for (index = 0; index < (msg->cmd_data_size / 4); index++)
  107. writel_relaxed(word_buf[index],
  108. mbox->mbox_base + msg->mbox_offset + index * 0x4);
  109. if (extra_bits) {
  110. u8 i;
  111. u8 byte_off = ALIGN_DOWN(msg->cmd_data_size, 4);
  112. u8 *byte_buf = msg->cmd_data + byte_off;
  113. val = readl_relaxed(mbox->mbox_base + msg->mbox_offset + index * 0x4);
  114. for (i = 0u; i < extra_bits; i++) {
  115. val &= ~(0xffu << (i * 8u));
  116. val |= (byte_buf[i] << (i * 8u));
  117. }
  118. writel_relaxed(val, mbox->mbox_base + msg->mbox_offset + index * 0x4);
  119. }
  120. }
  121. opt_sel = ((msg->mbox_offset << 7u) | (msg->cmd_opcode & 0x7fu));
  122. tx_trigger = (opt_sel << SCB_CTRL_POS) & SCB_CTRL_MASK;
  123. tx_trigger |= SCB_CTRL_REQ_MASK | SCB_STATUS_NOTIFY_MASK;
  124. if (mbox->control_scb)
  125. regmap_write(mbox->control_scb, SERVICES_CR_OFFSET, tx_trigger);
  126. else
  127. writel_relaxed(tx_trigger, mbox->ctrl_base + SERVICES_CR_OFFSET);
  128. return 0;
  129. }
  130. static void mpfs_mbox_rx_data(struct mbox_chan *chan)
  131. {
  132. struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
  133. struct mpfs_mss_response *response = mbox->response;
  134. u16 num_words = ALIGN((response->resp_size), (4)) / 4U;
  135. u32 i;
  136. if (!response->resp_msg) {
  137. dev_err(mbox->dev, "failed to assign memory for response %d\n", -ENOMEM);
  138. return;
  139. }
  140. /*
  141. * We should *never* get an interrupt while the controller is
  142. * still in the busy state. If we do, something has gone badly
  143. * wrong & the content of the mailbox would not be valid.
  144. */
  145. if (mpfs_mbox_busy(mbox)) {
  146. dev_err(mbox->dev, "got an interrupt but system controller is busy\n");
  147. response->resp_status = 0xDEAD;
  148. return;
  149. }
  150. for (i = 0; i < num_words; i++) {
  151. response->resp_msg[i] =
  152. readl_relaxed(mbox->mbox_base
  153. + mbox->resp_offset + i * 0x4);
  154. }
  155. mbox_chan_received_data(chan, response);
  156. }
  157. static irqreturn_t mpfs_mbox_inbox_isr(int irq, void *data)
  158. {
  159. struct mbox_chan *chan = data;
  160. struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
  161. if (mbox->control_scb)
  162. regmap_write(mbox->sysreg_scb, MESSAGE_INT_OFFSET, 0);
  163. else
  164. writel_relaxed(0, mbox->int_reg);
  165. mpfs_mbox_rx_data(chan);
  166. return IRQ_HANDLED;
  167. }
  168. static int mpfs_mbox_startup(struct mbox_chan *chan)
  169. {
  170. struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
  171. int ret = 0;
  172. if (!mbox)
  173. return -EINVAL;
  174. ret = devm_request_irq(mbox->dev, mbox->irq, mpfs_mbox_inbox_isr, 0, "mpfs-mailbox", chan);
  175. if (ret)
  176. dev_err(mbox->dev, "failed to register mailbox interrupt:%d\n", ret);
  177. return ret;
  178. }
  179. static void mpfs_mbox_shutdown(struct mbox_chan *chan)
  180. {
  181. struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
  182. devm_free_irq(mbox->dev, mbox->irq, chan);
  183. }
  184. static const struct mbox_chan_ops mpfs_mbox_ops = {
  185. .send_data = mpfs_mbox_send_data,
  186. .startup = mpfs_mbox_startup,
  187. .shutdown = mpfs_mbox_shutdown,
  188. .last_tx_done = mpfs_mbox_last_tx_done,
  189. };
  190. static inline int mpfs_mbox_syscon_probe(struct mpfs_mbox *mbox, struct platform_device *pdev)
  191. {
  192. mbox->control_scb = syscon_regmap_lookup_by_compatible("microchip,mpfs-control-scb");
  193. if (IS_ERR(mbox->control_scb))
  194. return PTR_ERR(mbox->control_scb);
  195. mbox->sysreg_scb = syscon_regmap_lookup_by_compatible("microchip,mpfs-sysreg-scb");
  196. if (IS_ERR(mbox->sysreg_scb))
  197. return PTR_ERR(mbox->sysreg_scb);
  198. mbox->mbox_base = devm_platform_ioremap_resource(pdev, 0);
  199. if (IS_ERR(mbox->mbox_base))
  200. return PTR_ERR(mbox->mbox_base);
  201. return 0;
  202. }
  203. static inline int mpfs_mbox_old_format_probe(struct mpfs_mbox *mbox, struct platform_device *pdev)
  204. {
  205. dev_warn(&pdev->dev, "falling back to old devicetree format");
  206. mbox->ctrl_base = devm_platform_ioremap_resource(pdev, 0);
  207. if (IS_ERR(mbox->ctrl_base))
  208. return PTR_ERR(mbox->ctrl_base);
  209. mbox->int_reg = devm_platform_ioremap_resource(pdev, 1);
  210. if (IS_ERR(mbox->int_reg))
  211. return PTR_ERR(mbox->int_reg);
  212. mbox->mbox_base = devm_platform_ioremap_resource(pdev, 2);
  213. if (IS_ERR(mbox->mbox_base)) // account for the old dt-binding w/ 2 regs
  214. mbox->mbox_base = mbox->ctrl_base + MAILBOX_REG_OFFSET;
  215. return 0;
  216. }
  217. static int mpfs_mbox_probe(struct platform_device *pdev)
  218. {
  219. struct mpfs_mbox *mbox;
  220. int ret;
  221. mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);
  222. if (!mbox)
  223. return -ENOMEM;
  224. ret = mpfs_mbox_syscon_probe(mbox, pdev);
  225. if (ret) {
  226. /*
  227. * set this to null, so it can be used as the decision for to
  228. * regmap or not to regmap
  229. */
  230. mbox->control_scb = NULL;
  231. ret = mpfs_mbox_old_format_probe(mbox, pdev);
  232. if (ret)
  233. return ret;
  234. }
  235. mbox->irq = platform_get_irq(pdev, 0);
  236. if (mbox->irq < 0)
  237. return mbox->irq;
  238. mbox->dev = &pdev->dev;
  239. mbox->chans[0].con_priv = mbox;
  240. mbox->controller.dev = mbox->dev;
  241. mbox->controller.num_chans = 1;
  242. mbox->controller.chans = mbox->chans;
  243. mbox->controller.ops = &mpfs_mbox_ops;
  244. mbox->controller.txdone_poll = true;
  245. mbox->controller.txpoll_period = 10u;
  246. ret = devm_mbox_controller_register(&pdev->dev, &mbox->controller);
  247. if (ret) {
  248. dev_err(&pdev->dev, "Registering MPFS mailbox controller failed\n");
  249. return ret;
  250. }
  251. dev_info(&pdev->dev, "Registered MPFS mailbox controller driver\n");
  252. return 0;
  253. }
  254. static const struct of_device_id mpfs_mbox_of_match[] = {
  255. {.compatible = "microchip,mpfs-mailbox", },
  256. {},
  257. };
  258. MODULE_DEVICE_TABLE(of, mpfs_mbox_of_match);
  259. static struct platform_driver mpfs_mbox_driver = {
  260. .driver = {
  261. .name = "mpfs-mailbox",
  262. .of_match_table = mpfs_mbox_of_match,
  263. },
  264. .probe = mpfs_mbox_probe,
  265. };
  266. module_platform_driver(mpfs_mbox_driver);
  267. MODULE_LICENSE("GPL v2");
  268. MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
  269. MODULE_DESCRIPTION("MPFS mailbox controller driver");