ili9486.c 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * DRM driver for Ilitek ILI9486 panels
  4. *
  5. * Copyright 2020 Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
  6. */
  7. #include <linux/backlight.h>
  8. #include <linux/delay.h>
  9. #include <linux/gpio/consumer.h>
  10. #include <linux/module.h>
  11. #include <linux/property.h>
  12. #include <linux/spi/spi.h>
  13. #include <video/mipi_display.h>
  14. #include <drm/clients/drm_client_setup.h>
  15. #include <drm/drm_atomic_helper.h>
  16. #include <drm/drm_drv.h>
  17. #include <drm/drm_fbdev_dma.h>
  18. #include <drm/drm_gem_atomic_helper.h>
  19. #include <drm/drm_gem_dma_helper.h>
  20. #include <drm/drm_managed.h>
  21. #include <drm/drm_mipi_dbi.h>
  22. #include <drm/drm_modeset_helper.h>
  23. #include <drm/drm_print.h>
  24. #define ILI9486_ITFCTR1 0xb0
  25. #define ILI9486_PWCTRL1 0xc2
  26. #define ILI9486_VMCTRL1 0xc5
  27. #define ILI9486_PGAMCTRL 0xe0
  28. #define ILI9486_NGAMCTRL 0xe1
  29. #define ILI9486_DGAMCTRL 0xe2
  30. #define ILI9486_MADCTL_BGR BIT(3)
  31. #define ILI9486_MADCTL_MV BIT(5)
  32. #define ILI9486_MADCTL_MX BIT(6)
  33. #define ILI9486_MADCTL_MY BIT(7)
  34. /*
  35. * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
  36. * in front of the display controller. This means that 8-bit values have to be
  37. * transferred as 16-bit.
  38. */
  39. static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,
  40. size_t num)
  41. {
  42. struct spi_device *spi = mipi->spi;
  43. unsigned int bpw = 8;
  44. void *data = par;
  45. u32 speed_hz;
  46. int i, ret;
  47. __be16 *buf;
  48. buf = kmalloc(32 * sizeof(u16), GFP_KERNEL);
  49. if (!buf)
  50. return -ENOMEM;
  51. /*
  52. * The displays are Raspberry Pi HATs and connected to the 8-bit only
  53. * SPI controller, so 16-bit command and parameters need byte swapping
  54. * before being transferred as 8-bit on the big endian SPI bus.
  55. */
  56. buf[0] = cpu_to_be16(*cmd);
  57. spi_bus_lock(spi->controller);
  58. gpiod_set_value_cansleep(mipi->dc, 0);
  59. speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
  60. ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
  61. spi_bus_unlock(spi->controller);
  62. if (ret || !num)
  63. goto free;
  64. /* 8-bit configuration data, not 16-bit pixel data */
  65. if (num <= 32) {
  66. for (i = 0; i < num; i++)
  67. buf[i] = cpu_to_be16(par[i]);
  68. num *= 2;
  69. data = buf;
  70. }
  71. /*
  72. * Check whether pixel data bytes needs to be swapped or not
  73. */
  74. if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
  75. bpw = 16;
  76. spi_bus_lock(spi->controller);
  77. gpiod_set_value_cansleep(mipi->dc, 1);
  78. speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
  79. ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num);
  80. spi_bus_unlock(spi->controller);
  81. free:
  82. kfree(buf);
  83. return ret;
  84. }
  85. static void waveshare_enable(struct drm_simple_display_pipe *pipe,
  86. struct drm_crtc_state *crtc_state,
  87. struct drm_plane_state *plane_state)
  88. {
  89. struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
  90. struct mipi_dbi *dbi = &dbidev->dbi;
  91. u8 addr_mode;
  92. int ret, idx;
  93. if (!drm_dev_enter(pipe->crtc.dev, &idx))
  94. return;
  95. DRM_DEBUG_KMS("\n");
  96. ret = mipi_dbi_poweron_conditional_reset(dbidev);
  97. if (ret < 0)
  98. goto out_exit;
  99. if (ret == 1)
  100. goto out_enable;
  101. mipi_dbi_command(dbi, ILI9486_ITFCTR1);
  102. mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
  103. msleep(250);
  104. mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
  105. mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44);
  106. mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00);
  107. mipi_dbi_command(dbi, ILI9486_PGAMCTRL,
  108. 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
  109. 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x0);
  110. mipi_dbi_command(dbi, ILI9486_NGAMCTRL,
  111. 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
  112. 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
  113. mipi_dbi_command(dbi, ILI9486_DGAMCTRL,
  114. 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
  115. 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
  116. mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
  117. msleep(100);
  118. out_enable:
  119. switch (dbidev->rotation) {
  120. case 90:
  121. addr_mode = ILI9486_MADCTL_MY;
  122. break;
  123. case 180:
  124. addr_mode = ILI9486_MADCTL_MV;
  125. break;
  126. case 270:
  127. addr_mode = ILI9486_MADCTL_MX;
  128. break;
  129. default:
  130. addr_mode = ILI9486_MADCTL_MV | ILI9486_MADCTL_MY |
  131. ILI9486_MADCTL_MX;
  132. break;
  133. }
  134. addr_mode |= ILI9486_MADCTL_BGR;
  135. mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
  136. mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
  137. out_exit:
  138. drm_dev_exit(idx);
  139. }
  140. static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = {
  141. DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(waveshare_enable),
  142. };
  143. static const struct drm_display_mode waveshare_mode = {
  144. DRM_SIMPLE_MODE(480, 320, 73, 49),
  145. };
  146. DEFINE_DRM_GEM_DMA_FOPS(ili9486_fops);
  147. static const struct drm_driver ili9486_driver = {
  148. .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
  149. .fops = &ili9486_fops,
  150. DRM_GEM_DMA_DRIVER_OPS_VMAP,
  151. DRM_FBDEV_DMA_DRIVER_OPS,
  152. .debugfs_init = mipi_dbi_debugfs_init,
  153. .name = "ili9486",
  154. .desc = "Ilitek ILI9486",
  155. .major = 1,
  156. .minor = 0,
  157. };
  158. static const struct of_device_id ili9486_of_match[] = {
  159. { .compatible = "waveshare,rpi-lcd-35" },
  160. { .compatible = "ozzmaker,piscreen" },
  161. {},
  162. };
  163. MODULE_DEVICE_TABLE(of, ili9486_of_match);
  164. static const struct spi_device_id ili9486_id[] = {
  165. { "ili9486", 0 },
  166. { "rpi-lcd-35", 0 },
  167. { "piscreen", 0 },
  168. { }
  169. };
  170. MODULE_DEVICE_TABLE(spi, ili9486_id);
  171. static int ili9486_probe(struct spi_device *spi)
  172. {
  173. struct device *dev = &spi->dev;
  174. struct mipi_dbi_dev *dbidev;
  175. struct drm_device *drm;
  176. struct mipi_dbi *dbi;
  177. struct gpio_desc *dc;
  178. u32 rotation = 0;
  179. int ret;
  180. dbidev = devm_drm_dev_alloc(dev, &ili9486_driver,
  181. struct mipi_dbi_dev, drm);
  182. if (IS_ERR(dbidev))
  183. return PTR_ERR(dbidev);
  184. dbi = &dbidev->dbi;
  185. drm = &dbidev->drm;
  186. dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  187. if (IS_ERR(dbi->reset))
  188. return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
  189. dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
  190. if (IS_ERR(dc))
  191. return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
  192. dbidev->backlight = devm_of_find_backlight(dev);
  193. if (IS_ERR(dbidev->backlight))
  194. return PTR_ERR(dbidev->backlight);
  195. device_property_read_u32(dev, "rotation", &rotation);
  196. ret = mipi_dbi_spi_init(spi, dbi, dc);
  197. if (ret)
  198. return ret;
  199. dbi->command = waveshare_command;
  200. dbi->read_commands = NULL;
  201. ret = mipi_dbi_dev_init(dbidev, &waveshare_pipe_funcs,
  202. &waveshare_mode, rotation);
  203. if (ret)
  204. return ret;
  205. drm_mode_config_reset(drm);
  206. ret = drm_dev_register(drm, 0);
  207. if (ret)
  208. return ret;
  209. spi_set_drvdata(spi, drm);
  210. drm_client_setup(drm, NULL);
  211. return 0;
  212. }
  213. static void ili9486_remove(struct spi_device *spi)
  214. {
  215. struct drm_device *drm = spi_get_drvdata(spi);
  216. drm_dev_unplug(drm);
  217. drm_atomic_helper_shutdown(drm);
  218. }
  219. static void ili9486_shutdown(struct spi_device *spi)
  220. {
  221. drm_atomic_helper_shutdown(spi_get_drvdata(spi));
  222. }
  223. static struct spi_driver ili9486_spi_driver = {
  224. .driver = {
  225. .name = "ili9486",
  226. .of_match_table = ili9486_of_match,
  227. },
  228. .id_table = ili9486_id,
  229. .probe = ili9486_probe,
  230. .remove = ili9486_remove,
  231. .shutdown = ili9486_shutdown,
  232. };
  233. module_spi_driver(ili9486_spi_driver);
  234. MODULE_DESCRIPTION("Ilitek ILI9486 DRM driver");
  235. MODULE_AUTHOR("Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>");
  236. MODULE_LICENSE("GPL");